itrs design itwg 2007 1 itrs roadmap design + system drivers makuhari, december 2007 worldwide...

ITRS Design ITWG 2007 1

ITRS Roadmap Design + System Drivers

Makuhari, December 2007

Worldwide Design ITWG


Overview

1. More concise, precise design technology roadmap

2. More comprehensive set of drivers for diversified, system-driven industry

2004

2005

2006

2007

ExploreDesign metrics

Design Technology metrics

Revised Design Technology metrics

Revised Design Technology Metrics

ConsumerPortableDriver

Consumer stationary and PortableDrivers

Consumer Stationary,Portable,and Networking Drivers

More Than Moore analysis + iNEMI

Driver study

System DriversChapter

DesignChapter


This Talk: 2007 Details

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2006

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Driver study


DesignChapter


ITRS Design + System Drivers

2004

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2006

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Driver study


DesignChapter


Design Chapter Sections: Improved, More Concise Format Target of 1/4 to 1/3 reduction of page count Three main portions: (a) Requirements table

– 1-2 pages. Includes subsection description, metric definitions, rationale for each number.

– Number of metrics: 10 (more subject to approval)

(b) Solutions table– 1 to 1.5 pages. Includes definitions for each solution, and rationale

for each solution. – Number of solutions: 10 (more subject to approval)

(c) Mapping from challenges to solutions– Maps challenges to solutions. Does not need to be 1-to-1. Any

requirements with no solutions need explanation. 1 page.


Design Technology RoadmapImproved Parameter Explanations

Example: Logic / Circuit / Physical


Design Technology RoadmapNew Requirement-Solution Matching Tables

Example: Logic / Circuit / Physical


Example: Design For Manufacturability

Design Technology RoadmapNew Requirement-Solution Matching Tables


New Software Design RoadmapCombined HW+SW Design Cost

20.6 15.6 20.7 19.3 24.3 24.1 33.215.5 22.5 15.7 20.3 19.4 26.3 32.9

44.929.5 39.8

25.2 32.6 27.0 36.91.5 8.112.4 18.2 9.3 12.7

20.2

24.0

39.129.6

40.756.4

79.0

33.6

46.7

31.1

42.5

27.235.2

34.0

46.6

0.0

20.0

40.0

60.0

80.0

100.0

120.0

2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020

Total HW Engineering Costs + EDA Tool Costs Total SW Engineering Costs + ESDA Tool Costs

SW cost

HW cost

NRE cost for SW design to equal HW design until design technology for SW issues is addressed



2004

2005

2006

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Driver study

DesignChapter


An Expanded Set of Drivers Will Direct An Increasingly Broad Industry

NetworkConsumerPortable

OfficeMedical Automotive Consumerstationary

Defense

MPU

PE(DSP)

AMS

Memory

Fabrics

Markets

2006 2007 2006 2006 200820082008SW ?


New Networking System Driver

SOC-PE Architecture

PEMainProc.

MainMemory

Peripherals

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE PE

Function A Function B Function C

Function D Function E

Multi-Core/Accelerator Engine Platform (SOC-MC/AE Architecture)

Multi-Cores

Accelerator Engine

Accelerator Engine

Accelerator Engine

Accelerator Engine

On-Demand Acceleration

Hi Speed Hi Speed Hi Speed

Connectivity

L3 Cache

Non-Blocking Switch Fabric

Memory Control

System Functions

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

SOC-PE Architecture

PEMainProc.

MainMemory

Peripherals

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE PE



SOC-PE Architecture

PEMainProc.

MainMemory

Peripherals

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE

PE PE




Multi-Cores

Accelerator Engine

Accelerator Engine

Accelerator Engine

Accelerator Engine



Connectivity

L3 Cache


Memory Control

System Functions

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache


Multi-Cores

Accelerator Engine

Accelerator Engine

Accelerator Engine

Accelerator Engine



Connectivity

L3 Cache


Memory Control

System Functions

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core

L2 Cache

Multi-Core/Accelerator Engine SoC - Architecture template

Goals- Performance- Ease of use

Components- On-chip fabric - 32+ cores with private memory- Accelerator engine app-specific



2004

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Consumer Stationary,Portable,Automotiveand Networking Drivers


Driver study


DesignChapter


Design Solution InventoryClassification of 50+ design technology solutions1. Supporting Moore’s Law – More Moore (geometric scaling)2. Extending Moore’s Law – More Moore (equivalent scaling)3. Beyond Moore’s Law – More Than Moore (functional diversification)

Example: System-Level Design Solutions

More Moore More Moore More Than Moore


Many contributions beyond dimensional scaling– More Moore (equivalent scaling) – More Than Moore (functional diversification)

Inventory of 50+ Design Solutions

More Moore (geometric scaling)

More Moore (equivalent scaling)

More Than Moore (functional diversification)

Design Solution Inventory


Design-Driven Semiconductor Innovation

Domain- / Market-Independent Inventory of 50+ Design Solutions

Reveals impact of More Than Moore on key design phases

0%10%20%30%40%50%60%70%80%90%

100%geo scaling

equivalent scaling

functional diversification


More Than Moore Impact: “Pilot Example”Focused on design levers, e.g., multi-core

48% CAGR Performance

Consumer Stationary DriverN

orm

aliz

ed p

erfo

rman

ce

200

6

200

8

201

0

201

2

201

4

201

6

201

8

202

0

30% CAGR# cores

14-17% CAGR Device speed



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Driver study


DesignChapter


ITRS-iNEMI Domain Space

Chip level System level

Techrequirements

Marketrequirements

iNEMI(emulators)

ITRS(Drivers)


1st Alignment Between Chip and System Roadmaps Consumer Portable pilot, focused on power/energy

~10 parameters to be aligned


iNEMI-ITRSITRS Portable System Model

Application processor

Baseband processor

MemoryNAND Flash

MemoryWireless

Flash

Audio / video codec

Power mgt.

I/O controller

I/O transceivers

Oth

er

(ME

MS

, etc

.)

ProcessingPOWER

Memory / FlashCOST

Analog / I/ONOISE SENSITIVITY


iNEMI vs. ITRS Power ReconciliationTop-10 Parameters to be Reconciled

Portable emulator Consumer portable driveriNEMI iNEMI iNEMI iNEMI iNEMI iNEMI ITRS ITRS ITRS ITRS

iNEMI Parameter Metric 2007 2009 2011 2017 ITRS parameter 2007 2009 2011 2017Normal Logic Family Voltage Volts 2.85 2.2 1.8 1.2 Logic voltage 0.8 0.8 0.7 0.5POWERSpec. energy Wh/kg 175 200 300 400 N/AAvg. standby power Watts Total static power 0.052 0.09 0.146 0.58Run Time Before Recharge Hours 0.0875 0.05 0.06 0.06667 N/ATHERMAL Use Ambient Operating Temp Range Deg C - Deg C-10 to 50 -10 to 50 -10 to 50 -10 to 50 N/AThermal Design Power (Hottest Chip) Watts 40 45 50 60 total power 0.74 1.281 1.639 3.709Max Current per Device Amps Chip current (P/V) 0.93 1.60 2.34 7.42Thermal Design Flux (Hottest Chip) W/sq. cm N/ACooling Method Passive,Active, None, Bothboth both both both N/A


iNEMI vs. ITRS (System vs. Chip)Power Parameters Comparison

0

0.5

1

1.5

2

2.5

3

2007 2009 2011 2017

Voltage (iNEMI)

Voltage (ITRS)

Voltage supply trends Power trends

1

10

2007 2009 2011 2017

Power (iNEMI)

Power (ITRS)

iNEMI portable emulator

ITRS consumer driver

ITRS consumer driver

iNEMI portable emulator

ITRS stuck between lower voltages and higher power trends


2004

2005

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2007









Driver study


DesignChapter

Summary

1. More concise, precise design technology roadmap

2. More comprehensive set of drivers for diversified, system-driven industry


Looking to 2008: Design

• Refinement of existing metrics

• Software productivity

• Design for Test

• New metrics

• DFM (CD variability roadmap)

• System-level tools

• SiP tools

• More than Moore

• Update count of MtM solutions as part of all solutions

• Increase amount of SiP + board related metrics


• New drivers• FPGA / reconfigurable fabric (2008)• Automotive (2008)• Medical, Defense (2009)

• Refinement of existing drivers• Consumer portable /stationary (power limits)• MPU (power-limited)

• More than Moore• Further alignment with iNEMI: consumer portable• Start “board-level” architecture template

Looking to 2008: System Drivers


Grand Challenges for Design and ITRS Near-Term

– Design Productivity • Overall (HW + SW)

– Power Management • Total power (active and leakage)

– Design for Manufacturability • Modeling of variability + yield-aware optimizations

Long-Term– Design Productivity

• Software and system-level (heterogeneous multi-core)• Multi-technology integration

– Power Management• Leakage and reliability

– Design for Manufacturability and Yield• Integration of design for yield / mfg / test

itrs design itwg 2007 1 itrs roadmap design + system drivers makuhari, december 2007 worldwide...

Documents

itrs design itwg

design levers

design technology solutions

itrs roadmap design

design chapter sections

worldwide design itwg

equal hw design

systemlevel design solutions