lecture 11: accelerometers (part ii)

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��ENE 5400 �� , Spring 2004 1

Lecture 11: Accelerometers (Part II)

� Feedback linearization� Sigma-delta modulation

� Accelerometer Examples� Continuous-time voltage sensing:

» CMOS-integrated polysilicon-micromachinedaccelerometer (Fedder, UC Berkeley)

» CMOS-micromachined chopper-stabilized capacitive accelerometer (Wu, Carnegie Mellon)

� Switched-capacitor circuit:» A 3-axis CMOS-integrated accelerometer (Lemkin, UC

Berkeley)

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Feedback for Accelerometers

� Provides feedback linearization and increases dynamic range of operation

� Reduces the Brownian noise displacement, but not the electronicsnoise

� Can stabilize high-Q operation when Brownian noise reduction is required

� There are analog and discrete-time approaches:� Force-balanced feedback� Delta-Sigma (∆∆∆∆-∑) modulation

» The discrete-time approach; it is attractive because it provides additional high-resolution digital output

» A popular method for A/D conversion for low-to-medium frequency signals with reduced quantization noise

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Feedback Linearization

� For open-loop operation:

� For closed-loop operation: output is about 1/PH of that in open-loop operation

( )( ) ( )sPsF

sX

ext

=

Fext+

_x

P(s)Fext x

P(s)

H(s)

accelerometer

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Typical Feedback Control for an Accelerometer

ms2 + bs + k1

VsC(s)

controller

V/x

sensor

F/V

Electrostaticforce

Fext+

_+

+

Fb (Brownian force)

x

Vc

P

H

Vn(electronics noise)

accelerometer

+

+

3

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Sensitivity Reduction of Fb by Feedback

PH

P

F

x

b

Fb

+=

1A large loop gain PH reduces theBrownian noise displacement

ms2 + bs + k1

Vs

C(s)

controller

V/x

sensor

F/V

Electrostaticforce

Fext = 0+

_+

+

Fb (Brownian force)

x

Vc

P

H


accelerometer

+

+

Let Fext = 0, so the Brownian noise displacement xFb:

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Noise Reduction by Feedback?

� Closed-loop feedback has no effect on reduction of the electronics noise

ms2 + bs + k1

Vs

C(s)

controller

V/x

sensor

F/V

Electrostaticforce

Fext = 0+

_+

+

Fb (Brownian force)

x

Vc

P

H


accelerometer

+

+

4

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RMS Brownian Noise Displacement of an Accelerometer

� For open-loop operated accelerometers, the r.m.s. Brownian noise displacement is shaped by the mechanical mass-spring-damper frequency response

ms2 + bs + k

1Fn Brownian force

xn

accelerometer

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RMS Brownian Noise Acceleration of an Accelerometer

� For open-loop operated accelerometers, the r.m.s. Brownian noise acceleration has a constant spectral density� Can be reduced by reducing the damping or increasing the

proof mass

m

1Fn Brownian force

an

Mass of the accelerometer

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Example

� A high-performance accelerometer has the following design parameters: m = 500 ng, Q = 80000, and ωωωωn = 1 kHz. What is the equivalent Brownian noise acceleration? What is the minimum detectable acceleration in a 1-kHz bandwidth?

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Sigma-Delta (∑-∆∆∆∆) Architecture

� Well-known technique for A/D conversion� Simple, fast electronics to achieve excellent temporal

resolution� Provide a large dynamic range (S/N ratio)

� What is it applied to a micromachined accelerometer?� To produce a high-resolution digital output� To provide feedback linearization to suppress sensor

nonlinearities� To provide feedback stabilization when operated in vacuum

for Brownian-noise reduction

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Related Materials

� Oversampling� Quantization noise� Delta Modulator

� The reduction of quantization noise is limited� Sigma-Delta Modulator

� Better noise reduction

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∑-∆∆∆∆: A/D Conversion Technique using Over-sampling

� Given: a signal whose bandwidth is a lot lower than that of our electronics (like audio)

� Want: to obtain a high accuracy A/D conversion (16 or more bits) without needing ultra-precise components

� Fundamental idea: trade off “resolution in time” for “resolution in voltage”� Sample input signal very rapidly – well above the Nyquist

rate� Infer extra bits from the large collection of samples which

helps to reduce noises

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Aliasing

� The sampling frequency should be at least twice of the signal frequency (called the Nyquist frequency) to avoid “Aliasing” (the orig. signal can not be converted back from sampled data)

Signal frequency = 1 Hz

Sampling frequency = 1 Hz



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Example

� Audio signal: 20 kHz bandwidth

� Suppose all we have is a 1-bit A/D converter (a comparator), all we can do is detect sign of the signal� Oversampling does not help much – we just get a better

idea of when zero crossings occur

v(t)

t

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Cont’d

� To know the actual value of v(t), let’s add some rapidly-varying random noise to the signal

� Assumptions� Noise amplitude equals maximum signal amplitude� Successive values of noises are independent� Uniform distribution in voltage

v(t)

t

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Cont’d

� The v(t) amplitude affects the probability of getting 1 or 0

v(t)

t

Very likely toget 1’s

Very likely toget 0’s

Equal likelihoodof 1 or 0

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Summary

� Provided we oversample a lot. We can collect statistics on the comparator outputs in each interval

� Suppose we are 128X oversampled:� We can get an averaged value from 120 1’s and 8 0’s� The more we oversample, the more confident we can be that

this average is an accurate representation� Key advantages:

� No precision components required – fast comparator� Digital circuits can compute the average – no vulnerability

to noise, mismatch, etc

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Modeling Quantization Errors

� Quantization errors exist in the A/D and D/A processes� We can use a simple additive noise source VQ(t) to represent

the quantization error:

A/D D/Avin vout

vin1 ∑

VQ(t)

vout

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Model for A/D plus D/A

� A continuum of different voltages are snapped to a quantized set of levels

0/8 1/8 2/8 3/8 4/8 5/8 6/8 7/8

1/8

2/8

3/8

4/8

5/8

6/8

7/8input

output

vin/FS

output

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Quantization Errors

� Simply the difference of the A/D-D/A output and the original input

0/8 1/8 2/8 3/8 4/8 5/8 6/8 7/8

vin/FS

vout - vin

½ LSB

-½ LSB

0

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Quantization Noise

� The circuit to investigate the quantization noise: V1 = Vin + VQ

A/D D/Avin v1

+_ vQ

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Quantization Noise – The Deterministic Approach

Vin

V1

time

time

VQ

½ VLSB

-½ VLSB

0

T

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Delta Modulation

� The notion from communications: transmit a high-precision signal across high-speed channel with few bits

� Key concepts:� The closed-loop feedback with an embedded integrator can

drive vfb to be nearly equal to a slowly-varying vin

� The difference vin – vfb is small, so few bits are required to resolve it accurately

A/D

D/A

b bits

integrator

N bits

+

_

b bits

∑vin

vfb

N >> b

b bitstransmitted

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Demodulating the Delta-Modulator

� How to reconstruct vin when it is received?� We expect to have vo = vfb

� If the negative feedback is doing its job, then vo ≅≅≅≅ vin

� The full N-bit signal is reconstructed from the transmitted stream of b-bit “deltas”

N-bit range

vin A/D

D/A

b bits

integrator

+

_

b bits

∑

b bitstransmitted

vfb

D/A integrator

receiver

vo

N-bitrange

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The Complete Delta-Modulator Picture

� The A/D and D/A blocks are represented with a gain of one and a quantization noise source

� Using the quantization noise model, we can show� With VQ = 0, Vo(s) / Vin(s) = 1 / (s + 1) a low-pass filter� With Vin = 0, Vo(s) / VQ(s) = 1 / (s + 1) a low-pass filter

Vin+

_∑

b bits

Vfb

receiver

Vo∑

1/s

1/s

VQ

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Limited Improvements

� Although total noise power is lowered, there is still substantial noise in-band� Noise in the signal band is not attenuated

LPF

Vin

ω ω

LPF

VQ

ω ω

Output after LPF

Output after LPF

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Simplest Sigma-Delta Modulator

� Move the integrator to a new location inside the loop

Vin+

_∑

b bits

Vfb

∑1/s

VQ

Vo

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Analysis

� Our transfer functions become� With VQ = 0, Vo(s) / Vin(s) = 1 / (s + 1) still a low-pass filter� With Vin = 0, Vo(s) / VQ(s) = s / (s + 1) now a high-pass filter

� Noise gets pushed out of band by sigma-delta modulator

LPF

Vin

ω ω

HPF

VQ

ω

Output after LPF

Output after HPF

ω

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Z-Transform Model of a Switched-Capacitor First-Order Sigma-Delta Modulator

� New transfer functions:

Vin (z)+

_∑

b bits

Vfb

∑

VQ(z)

Vo(z)

Z-1

1 - Z-1

1

111

111

1 −−− −=

−+=

=

z)z/(z)z(V

)z(V

)z(V

)z(V

Q

o

in

o

a delay due to A/D conversion

Digital integrator

A differentiator; high-pass

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Continuous- and Discrete-Time Transfer Functions

� Continuous time:

� Discrete time:

( ) ( ) ω=ω→ jswithjTsT

( ) ( )periodsamplingtheisT

ezwithjTzT Tjω=ω→

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Analysis of Noise Reduction

� 1st-order SC sigma-delta: the Noise Transfer Function (NTF) magnitude is:

� Define ωωωωo the signal bandwidth and ωωωωs = 2ππππ/T the sampling frequency; Oversampling factor N = ωωωωs/ωωωωo >>1

� Previously for A/D + D/A (no sigma-delta), the quantization noise is a white noise with RMS value of VLSB/√√√√12

ω−ωs ωs

|VQ(jω)|2 The total energy of inside thesampling frequency ωωωωs:

∫ω

ω−=ωωs

s

d)j(VQ

2

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� Can the sigma-delta do better than VLSB2ωωωωs/6? After passing

through the Noise Transfer Function, the RMS noise output value becomes:

� We will perform filtering to kill off noise outside –ωωωωo to ωωωωo, and the total energy within the signal band is found by integrating the power spectral density between –ωωωωo to ωωωωo

=ω43421

QVtodue

o )j(V

ω−ωs ωo ωs−ωo

∫ ∫ω

ω−

ω

ω−ωω⋅=ωωo

o

o

o

Q

d)T

(sinV

d)j(V LSB

Vtodue

o2

22

2343421

43421

QVtodue

o )j(V ω

Killed by filtering

Killed by filtering

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� Assuming that ωωωωo << ωωωωs = 2ππππ/T, we use sin(ωωωωT/2) ≅≅≅≅ ωωωωT/2 and ωωωωs/ωωωωo = N:

� Compare noise energy without and with the 1st-order sigma-delta:

� Reduction in RMS noise is its squared root =� Each additional factor of 2 in noise reduction is like adding another bit

to the A/D converter

32

3222

4

3

9

2

6

1NNV/V sLSBsLSB π

=

ωπω −

( )π23 23 /N /

( )( ) ( )NLog../NLogBitsExtra /2

232 519123 +−=π=

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Example

� Use a 1-bit A/D (comparator) and oversampling:� Telephony (signal bandwidth = 3.5 kHz): 8 bits will do

» Sampling rate needed is 97 (3.5 kHz) = 340 kHz» No problem! Our op-amps can do this

� Hi-fi audio (bandwidth = 20 kHz): 16+ bits

» Ouch! Can we do better?

8 = -1.9 + 1.5 Log2 (N) ⇒ N = 97

16 = -1.9 + 1.5 Log2 (N) ⇒ N = 39103910⋅⋅⋅⋅20kHz = 78 MHz (T = 13 ns)

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Second-order Sigma-Delta

� Essentially, a 1st-order sigma-delta modulator embedded in a bigger feedback loop

Vin (z)+

_∑ ∑

VQ(z)

Vo(z)

1 - Z-1

1

1 - Z-1

Z-1∑

No-delayintegrator

Integratorwith delay

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A Better Noise Transfer Function

� The Noise Transfer Function can be shown to be:

� A steeper high-pass filter, more effective in eliminating the in-band noise than the 1st-order sigma-delta

� Extra bits = -3.1 + 2.5 Log2(N)

2/522

5N

ππππNoise reduction =

( )( ) =zV

zV

Q

o

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Following the Previous Example

� The hi-fi audio example reconsidered; for 16 bits,

� The sampling frequency

16 = -3.1 + 2.5 Log2 (N) ⇒ N = 200

fs = 200⋅⋅⋅⋅20kHz = 4 MHz (T = 250 ns) << 78 MHz

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Force-Balanced Delta-Sigma MEMS Accelerometer

� It is a 2nd-order modulator because the accelerometer has two poles, assuming that the loop filter H(z) doesn’t have any pole

� H(z) is responsible for stabilizing the system for high-Q operation, usually a lead compensator

� Delta-sigma can be conveniently combined with the use of a switch-capacitor sensing circuit

ain

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CMOS-integrated Capacitive Accelerometer using ∑-∆∆∆∆ Feedback Compensation

Source: (1) G.K. Fedder, Ph.D. Dissertation, UC Berkeley, 1994(2) G.K. Fedder and R.T. Howe, J. MEMS, vol. 5, no. 4, pp. 283-297, 1996

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Block Diagram of a Micromechanical ∑-∆∆∆∆ Loop with Digital Compensation

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Block Diagram of a Micromechanical ∑-∆∆∆∆ Loop with Digital Compensation

Vm+

Vm-

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Schematic of a Micromechanical ∑-∆∆∆∆ Loop with Digital Compensation

Vm+

Vm-

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CMOS-Integrated Fabrication

� UC Berkeley MICS process: p-well CMOS integrated with polysiliconmicrostructures

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Capacitive Readout Circuit

� Differential sensing using Crand Cs

� The original Cp includes two parts: the routing capacitance and the pre-amp input capacitance� A driven shield is used to

significantly reduce the routing parasitic capacitance

� A specially designed unity-gain buffer has an input capacitance less than 5 fF

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��ENE 5400 �� , Spring 2004 45

Cont’d

� Cp is reduced to:

� The sensed output voltage is:

(((( )))) pop CGC ⋅⋅⋅⋅−−−−==== 1'

++++++++−−−−==== '

psr

srmos CCC

CCVGV

Reduced to Cp’

��ENE 5400 �� , Spring 2004 46

Sensing Pre-Amp: An Unity-Gain Buffer

� To reduce the M1 input capacitance (Cgd and Cgs), the respective small signals at the drain and source of M1 are desired to follow the gate� For Cgd : M3-M4 and M5-M6

are two current-mirror pairs to mirror the output voltage to the drain of M1

� For Cgs : a high-impedance current source can consolidate the low impedance looking into the source of M1 and M2, resulting a good source follower

� Reverse-biased diode provides the d.c. bias (be aware of leakage)

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Low-Frequency Small-Signal Model of the Buffer Amplifier

� Diode-connected MOS transistors are represented by resistors of 1/gm

� The resulting gain is:

� The input capacitance can be reduced from 10’s of fF to below 5 fF

(((( ))))

1,6,1,

11

1

Mm

L

MoMm gsC

rg

sG++++++++

====

Diode-connectedtransistor

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Buffer Noise

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CMOS-micromachined Chopper-stabilizedCapacitive Accelerometer

Source: (1) Jiang-feng Wu, Ph.D. Dissertation, Carnegie Mellon Univ., 2002(2) J. Wu et al., IEEE Int. Solid-State Circuits Conf. (ISSCC) Digest

of Technical Papers, pp. 428-429, 2002

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Fabrication

CMOS circuit MEMS structure

metal

dielectric

silicon

26

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Readout Circuit Architecture

� Fully differential and low-noise sensing

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Noise Optimization

� Low noise circuit architecture� Continuous-time voltage sensing� Chopper stabilization

� Input stage noise minimization� Noise minimization by optimum capacitance match

� External noise rejection� Fully differential sensor and fully differential signal path for

high CMRR and PSRR� On-chip generation of modulation signals

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Suppression of Offset and Charging

� Differential difference amplifier based offset compensation� DC offset cancelled by DC

feedback� Electronic cancellation of

sensor position offset by AC correction signal

� Switching bias of sensing nodes� Sensing nodes reset every 16

clock cycles» To establish dc bias» To remove signal error

due to the accumulated charges

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Differential Difference Amplifier

A fixed low-gain amplifier

28

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Accelerometer Measurement

On-chip Sensitivity = 130mV/g

0.5g 400Hz Sinusoidal Acceleration

Referenceoutput (1V/g)

Accelerometeroutput (3.4V/g)

��ENE 5400 �� , Spring 2004 56

Noise Measurement

Noise Floor = 50 µµµµg/√√√√Hz (~50 fm/√√√√Hz & 0.02 aF/√√√√Hz) Close to Brownian noise floor (~ 30 µµµµg/√√√√Hz)

Signal @0.35 g

77 dB

0.35 g/ 10^(77/20)

29

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A 3-axis surface micromachined ∑∆∆∆∆ accelerometer Mark Lemkin, ISSCC pp. 202-203, 1997

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Sense Interface

� Differential sensing using one input voltage source Vs applied on the proof mass� One less than the common sensing schemes; eliminate the

sensed voltage offset due to mismatch of the voltage sources

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Input Common Mode FeedBack (ICMFB)

� ICMFB keeps the op-amp input common mode at a constant value, despite the variation of Cs, Cp, and Ci

ICMFB

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Digital Offset Trimming System

� Trim for the sensed voltage offset due to sensing capacitance mismatch

lecture 11: accelerometers (part ii)

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