lecture 6: branching cs 2011 fall 2014, dr. rozier

Lecture 6: Branching

CS 2011

Fall 2014, Dr. Rozier

LOGISTICS

Logistics

9/18 – Today

9/23 – Human Processor9/25 – Exam Review

9/30 – Midterm I

LADIES AND TIGERS

The Lady and the Tiger

• Doors containing either Ladies or Tigers


• Once again, you’ll have to tell Ladies from Tigers

• A new twist is being added.– Two doors– If a lady is in Room I, then the sign on the door is

true. If a tiger is in Room I, then the sign on the door is false.

– The opposite is true for Room II.

The Lady and the TigerQ1

Room ??

This room contains a

tiger.

Both rooms contain tigers

Room ??

The Lady and the TigerQ1Room II

Room I



• A new twist is being added.– Three doors!– One lady, TWO tigers– At most one of the signs is true


Room I

A tiger is in this room.

Room II

A lady is in this room. A tiger is in room II.

Room III


Room I Room II Room III



• A new twist is being added.– Three doors!– One lady, TWO tigers– The sign on the door of the room with the lady is

true. At least one of the other two signs is false!


Room I

A tiger is in room II.

Room II

A tiger is in this room. A tiger is in room I.

Room III


Room I Room II Room III

BRANCHING

Branching

• Conditional execution isn’t the only tool in our belt.

Branching

• Branches allow us to transfer control of the program to a new address.– b (<suffix>) <label>– bl (<suffix>) <label>

b startbl start

Branching

• Basic branches do not operate on registers.

• Typically we branch to an indicated LABEL, example:

MAIN:b END

END:b MAIN

Branching

• Branches are calculated by the assembler relative to the current address.– Allows branching +/- 32 Mbytes

• Branch stores the target address in the Program Counter

• Branch and link also stores the next address in the link register.

Branch (b)

• Branch, possibly conditionally, to a new address.

beq subroutine @ If Z=1, branch

• Good practice to use bal instead of b.

Branch with link (bl)

• Branch, possibly conditionally, to a new address.– Before the branch is complete, store the PC in the

LR.– Allows easy return from the branch.

bleq subroutine @ If Z=1, branch, saving the PC

A note on programs and memory

• What is a program?

Registers

• Each register holds a word (4 bytes).• Registers r0-r12 are general purpose.

Name Function Name Function

r0 General Purpose r8 General Purpose





r5 General Purpose r13 Stack Pointer

r6 General Purpose r14 Link Register

r7 General Purpose r15 Program Counter

The Memory Hierarchy

CPU + Control

Pipeline

Fetch

Decode

IssueInteger

Multiply

Floating Point

Load Store

Write Back

Branch with link (bl)

• How do we get back once we’ve saved the PC?

mov pc, lr

• Moves the contents of the link register to the program counter.

Implementing If Statements

• C code:if (i == j) f = g+h;else f = g - h;

• ARM code cmp r0, r1 @ Set flags via r0-r1 and discard

beq Elseadd r2, r3, r4 @ r2 = r3 + r4bal Exit

Else:sub r2, r3, r4 @ r2 = r3 + r4

Exit:

Implementing Loop Statements

• C code:while (i < j) i += 1;

• ARM code Loop:

cmp r0, r1bge Exitadd r0, r0, #1bal LoopExit:

i < j?

i=i+1

i<j

Exit

i>=j

Basic Blocks• A basic block is a sequence of instructions with

– No embedded branches (except at end)– No branch targets (except at beginning)

A compiler identifies basic blocks for optimization

An advanced processor can accelerate execution of basic blocks

ADVANCED CONTROL

What about a Case Statement?

• Say we have a case statement:switch(x) {

case 0: foo(); break;case 1: bar(); break;case 2: baz(); break;case 3: qux(); break;

}

Jump Tables

• Set up a portion of memory as such:

• If our case variable is stored in r0…– r0 << #2 is the index into our jump table of the

function address.

Memory Location Contents

0x???? + 0 address of foo

0x???? + 4 address of bar

0x???? + 8 address of baz

0x???? + 12 address of qux

Cases Statements as Jump Tables

(assume r0 holds the switch variable)

ldr r1, =jumptableldr pc, [r1, r0, lsl #2]

Wasn’t that easy?

Pseudo-Instructions

• Notice the use of:– ldr r0, =jumptable

• What is really going on here?

Hello World

string: .asciiz "Hello World!\n";

ldr r1, =string

swi 0

mov r7, #1

swi 0

Pseudo-Instructions

Code as we wrote it:

Disasembled code:

ldr r1, =string

swi 0

mov r7, #1

swi 0

0x8080 ldr r1, [pc, #8]

0x8084 svc 0x0

0x8088 mov r7 #1

0x808c svc 0x0

0x8090 muleq r1 r4 r0

This is weird…

• Let’s play with gdb…x/x 0x80900x8090 <_exit+8>: 0x00010094x/x 0x100940x10094 <string>: “Hello World!\nA\025”

So why does it show up as muleq?

• Representing instructions

– Condition Field• 0000 – EQ

– 0000 | 000000 | 0 | 0 |????|????|????| 1001|????

mul r1, r4, r0mul{<cond>}{S} rd, rm, rs

Cond 000000 A S Rd Rn Rs 1001 Rm

Instruc 0000 000000 0 0 ???? ???? ???? 1001 ????

Hex 0 0 0 1 0 0 9 4

Bin 0000 0000 0000 0001 0000 0000 1001 0100

So why does it show up as muleq?

• Representing instructions

mul r1, r4, r0mul{<cond>}{S} rd, rm, rsmul 0001, 0100, 0000

Cond 000000 A S Rd Rn Rs 1001 Rm

Instruc 0000 000000 0 0 ???? ???? ???? 1001 ????Hex 0 0 0 1 0 0 9 4

Bin 0000 0000 0000 0001 0000 0000 1001 0100

So what is this?

Code as we wrote it:

Disasembled code:

ldr r1, =string

swi 0

mov r7, #1

swi 0

0x8080 ldr r1, [pc, #8]

0x8084 svc 0x0

0x8088 mov r7 #1

0x808c svc 0x0

0x8090 muleq r1 r4 r0

The problem with immediates

• The fact that instructions, AND all their arguments, must take up only 32 bits limits the size of immediates to 1 byte.– Range 0 – 255.– Hello world was in 0x10094– PC was at 0x8088– Max offset with immediate value?

• 0x8088 + 0xFF = 0x8187

Enter, the Literal Pool0x8080 ldr r1, [pc, #8]

0x8084 svc 0x0

0x8088 mov r7 #1

0x808c svc 0x0

0x8090 00 01 00 94

Last instruction in basic block

Literal Pool

Basic Blocks• A basic block is a sequence of instructions with

– No embedded branches (except at end)– No branch targets (except at beginning)

A compiler identifies basic blocks for optimization

An advanced processor can accelerate execution of basic blocks

For next time

The Human Processor

lecture 6: branching cs 2011 fall 2014, dr. rozier

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