lecture: tunnel fet
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Lecture: Tunnel FET. Mark Cheung Department of Electrical and Computer Engineering, U niversity of Virginia, Charlottesville , VA 22904, USA. This lecture will cover:. Field-effect transistor (FET) review Motivation for TFET Device design and simulation Literature review - PowerPoint PPT PresentationTRANSCRIPT
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Lecture: Tunnel FET
Mark CheungDepartment of Electrical and Computer Engineering, University of Virginia, Charlottesville, VA 22904, USA
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This lecture will cover:Field-effect transistor (FET) review
Motivation for TFETDevice design and simulationLiterature reviewSimulation results
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Field-effect transistor (FET) reviewSwitch
On: ID is highOff: ID is low
Landauer Formula:
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Motivation
"Intel," 2011. Available: http://www.carthrottle.com/why-chemistry-dictates-an-electric-vehicle-future/
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Current-voltage (IV) curveSubthreshold Swing SS (mV/dec): Power P=(1/2)C+VdIloff
Ioff
Ion
~60 mV/dec
MOSFET IV Curve
≈ 60 mV/dec
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Tunnel Field Effect Transistor (TFET)
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Tunnel Field Effect Transistor (TFET)𝐼𝑑=
2𝑒h
𝑊 ∫𝐸 𝑐
𝑠
𝐸𝑣h𝑐
𝑇 ( 𝐸−𝑈 ) ( 𝑓 𝑠 ( 𝐸 )− 𝑓 𝑑 ( 𝐸 ) )𝑑𝐸
Off
On𝐸𝑐
𝐸𝑣
q∆
λ
ChannelSource Drain
𝑓 𝑠 ( 𝐸 )
Device design and simulation
µ1µ2
[𝛴 ]1
Source Drain
Gate
𝑉 𝐷𝑆𝐼𝐷𝑆
[𝛴 ]2[H]
Green Function :𝐺=(𝐸𝐼−𝐻−Σ 1−Σ 2) −18
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Graphene Nanoribbon (GNR)Subbands Transmission
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Relevant Functions (analytical)SS=
J. Knoch, S. Mantl and J. Appenzeller, "Impact of dimensionality on the performance of tunneling FETs: Bulk versus one-dimensional devices," ScienceDirect, vol. 51, pp. 572-78, 2007.
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Literature Review: MOSFET/TFET IV of different material system
A. M. Ionescu and H. Riel, "Tunnel field-effect transistors as energy-efficient electronics switches," Nature, vol. 479, pp. 329-337, 2011.
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Literature Review: varying gate overlap & differential voltage
Gate overlap improves SSwithout degrading Ion and Ioff
Differential voltage between top and bottom gatefor a double gate TFET correlates positively with Ion/Ioff
Fiori, G.; Iannaccone, G., "Ultralow-Voltage Bilayer Graphene Tunnel FET," Electron Device Letters, IEEE , vol.0, no.10, pp.1096,1098, Oct. 2009 doi: 10.1109/LED.2009.2028248
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Literature Review: varying drain-side gate underlap & drain doping
X. Yang, J. Chauhan, J. Guo, and K. Mohanram “Graphene tunneling FET and its applications in low-power circuit design,” VLSI, pp. 263-268, 2010
Drain-side gate underlap and drain doping reduce theambipolar IV characteristics without sacrificing Ion/Ioff and SS
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Result: varying channel width
Channel width varies inversely with SS and correlates
negatively (exponential) with Ion/Ioff
𝐼𝑑=2𝑒h
𝑊 ∫𝐸 𝑐
𝑠
𝐸𝑣h𝑐
𝑇 ( 𝐸−𝑈 ) ( 𝑓 𝑠 ( 𝐸 )− 𝑓 𝑑 ( 𝐸 ) )𝑑𝐸
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Result: varying channel width
0 1 2 3 4 5 6 7 80
50
100
150
200
250
10
100
1,000
10,000
100,000
1,000,000
f(x) = 302769526.815522 exp( − 2.04313423010723 x )R² = 0.979035191392143f(x) = 381.851552230154 exp( − 0.554216241290741 x )
R² = 0.96973176701034
SS (mV/dec)Exponen-tial (SS (mV/dec))Ion/Ioff
width (nm)
SS(m
V/de
c)
rati
o
Channel width varies inversely with SS andcorrelates negatively (exponential) with Ion/Ioff
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Results: varying channel length
Off
On𝐸𝑐
𝐸𝑣
q∆
λ
ChannelSource Drain
𝑓 𝑠 ( 𝐸 )
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Results varying channel length
0 20 40 60 80 100 120 140 160 1800
20
40
60
80
100
120
140
160
180
10
100
1,000
10,000
100,000f(x) = 30782.074189888 ln(x) − 70512.8689705967R² = 0.75305111300012
SS (mV/dec)Ion/IoffLogarithmic (Ion/Ioff)
length (nm)
SS (
mV/
dec)
Rat
io
Channel length varies inversely with SS andcorrelates positively (logarithmic) with Ion/Ioff
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Results: varying doping in contacts
Channel doping correlates positively with SS (exponential) andpositively with Ion/Ioff (exponential) up until doping of around 0.28eV
Off
On𝐸𝑐
𝐸𝑣
q∆
λ
ChannelSource Drain
𝑓 𝑠 ( 𝐸 )
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Results: varying doping in contacts
0.2 0.220.240.260.28 0.3 0.320.340.360.38 0.40
10
20
30
40
50
60
70
100
1,000
10,000
100,000
1,000,000
f(x) = 28593478.9493891 exp( − 33.0115368865097 x )
f(x) = 20.7079088523626 exp( 32.662483856812 x )R² = 0.926282537334885f(x) = 0.183571629263223 exp( 15.586879679726 x )R² = 0.88991528956433
SS (mV/dec)Exponential (SS (mV/dec))Ion/IoffExponential (Ion/Ioff)
doping (eV)
SS (
mV/
dec)
rati
oChannel doping correlates positively with SS (exponential) and
positively with Ion/Ioff (exponential) up until doping of around 0.28eV
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Results: varying drain bias
Drain bias correlates positively with SS (linear & weak)and negatively with Ion/Ioff (exponential)
Off
On𝐸𝑐
𝐸𝑣
q∆
λ
ChannelSource Drain
𝑓 𝑠 ( 𝐸 )
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Results: varying drain bias
0 0.05 0.1 0.15 0.2 0.250
2
4
6
8
10
12
1,000
10,000
100,000
1,000,000
f(x) = 366373.214026324 exp( − 26.5842129817516 x )R² = 0.946428573538974
SS (mV/dec)Ion/IoffExponential (Ion/Ioff)
vd (V)
SS (
mV/
dec)
rati
o
Drain bias correlates positively with SS (linear & weak)and negatively with Ion/Ioff (exponential)
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ConclusionSS of 6.4 mV/dec and Ion/Ioff of >25,000 were
obtained for length=40nm, width=5nm, vd=0.1 V, and doping=0.24eV.
Further analysis is required to balance the trade-offs among size, power, and performance.
In comparison to a MOSFET, high Ion/Ioff ratio and steep SS over several decades indicate GNR TFET’s superiority for ultra-low-voltage applications.
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Future directionLink experimental results with analytical
equationsAdjust simulation to account for experimental
challengesInclude scattering (inelastic & elastic)
Alternative TFET designs
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Appendix: Simulation Design (continue)Tight-binding Hamiltonian modelTFET setup:
Channel dopingTri-gate
Non-equilibrium green function (NEGF)Assumptions:
Room temperatureballistic transportelectrodes are infinite electron reservoirsteady state
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E : energy matrices from the electronic band structure
H : hamiltonian matrix : self energy matrices from the contacts
= , = : broadening matrices due to coupling with contacts f: fermi functions describing number of electrons
Electron density per unit energy
Appendix: NEGF
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Appendix: NEGF (continue)T(E)=Trace()
Average transmission at different energy U=
Potential energy effecting the DOS , and hence the transmission T)+)
Probability that an electron will be at an energy state E given the fermi level , and temperature T
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Appendix: Relevant functions (continue)SS=
J. Knoch, S. Mantl and J. Appenzeller, "Impact of dimensionality on the performance of tunneling FETs: Bulk versus one-dimensional devices," ScienceDirect, vol. 51, pp. 572-78, 2007.