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    Unit 7Multi-Level Gate Circuits /

    NAND and NOR GatesKu-Yaw Chang

    [email protected] Assistant Professor, Department of

    Computer Science and Information EngineeringDa-Yeh University

    mailto:[email protected]:[email protected]
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    22004/03/04 Fundamentals of Logic Design

    Contents7.1 Multi-Level Gate Circuits7.2 NAND and NOR Gates7.3 Design of Two-Level Circuits Using NAND

    and NOR Gates7.4 Design of Multi-Level NAND and NOR Gate

    Circuits7.5 Circuit Conversion Using Alternative Gate

    Symbols7.6 Design of Two-Level, Multiple-Output

    Circuits7.7 Multiple-Output NAND and NOR Circuits

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    32004/03/04 Fundamentals of Logic Design

    7.4 Design of Multi-Level NAND-and NOR-Gates Circuits

    Multi-Level NAND-gate circuitsSimplify the switching function to be realized.Design a multi-level circuit of AND and OR gates. The

    output gate must be OR. AND-gate outputs cannot beused as AND-gate inputs; OR-gate outputs cannot beused as OR-gate inputs.Number the levels starting with the output gate as

    level 1. Replace all gates with NAND gates, leavingall interconnections between unchanged. Leave theinputs to levels 2, 4, 6, unchanged. Invert anyliterals which appear as inputs to levels 1, 3, 5,

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    42004/03/04 Fundamentals of Logic Design

    Multi-Level NAND-gate circuits

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    52004/03/04 Fundamentals of Logic Design

    Contents7.1 Multi-Level Gate Circuits7.2 NAND and NOR Gates7.3 Design of Two-Level Circuits Using NAND

    and NOR Gates7.4 Design of Multi-Level NAND and NOR Gate

    Circuits7.5 Circuit Conversion Using Alternative Gate

    Symbols7.6 Design of Two-Level, Multiple-Output

    Circuits7.7 Multiple-Output NAND and NOR Circuits

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    72004/03/04 Fundamentals of Logic Design

    Alternative Gate Symbols

    AND, OR, NAND, and NOR gatesBased on DeMorgans law

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    82004/03/04 Fundamentals of Logic Design

    Alternative Gate Symbols

    Why alternative symbols?Facilitate the analysis and design of NAND and NORgate circuits

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    92004/03/04 Fundamentals of Logic Design

    NAND Gate Circuit Conversion

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    102004/03/04 Fundamentals of Logic Design

    Conversion to NOR Gates

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    112004/03/04 Fundamentals of Logic Design

    Conversion of AND-OR Circuit toNAND Gates

    Convert all AND gates to NAND gates Adding an inversion bubble at the output

    Convert all OR gates to NAND gates Adding inversion bubbles at the inputs

    An inverted output drives an inverted inputNo further action

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    122004/03/04 Fundamentals of Logic Design

    Conversion of AND-OR Circuit toNAND Gates

    A non-inverted gate output drives aninverted gate input or vice versa

    Insert an inverter

    A variable drives an inverted inputComplement the variable

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    132004/03/04 Fundamentals of Logic Design

    Conversion of AND-OR Circuit toNAND Gates

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    142004/03/04 Fundamentals of Logic Design

    Contents7.1 Multi-Level Gate Circuits7.2 NAND and NOR Gates7.3 Design of Two-Level Circuits Using NAND

    and NOR Gates

    7.4 Design of Multi-Level NAND and NOR GateCircuits7.5 Circuit Conversion Using Alternative Gate

    Symbols7.6 Design of Two-Level, Multiple-Output

    Circuits7.7 Multiple-Output NAND and NOR Circuits

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    152004/03/04 Fundamentals of Logic Design

    7.6 Design of Two-Level,Multiple-Output Circuits

    The realization of several functions of thesame variables

    A more economical realization

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    162004/03/04 Fundamentals of Logic Design

    Multi-Output Function

    Given Functions

    F1(A, B, C, D) = m(11, 12, 13, 14, 15)

    F2(A, B, C, D) = m(3, 7, 11, 12, 13, 15)

    F3(A, B, C, D) = m(3, 7, 12, 13, 14, 15)

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    172004/03/04 Fundamentals of Logic Design

    Separate Realizations

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    Multiple-Output Simplification

    F1 = AB + ACD

    F2 = ABC + CD

    F3 = ACD + AB

    AB: F 1 and F 3

    CD (F 2) can be replaced by ACD + ACD F2 = ABC + ACD + ACD

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    Comparison

    Gates GateInputs

    Level

    SeparateRealization 9 21 2

    Multiple-OutputRealization

    7 18 2

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    212004/03/04 Fundamentals of Logic Design

    Multiple-Output Simplification

    If several solutions are availableTry to minimize the total number of gatesrequiredChoose the one with minimum gates inputs

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    222004/03/04 Fundamentals of Logic Design

    Contents7.1 Multi-Level Gate Circuits7.2 NAND and NOR Gates7.3 Design of Two-Level Circuits Using NAND

    and NOR Gates7.4 Design of Multi-Level NAND and NOR Gate

    Circuits7.5 Circuit Conversion Using Alternative Gate

    Symbols

    7.6 Design of Two-Level, Multiple-OutputCircuits7.7 Multiple-Output NAND and NOR Circuits

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    7.7 Multiple-Output NAND andNOR Circuits

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    242004/03/04 Fundamentals of Logic Design

    Homework #1

    1. 7.12. 7.3

    3. 7.44. 7.85. 7.10

    6. 7.177. 7.198. 7.209. 7.2510. 7.26

    Paper Submission, due on March 22, 2004.Late submission will not be accepted.