manual indigo lgdc evaluation system main board …manfred ortmann 2008 10 14 pa 6.2 mycable01 2.2.1...
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Receiver: Info:M. CarstensBehrens mycable GmbH
Manual
Indigo
LGDC Evaluation System Main Board
Version PA 6.2 October 14, 2008
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http://www.fujitsu.com/emea/services/microelectronics
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Developer’s Manual for LGDC Main Board
SummaryThis manual provides detailed technical information for system architects, hardware and software developers, who work with the LGDC Main board revision PA06 for evaluation and development purpose.
Enclosures
None.
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Product Information
The LGDC Main board is developed to evaluate the functions of the graphic display controller MB88F332 also called Indigo from Fujitsu.
The MB88F332 is a 180nm embedded flash CMOS device specified for automotive requirements. Its functions are optimized for modularized incarapplications such as dashboards, HUD systems, CID ( central information display ) and RSE ( Rear Seat entertainment ) systems. The complete graphics processing works line based, so no expensive framebuffer memory is necessary. Additionally a set of 5V capable peripherals such as SMC, PWMs, ADCs is integrated. This allows the realization of very competitive systems.
For further details see datasheets of the MB88F332 and the other peripherals and manual of the Indigo board.
Revision History
Version Date Sign Description
PA 4.1 20080211 mo Create this document for revision PA4
PA 4.2 20080528 mo New picture from system
PA 6.2 20081014 mo Description for PCB revision PA6
Contact Information
mycable GmbHMichael CarstensBehrens( hardware and commercial )
Email [email protected]
Tel. +49 4321 55956 55
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Table of Contents1 OVERVIEW....................................................................................................................6
1.1 Manual Scope........................................................................................................61.2 Putting into Operation.............................................................................................6
2 LGDC MAIN BOARD .................................................................................................7
2.1 System Architecture...............................................................................................72.2 Function Units........................................................................................................9
2.2.1 LGDC Interface...........................................................................................102.2.2 Power Supply..............................................................................................192.2.3 Reset...........................................................................................................202.2.4 LEDs...........................................................................................................202.2.5 Push Buttons...............................................................................................212.2.6 Video Outputs..............................................................................................222.2.7 Stepper Motors............................................................................................262.2.8 Connectors..................................................................................................27
2.3 Hardware Variants............................................................................................322.4 Placement of Components...............................................................................332.5 Mechanical Dimensions....................................................................................352.6 Future Development.........................................................................................36
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1 Overview
1.1 Manual Scope
This manual provides detailed technical information about the LGDC Main board for system architects, hardware and software developers covering:
• System architecture description and users manual
• Hardware architecture
• Mechanical information
• References to further information like design data, data sheets, software documentation
It is the engineer’s reference for evaluation, system development and prototyping based on the module. This document covers all available hardware versions regarding their configuration options and revision state.
1.2 Putting into Operation
The LGDC FPGA board or LGDC Indigo Board has to be plugged with the interface connectors X500 and X501 in the connectors X300 and X301 on the LGDC Main board.
Do not plug the LGDC FPGA or Indigo board if the power supply is switched on !
Under this condition circuits can be damaged !
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2 LGDC Main Board
2.1 System Architecture
The system architecture of the LGDC Main board is shown in picture 21.
Pic. 21: LGDC Main board block diagram
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Pic. 22: LGDC Main board top side
Pic. 23: LGDC Main board bottom side
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2.2 Function Units
Function Unit Overview
– Power Supply
– LGDC Interface
– Status LEDs
– Push buttons
– Video outputs
– Stepper motors interfaces
– Different Interfaces
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2.2.1 LGDC Interface
Pic. 24: Connectors X300 and X301 for LGDC Module
Following table show the pin assignment of the LGDC interface connectors X300.
Pin Signal Function
1 VCC50 5.0 power supply for LGDC module
2 VCC50 5.0 power supply for LGDC module
3 VCC50 5.0 power supply for LGDC module
4 VCC50 5.0 power supply for LGDC module
5 GND Ground
6 GND Ground
7 GND Ground
8 GND Ground
9 RESET# Reset
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Pin Signal Function
10 NC Not connected
11 GND Ground
12 GND Ground
13 HOST_SCK I Host SPI interface clock
14 HOST_XCS I Host SPI interface – chip select
15 HOST_DO O Host SPI interface – data out
16 HOST_DI I Host SPI interface – data in
17 GND Ground
18 NC Not connected
19 LGDC_TRST_N JTAG TRST from X702
20 GND Ground
21 LGDC_TMS JTAG TMS from X702
22 LGDC_TCK JTAG TCK from X702
23 LGDC_TDI JTAG TDI from X702
24 LGDC_TDO JTAG TDO from X702
25 GND Ground
26 GND Ground
27 SPI0_SCK SPI interface
28 SPI0_XCS SPI interface
29 SPI0_DO SPI interface
30 SPI0_DI SPI interface
31 GND Ground
32 GND Ground
33 PWM_O14 Pulse width modulation signal
34 PWM_O15 Pulse width modulation signal
35 PWM_O12 Pulse width modulation signal
36 PWM_O13 Pulse width modulation signal
37 PWM_O6 Pulse width modulation signal
38 PWM_O7 Pulse width modulation signal
39 PWM_O4 Pulse width modulation signal
40 PWM_O5 Pulse width modulation signal
41 PWM_O2 Pulse width modulation signal
42 PWM_O3 Pulse width modulation signal
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Pin Signal Function
43 PWM_O0 Pulse width modulation signal
44 PWM_O1 Pulse width modulation signal
45 GND Ground
46 GND Ground
47 I2C_SCL I2C clock signal
48 I2C_SDA I2C data signal
49 GND Ground
50 GND Ground
51 SGA
52 SGO
53 GND Ground
54 GND Ground
55 NC Not connected
56 ADC_ALARM_0 ADC interface
57 GND Ground
58 GND Ground
59 ADC_AN0 ADC interface
60 ADC_AN1 ADC interface
61 GND Ground
62 GND Ground
63 ADC_AN2 ADC interface
64 ADC_AN3 ADC interface
65 GND Ground
66 GND Ground
67 ADC_AN4 ADC interface
68 ADC_AN5 ADC interface
69 GND Ground
70 GND Ground
71 ADC_AN6 ADC interface
72 ADC_AN7 ADC interface
73 GND Ground
74 GND Ground
75 GPIO0 General purpose I/O
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Pin Signal Function
76 GPIO1 General purpose I/O
77 GPIO2 General purpose I/O
78 GPIO3 General purpose I/O
79 GPIO4 General purpose I/O
80 GPIO5 General purpose I/O
81 GPIO6 General purpose I/O
82 GPIO7 General purpose I/O
83 GND Ground
84 GND Ground
85 SMC_1P5 Stepper motor control signal
86 SMC_2P5 Stepper motor control signal
87 SMC_1M5 Stepper motor control signal
88 SMC_2M5 Stepper motor control signal
89 GND Ground
90 GND Ground
91 SMC_1P4 Stepper motor control signal
92 SMC_2P4 Stepper motor control signal
93 SMC_1M4 Stepper motor control signal
94 SMC_2M4 Stepper motor control signal
95 GND Ground
96 GND Ground
97 SMC_1P3 Stepper motor control signal
98 SMC_2P3 Stepper motor control signal
99 SMC_1M3 Stepper motor control signal
100 SMC_2M3 Stepper motor control signal
101 GND Ground
102 GND Ground
103 SMC_1P2 Stepper motor control signal
104 SMC_2P2 Stepper motor control signal
105 SMC_1M2 Stepper motor control signal
106 SMC_2M2 Stepper motor control signal
107 GND Ground
108 GND Ground
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Pin Signal Function
109 SMC_1P1 Stepper motor control signal
110 SMC_2P1 Stepper motor control signal
111 SMC_1M1 Stepper motor control signal
112 SMC_2M1 Stepper motor control signal
113 GND Ground
114 GND Ground
115 SMC_1P0 Stepper motor control signal
116 SMC_2P0 Stepper motor control signal
117 SMC_1M0 Stepper motor control signal
118 SMC_2M0 Stepper motor control signal
119 GND Ground
120 GND Ground
121 GND Ground
122 VCC33 3.3 V power supply for LGDC module
123 GND Ground
124 VCC33 3.3 V power supply for LGDC module
125 GND Ground
126 VCC33 3.3 V power supply for LGDC module
127 GND Ground
128 VCC33 3.3 V power supply for LGDC module
Table 21: Pin assignment X300
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Following table show the pin assignment of the LGDC interface connectors X301.
Pin Signal Function
1 VCC50 5.0 V power supply for LGDC module
2 VCC50 5.0 V power supply for LGDC module
3 VCC50 5.0 V power supply for LGDC module
4 VCC50 5.0 V power supply for LGDC module
5 GND Ground
6 GND Ground
7 GND Ground
8 GND Ground
9 NC Not connected
10 NC Not connected
11 MODE2 Mode pin to LGDC module
12 MODE3 Mode pin to LGDC module
13 GND Ground
14 VPD
15 DISP_CLK
16 DISP_DE
17 GND Ground
18 GND Ground
19 NC Not connected
20 NC Not connected
21 NC Not connected
22 NC Not connected
23 NC Not connected
24 NC Not connected
25 NC Not connected
26 NC Not connected
27 NC Not connected
28 NC Not connected
29 NC Not connected
30 NC Not connected
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Pin Signal Function
31 NC Not connected
32 NC Not connected
33 NC Not connected
34 NC Not connected
35 GND Ground
36 GND Ground
37 TSIG1 TCON timing signal
38 TSIG0 TCON timing signal
39 TSIG3 TCON timing signal
40 TSIG2 TCON timing signal
41 TSIG5 TCON timing signal
42 TSIG4 TCON timing signal
43 TSIG7 TCON timing signal
44 TSIG6 TCON timing signal
45 TSIG9 TCON timing signal
46 TSIG8 TCON timing signal
47 TSIG11 TCON timing signal
48 TSIG10 TCON timing signal
49 GND Ground
50 GND Ground
51 PWM_O8 Pulse width modulation signal
52 PWM_O9 Pulse width modulation signal
53 PWM_O10 Pulse width modulation signal
54 PWM_O11 Pulse width modulation signal
55 GND Ground
56 FSEL
57 EHSYNC
58 EVSYNC
59 GND Ground
60 GND Ground
61 VO0_B1 Dig. video data signal from LGDC module
62 VO0_B0 Dig. video data signal from LGDC module
63 GND Ground
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Pin Signal Function
64 GND Ground
65 VO0_B3 Dig. video data signal from LGDC module
66 VO0_B2 Dig. video data signal from LGDC module
67 GND Ground
68 GND Ground
69 VO0_B5 Dig. video data signal from LGDC module
70 VO0_B4 Dig. video data signal from LGDC module
71 GND Ground
72 GND Ground
73 VO0_B7 Dig. video data signal from LGDC module
74 VO0_B6 Dig. video data signal from LGDC module
75 GND Ground
76 GND Ground
77 VO0_G1 Dig. video data signal from LGDC module
78 VO0_G0 Dig. video data signal from LGDC module
79 GND Ground
80 GND Ground
81 VO0_G3 Dig. video data signal from LGDC module
82 VO0_G2 Dig. video data signal from LGDC module
83 GND Ground
84 GND Ground
85 VO0_G5 Dig. video data signal from LGDC module
86 VO0_G4 Dig. video data signal from LGDC module
87 GND Ground
88 GND Ground
89 VO0_G7 Dig. video data signal from LGDC module
90 VO0_G6 Dig. video data signal from LGDC module
91 GND Ground
92 GND Ground
93 VO0_R1 Dig. video data signal from LGDC module
94 VO0_R0 Dig. video data signal from LGDC module
95 GND Ground
96 GND Ground
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Pin Signal Function
97 VO0_R3 Dig. video data signal from LGDC module
98 VO0_R2 Dig. video data signal from LGDC module
99 GND Ground
100 GND Ground
101 VO0_R5 Dig. video data signal from LGDC module
102 VO0_R4 Dig. video data signal from LGDC module
103 GND Ground
104 GND Ground
105 VO0_R7 Dig. video data signal from LGDC module
106 VO0_R6 Dig. video data signal from LGDC module
107 GND Ground
108 GND Ground
109 DISP_VSYNC Dig. video vertical sync signal from LGDC module
110 DISP_HSYNC Dig. video horicontal sync signal from LGDC module
111 GND Ground
112 GND Ground
113 VDD_RSDS
114 VDD_RSDS
115 VDD_RSDS
116 VDD_RSDS
117 GND Ground
118 GND Ground
119 GND Ground
120 GND Ground
121 GND Ground
122 VCCIN Input power supply to LGDC module
123 GND Ground
124 VCCIN Input power supply to LGDC module
125 GND Ground
126 VCCIN Input power supply to LGDC module
127 GND Ground
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Pin Signal Function
128 VCCIN Input power supply to LGDC module
Table 22: Pin assignment X301
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2.2.2 Power Supply
Pic. 25: Power supply connector X100
Connect the LGDC Main board with a power supply between 3.6 and 25 V DC and approximate 10 Watt at connector X100.
Be aware to use the correct polarity as shown in picture 26.
Pic. 26: Polarity of the LGDC Main board power supply connector
A protection against wrong polarity ( D109 ) and overcurrent ( F100 ) is implemented but a too high current can damage the power supply or can produce great heat !Do not plug the LGDC modul when the power supply is on !
The required voltages +3.3 V and +5.0 V will be regulated from the dual switching power regulator LT1940 from Linear Technologies ( U100 ) on the board.
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2.2.3 Reset
The micropower supply voltage supervisor TPS3307 from Texas Instruments monitors the regulated 3.3 V and 5 V, generates a low and a highactive reset signal for the system components and incorporates the manual reset from the reset button SW100.
LED D102 indicates the highactive reset signal. It is on if the reset signal is active.
Pic. 27: LEDs for status display
2.2.4 LEDs
LED D104 is on if the 3.3 V is present.
LED D105 is on if the 5.0 V is present.
LED D110 AUX X700 Pin 5 PWM03
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2.2.5 Push Buttons
Pic. 28: Push buttons
Push buttons SW701 to SW704 can be evaluate from the LGDC module by the signals PWM04 to PWM07.
A logical 0 indicates a pressed button.
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2.2.6 Video Outputs
Pic. 29: Digital video output X201
Pic. 210: Display connector X202
Pic. 211: DVI connector X203
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The digital video output from the LGDC module is connected to the connector X201 ( FTSH12001LDVEJP from Samtec ) and X202 ( 9637S33ATB ) for direct connection with a display, additionally connected to the transmitter SiI164CT64 ( U200 ) and the triple 8Bit high speed video digitaltoanalog converter ( DAC ) ADV7125JSTZ240 ( U201 ).
The transmitter SiI164CT64 from Silicon Image uses PanelLink® Digital technology to support displays ranging from VGA to UXGA resolutions ( 25 – 165 Mpps ) in a single link interface. The link interface of U200 is connected to DVII connector X200. The SiI164 transmitter has a highly flexible interface with either a 12bit mode ( ½ pixel per clock edge ) or 24bit mode 1pixel / clock input for true color ( 16.7 million ) support. In 24bit mode, the SiI164 supports single or dual edge clocking. In 12bit mode, the SiI164 supports dual edge single clocking or single edge dual clocking.The SiI164 can be programmed though the I2C interface. The multifunction address inputs A1, A2 and A3 of U200 are strapped by resistors R208, R209 and R211 to ground so the slave address for readings is 0x71 and the slave address for writings is 0x70. The SiI164 support receiver and hot plug detection.
The triple 8Bit high speed video digitaltoanalog converter ( DAC ) ADV7125JSTZ240 from Analog Devices converts the digital video output signal from the LGDC to an analog video signal. The output from U201 is connected to DVII connector X200.
The clock from the video output will be distributed from the zero delay buffer IDT23051DCGI ( U202 ). So the phase relation between clock and data signales are independent from the configuration.
The AD5241 from Analog Devices ( U203 ) provide a 256position, digitally controlled variable resistor (VR) device. Wiper position programming defaults to midscale at system power ON. Once powered, the VR wiper position is programmed by an I2C compatible 2wire serial data interface.It has available two extra programmable logic outputs O1 and O2. These outputs can be used to control a display at connector X202. The address inputs A0 and A1 of U203 are strapped by resistors R212 and R213 to ground so the slave address for readings is 0x59 and the slave address for writings is 0x58.
With U203 the precision shunt regulator LMV431 from National ( D201 ) can be justified and so the signal LEDCTRL for a display at connector X202. .
Following table show the pin assignment of connector X201.
Pin Signal Function
1 GND Ground
2 GND Ground
3 VO0_B0 Digital RGB output 0 Data blue
4 VO0_B1 Digital RGB output 1 Data blue
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Pin Signal Function
5 VO0_B2 Digital RGB output 2 Data blue
6 VO0_B3 Digital RGB output 3 Data blue
7 VO0_B4 Digital RGB output 4 Data blue
8 VO0_B5 Digital RGB output 5 Data blue
9 VO0_B6 Digital RGB output 6 Data blue
10 VO0_B7 Digital RGB output 7 Data blue
11 VO0_G0 Digital RGB output 0 Data green
12 VO0_G1 Digital RGB output 1 Data green
13 VO0_G2 Digital RGB output 2 Data green
14 VO0_G3 Digital RGB output 3 Data green
15 VO0_G4 Digital RGB output 4 Data green
16 VO0_G5 Digital RGB output 5 Data green
17 VO0_G6 Digital RGB output 6 Data green
18 VO0_G7 Digital RGB output 7 Data green
19 VCC33 + 3.3 V
20 VCC33 + 3.3 V
21 VCC33 + 3.3 V
22 VCC33 + 3.3 V
23 VO0_R0 Digital RGB output 0 Data red
24 VO0_R1 Digital RGB output 1 Data red
25 VO0_R2 Digital RGB output 2 Data red
26 VO0_R3 Digital RGB output 3 Data red
27 VO0_R4 Digital RGB output 4 Data red
28 VO0_R5 Digital RGB output 5 Data red
29 VO0_R6 Digital RGB output 6 Data red
30 VO0_R7 Digital RGB output 7 Data red
31 HSYNC0 Video output interface horizontal sync output
32 VSYNC0 Video output interface vertical sync output
33 DE0 DE / CSYNC
34 NC Not connected
35 NC Not connected
36 VO0_CLK_RGBD Video output interface dot clock output
37 I2C_SCL0 I2C interface 0 SCL
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Pin Signal Function
38 I2C_SDA0 I2C interface 0 SDA
39 GND Ground
40 GND Ground
Table 24: Pin assignment X201
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Following table show the pin assignment of connector X202.
Pin Signal Function
1 GND Ground
2 VCC33 + 3.3 V
3 PWCTRL
4 LEDCTRL
5 VO0_DE0 DE / CSYNC
6 VSYNC0 Video output interface vertical sync output
7 HSYNC0 Video output interface horizontal sync output
8 VO0_CLK_LCD
9 VO0_R0 Digital RGB output 0 Data red
10 VO0_R1 Digital RGB output 1 Data red
11 VO0_R2 Digital RGB output 2 Data red
12 VO0_R3 Digital RGB output 3 Data red
13 VO0_R4 Digital RGB output 4 Data red
14 VO0_R5 Digital RGB output 5 Data red
15 VO0_R6 Digital RGB output 6 Data red
16 VO0_R7 Digital RGB output 7 Data red
17 VO0_G0 Digital RGB output 0 Data green
18 VO0_G1 Digital RGB output 1 Data green
19 VO0_G2 Digital RGB output 2 Data green
20 VO0_G3 Digital RGB output 3 Data green
21 VO0_G4 Digital RGB output 4 Data green
22 VO0_G5 Digital RGB output 5 Data green
23 VO0_G6 Digital RGB output 6 Data green
24 VO0_G7 Digital RGB output 7 Data green
25 VO0_B0 Digital RGB output 0 Data blue
26 VO0_B1 Digital RGB output 1 Data blue
27 VO0_B2 Digital RGB output 2 Data blue
28 VO0_B3 Digital RGB output 3 Data blue
29 VO0_B4 Digital RGB output 4 Data blue
30 VO0_B5 Digital RGB output 5 Data blue
31 VO0_B6 Digital RGB output 6 Data blue
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Pin Signal Function
32 VO0_B7 Digital RGB output 7 Data blue
33 LCD_RESET#
34 GND Ground
35 GND Ground
Table 24: Pin assignment X202
2.2.7 Stepper Motors
Pic. 212: Stepper motor connectors X500, X501 and X502
X500, X501 and X502 are the connectors for three stepper motor modules.
Each stepper motor module has two stepper motors and a three color LED to light the pointer from the inside stepper motor.
The pointer from the outside stepper motor will be light each with two three color LEDs on the main board ( D512 – D515, D522 and D523 ).
The instruments will be lighted each with six LEDs ( D500 – D521 ).
The stepper motors and the instrument backlight will be controlled direct from the LGDC module.
Each three color LED will be controlled from a RGB LED driver with high current boost DCDC converter LP3931 from National ( U504 – U506 ) which will be controlled through the SPI interface from the LGDC module.
The supply voltage between 2.65 and 2.9 V for internal circuit of the LP3931 will be regulated from the regulator LTC1763CS8 from Linear Technologies ( U503 ).
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Following table show the pin assignment of connectors X500, X501 and X502.
Pin Signal X500 Signal X501 Signal X502 Function
1 SM0_N0_RED SM1_N0_RED SM2_N0_RED Control signal for red LED
2 VCCRGB VCCRGB VCCRGB Power supply for LEDs
3 SM0_N0_GREEN SM1_N0_GREEN SM2_N0_GREEN Control signal for green LED
4 SM0_N0_BLUE SM1_N0_BLUE SM2_N0_BLUE Control signal for blue LED
5 SMC_1M1 SMC_1M3 SMC_1M5 Control signal for stepper motor m
6 SMC_2M1 SMC_2M3 SMC_2M5 Control signal for stepper motor m
7 SMC_1P1 SMC_1P3 SMC_1P5 Control signal for stepper motor m
8 SMC_2P1 SMC_2P3 SMC_2P5 Control signal for stepper motor m
9 SMC_1M0 SMC_1M2 SMC_1M4 Control signal for stepper motor n
10 SMC_2M0 SMC_2M2 SMC_2M4 Control signal for stepper motor n
11 SMC_1P0 SMC_1P2 SMC_1P4 Control signal for stepper motor n
12 SMC_2P0 SMC_2P2 SMC_2P4 Control signal for stepper motor n
Table 28: Pin assignment X500, X501 and X502
2.2.8 Connectors
Pic. 213: Connectors X700, X702, X703 and X705
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Following table show the pin assignment of connector X700.
Pin Signal Function
1 NC Not used
2 PWM_O0 Pulse Width modulation signal
3 PWM_O1 Pulse Width modulation signal
4 PWM_O2 Pulse Width modulation signal
5 PWM_O3 Pulse Width modulation signal
6 PWM_O4 Pulse Width modulation signal
7 PWM_O5 Pulse Width modulation signal
8 PWM_O6 Pulse Width modulation signal
9 PWM_O7 Pulse Width modulation signal
10 PWM_O8 Pulse Width modulation signal
11 PWM_O9 Pulse Width modulation signal
12 PWM_O10 Pulse Width modulation signal
13 PWM_O11 Pulse Width modulation signal
14 PWM_O12 Pulse Width modulation signal
15 NC Not connected
16 NC Not connected
17 NC Not connected
18 NC Not connected
19 GND Ground
20 GND Ground
Table 29: Pin assignment X700
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Manfred OrtmannApproved Checked Date Revision Storage
Manfred Ortmann 20081014 PA 6.2 Mycable01
Pic. 214: Connector X701
Following table show the pin assignment of connector X701.
Pin Signal Function
1 VCC33 3.3 V power supply
2 VCC33 3.3 V power supply
3 RESET# Reset signal
4 VCC50 5.0 V power supply
5 GPIO0 General purpose I/O
6 GPIO1 General purpose I/O
7 GPIO2 General purpose I/O
8 GPIO3 General purpose I/O
9 GPIO4 General purpose I/O
10 EHSYNC
11 EVSYNC
12 FSEL
13 SGA O Sound signal
14 SGO O Sound signal
15 GND Ground
16 GND Ground
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Table 210: Pin assignment X701
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Following table show the pin assignment of connectors X702
Pin Signal Function
1 VCC33 3.3 V power supply
2 VCC33 3.3 V power supply
3 LGDC_TRST_N JTAG TRST
4 NC Not used
5 LGDC_TMS JTAG TMS
6 LGDC_TCK JTACK TCK
7 LGDC_TDI JTAG TDI
8 LGDC_TDO JTAG TDO
9 GND Ground
10 GND Ground
Table 211: Pin assignment X702
Following table show the pin assignment of connectors X703
Pin Signal Function
1 I2C_SCL
2 GND Ground
3 I2C_SDA
4 NC Not connected
5 HOST_DO*
6 NC Not connected
7 HOST_SCK
8 HOST_DI*
9 HOST_XCS
10 GND Ground
Table 212: Pin assignment X703
FUJITSU PROPRIETARY AND CONFIDENTIAL
Preliminary34(41)
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Manfred OrtmannApproved Checked Date Revision Storage
Manfred Ortmann 20081014 PA 6.2 Mycable01
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Pic. 215: Connector X704
Following table show the pin assignment of connectors X704
Pin Signal Function
1 VCC33 3.3 V power supply
2 VCC33 3.3 V power supply
3 TSIG0 TCON timing signal
4 TSIG1 O TCON timing signal
5 TSIG2 O TCON timing signal
6 TSIG3 O TCON timing signal
7 TSIG4 O TCON timing signal
8 TSIG5 O TCON timing signal
9 TSIG6 O TCON timing signal
10 TSIG7 O TCON timing signal
11 TSIG8 O TCON timing signal
12 TSIG9 O TCON timing signal
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Pin Signal Function
13 TSIG10 O TCON timing signal
14 TSIG11 O TCON timing signal
15 NC Not connected
16 NC Not connected
17 NC Not connected
18 NC Not connected
19 GND Ground
20 GND Ground
Table 213: Pin assignment X704
Following table show the pin assignment of connector X705
Pin Signal Function
1 ADC_AN1 ADC input
2 ADC_AN0 ADC input
3 ADC_AN3 ADC input
4 ADC_AN2 ADC input
5 ADC_AN5 ADC input
6 ADC_AN4 ADC input
7 ADC_AN7 ADC input
8 ADC_AN6 ADC input
9 GND Ground
10 ADC_ALARM_0 ADC signal
Table 214: Pin assignment X705
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2.3 Hardware Variants
Prototypes from the LGDC Main Board have Version PA4.
Now this version PA6 is available and no variants are forseen.
2.4 Placement of Components
Pictures with a better resolution are available as separate document.
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Pic. 216: LGDC Main board placement top side
FUJITSU PROPRIETARY AND CONFIDENTIAL
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Pic. 217: LGDC Main board placement bottom side
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2.5 Mechanical Dimensions
The LGDC Main board has a size of 300.0 x 200.0 mm.
A picture with a better resolution is available as separate document.
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2.6 Future Development
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