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Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4 March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org Archive Session 7 March 5 - 8, 2017 Hilton Phoenix / Mesa Hotel Mesa, Arizona © 2017 BiTS Workshop Image: tonda / iStock

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  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Archive – Session 7

    March 5 - 8, 2017

    Hilton Phoenix / Mesa Hotel

    Mesa, Arizona

    © 2017 BiTS Workshop – Image: tonda / iStock

  • BiTS 2017

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Copyright Notice

    The presentation(s)/poster(s) in this publication comprise the Proceedings of the 2017 BiTS Workshop. The content reflects the opinion of the authors and their respective companies. They are reproduced here as they were presented at the 2017 BiTS Workshop. This version of the presentation or poster may differ from the version that was distributed in hardcopy & softcopy form at the 2017 BiTS Workshop. The inclusion of the presentations/posters in this publication does not constitute an endorsement by BiTS Workshop or the workshop’s sponsors. There is NO copyright protection claimed on the presentation/poster content by BiTS Workshop. However, each presentation/poster is the work of the authors and their respective companies: as such, it is strongly encouraged that any use reflect proper acknowledgement to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author(s) or their companies. The BiTS logo and ‘Burn-in & Test Strategies Workshop’ are trademarks of BiTS Workshop. All rights reserved.

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    BiTS Workshop 2017 Schedule

    Session

    Session Chair

    Solutions Day Wednesday March 8 - 8:00 am

    Teaming Up

    "Applying FEA Simulation for Test Interface Unit" Jason Koh - Test Tooling Solutions Group

    "BI RHINO Handling Solution" Yaniv Raz- Intel Corporation

    "Optical Device Testing at Wafer Level and Package Devices" Carl Kasinski – Aehr

    "Fan-in WLCSP Test Requirements" Mike Frazier - Mike Frazier

    7 Mike Ramsey

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Fan-In WLCSP Test

    Strategy

    Mike Frazier

    Xcerra Corporation

    BiTS Workshop

    March 5 - 8, 2017

    Conference Ready mm/dd/2014

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Contents

    • WLCSP Market Overview

    • Changes in the Industry (Inflection Point)

    • Post Saw Test Process Description

    • Evaluation Summary

    • Conclusion

    Fan-In WLCSP Test Strategy 5

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Fan Out WLCSP

    Fan-In WLCSP Test Strategy 6

    • Definition

    – Fan out implies that the ball grid array is

    larger than the die

    – Die is encapsulated in molding with RDL

    layer covering die AND molding

    – Package sizes up to 25mm X 25 mm today

    • Advantages

    – Multi-chip and/or passive integration possible

    – Lower cost and smaller package compared

    to FCBGA

    – Larger area for contact balls

    • Disadvantages

    – Higher cost and larger die than FI-WLCSP

    – Yield (associated with placement accuracy)

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Fan-In WLCSP

    • Definition

    – Fan in implies that the contact balls fit within the die size

    – Bare die or encapsulated up to 7mm X 7mm

    • Advantages

    – Smallest possible package size (X,Y and Z dimensions)

    – Lowest possible packaging cost (No Substrate – RDL)

    – High performance (no bond wires, short signal length, low cap.)

    • Disadvantages

    – Limited pin count (space for contact balls)

    – Reliability (chipping, cracks, shipping….)

    – Single die, no support for passives

    Fan-In WLCSP Test Strategy 7

    Fan In WLCSP devices make up 30%

    of packages in cell phone today

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Fan In Market Summary

    • Fan in WLCSP market is significantly larger than FO-

    WLCSP

    – RF Transceivers - PMIC

    – Baseband - RF Power amps

    – Touch controllers - MEM’s

    • End applications

    – Cell Phones - Automotive

    – Tablets - Wearables

    – IOT - more

    • Fine Pitch

    – 0.4 mm ball pitch is typical

    – 0.3mm is leading edge for “direct to board”

    – 0.2mm is leading edge for substrate placement

    Fan-In WLCSP Test Strategy 8

    CAGR ~9%

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Quality Demand of the Industry

    Fan-In WLCSP Test Strategy 9

    • Automotive has been traditionally the driver

    for low defect requirements

    • Consumer devices had less stringent quality

    standards…but this has changed

    Drive to near zero defect parts per million (PPM)

    defect parts per billion (PPB)

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Traditional Process Flow

    Fan-In WLCSP Test Strategy

    Wafer Saw T&R with vision

    Inspection

    Wafer Test

    10

    Challenges:

    • Test at start of backend processing

    • Device picking and Saw process after test

    Source: Microfab

    http://www.google.com/url?sa=i&rct=j&q=&esrc=s&frm=1&source=images&cd=&cad=rja&uact=8&docid=-invPyl7oeWciM&tbnid=9mD7Ja6D2s94CM:&ved=0CAUQjRw&url=http://www.inseto.co.uk/products/adt-dicingandscribing.htm&ei=RqzZU5OLMIaMyAT1y4LoCA&bvm=bv.72185853,d.aWw&psig=AFQjCNEECiZEBkqOYH5lYJT61IXGRNYeTQ&ust=1406860600527520http://www.google.com/url?sa=i&rct=j&q=&esrc=s&frm=1&source=images&cd=&cad=rja&uact=8&docid=39rIqVCS2YSfZM&tbnid=_QG42QH0KIdtqM:&ved=0CAUQjRw&url=http://dicing-solutions.com/&ei=M6rZU4vWA42jyASBuoKAAQ&bvm=bv.72185853,d.aWw&psig=AFQjCNEui8dkH7ALP8h9X51GGYvvg7iLAQ&ust=1406860166210358

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Post Saw Test Advantages

    Fan-In WLCSP Test Strategy

    Tape & Reel with

    Vision Inspection

    Singulated Device Test Wafer Saw

    11

    True Final Test of singulated WLCSP devices • Improved Quality

    • Test Process moved to end of back end processing (PST)

    • RMA / device retest • Same retest capability as production test

    http://www.google.com/url?sa=i&rct=j&q=&esrc=s&frm=1&source=images&cd=&cad=rja&uact=8&docid=2HqzGtitc2TBqM&tbnid=lkAJyppNLpQqUM:&ved=0CAUQjRw&url=http://news.thomasnet.com/fullstory/PCB-Electrical-Test-System-handles-3D-packages-618651&ei=_6_ZU_8fg5jIBJ23grAF&bvm=bv.72185853,d.aWw&psig=AFQjCNGU2R5p-WpJHQTnSrY_6Mpjo-PzLQ&ust=1406861670028669http://www.google.com/url?sa=i&rct=j&q=&esrc=s&frm=1&source=images&cd=&cad=rja&uact=8&docid=Ms-ST7KrG_YI3M&tbnid=DTnX-_VsggqspM:&ved=0CAUQjRw&url=http://www.smtnet.com/news/index.cfm?fuseaction=view_news&news_id=10036&ei=srDZU6rMCcyxyASaoYHYCw&bvm=bv.72185853,d.aWw&psig=AFQjCNFKTvbuqZqtn2Ivt3GghhV_u9tW7A&ust=1406861768106196http://www.google.com/url?sa=i&rct=j&q=&esrc=s&frm=1&source=images&cd=&cad=rja&uact=8&docid=-invPyl7oeWciM&tbnid=9mD7Ja6D2s94CM:&ved=0CAUQjRw&url=http://www.inseto.co.uk/products/adt-dicingandscribing.htm&ei=RqzZU5OLMIaMyAT1y4LoCA&bvm=bv.72185853,d.aWw&psig=AFQjCNEECiZEBkqOYH5lYJT61IXGRNYeTQ&ust=1406860600527520http://www.google.com/url?sa=i&rct=j&q=&esrc=s&frm=1&source=images&cd=&cad=rja&uact=8&docid=39rIqVCS2YSfZM&tbnid=_QG42QH0KIdtqM:&ved=0CAUQjRw&url=http://dicing-solutions.com/&ei=M6rZU4vWA42jyASBuoKAAQ&bvm=bv.72185853,d.aWw&psig=AFQjCNEui8dkH7ALP8h9X51GGYvvg7iLAQ&ust=1406860166210358

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Post Saw Test Process Steps

    (Device Pick)

    • Input from sawn Film frame or Tape and

    Reel

    • Device Placement onto test “substrate” – InCarrier, glass wafer, vacuum chuck….

    Fan-In WLCSP Test Strategy 12

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    InCarrier Features and benefits

    • Easy handling of hundreds of

    singulated WLCSP devices in a strip

    format

    o Mechanical alignment for highest accuracy

    o Device retention exceed “drop test”

    o Supports Lots on hold

    • Improved throughput with 100% touch

    efficiency

    • Supports Full Tri-temp test

    environment

    • Handling WLCSP for Engineering

    o Device handling for characterization

    o Burn-in / Environmental

    Fan-In WLCSP Test Strategy 13

    Up to 300 devices / InCarrier

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Post Saw Test Process Steps

    (Device Test)

    • Present singulated devices to ATE test – Strip Handlers, Probers

    • Test is the most expensive process step in back

    end processing – Desire is to have highest possible utilization

    Fan-In WLCSP Test Strategy 14

    InStrip with MEM’s stimulus

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Post Saw Test Process Steps

    (Tape and Reel) • Remove tested singulated devices for test

    “substrate” for placement into T+R – Device Rotation

    – Laser Mark

    – Mark Inspection

    – Sidewall Inspection

    – Ball side Inspection

    – Tape and reel

    • Pre and post seal inspection

    Fan-In WLCSP Test Strategy 15

    10u crack detection capability

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Summary of Results

    • System Validation on OSAT floor – ESD, safety, operational validation passed

    • Correlation achieved to existing probe results

    • Large sample run of parts from T+R – Reject level detected at 500PPM during first pass

    – Looped sample of units 4 times with 0 rejects detected

    • Demonstrated 14% higher test cell throughput

    compared to existing probe solution

    Fan-In WLCSP Test Strategy 16

    Reel InCarrier™

    Carrier Singulated

    Devices

    InCarrier™

    Carrier

  • Teaming Up - Handler / Test Cell BiTS 2017 Session 7 Presentation 4

    March 5-8, 2017 Burn-in & Test Strategies Workshop www.bitsworkshop.org

    Conclusion

    Fan-In WLCSP Test Strategy

    Quality demand is changing the way people will

    test WLCSP devices.

    New process flow eliminates test escapes

    created by singulation process

    – Enables true Final Test of WLCSP devices

    Proven Gentle and reliable handling of

    singulated WLCSP packages

    Improved test cell efficiency

    Flexibility for wide range of applications

    17