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May 2010 Tian-Wei Huang, National Taiwan University doc.: IEEE 802.11-10/0497r0 Submission 60-GHz RF System Performance Optimization Date: 2010-05-17 Authors: Name Affiliations Address Phone email Tian-Wei Huang National Taiwan University No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.) +886-2-33665084 [email protected] Liang-Hung Lu National Taiwan University No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.) +886-2-33663608 [email protected] Huei Wang National Taiwan University No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.) +886-2-33663637 [email protected] Ruey-Beei Wu National Taiwan University No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.) +886-2-33663630 [email protected] Juinn-Horng Deng Yuan Ze University 135 Yuan-Tung Road, Chung- Li, 32003, Taiwan(R.O.C.) +886-3-463-8800 [email protected] James Wang MediaTek No.1, Dusing Rd. 1, Hsinchu Science Park, Hsin-Chu, Taiwan 30078, R.O.C. +886-3-567-0766 [email protected] Vish Ponnampalam Media Tek No.1, Dusing Rd. 1, Hsinchu Science Park, Hsin-Chu, Taiwan 30078, R.O.C. +886-3-567-0766 [email protected] om Alvin Hsu Media Tek No.1, Dusing Rd. 1, Hsinchu Science Park, Hsin-Chu, Taiwan 30078, R.O.C. +886-3-567-0766 [email protected]

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  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    60-GHz RF System Performance Optimization

    Date: 2010-05-17

    Authors:Name Affiliations Address Phone email

    Tian-Wei Huang National Taiwan University

    No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.)

    +886-2-33665084 [email protected]

    Liang-Hung Lu National Taiwan University

    No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.)

    +886-2-33663608 [email protected]

    Huei Wang National Taiwan University

    No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.)

    +886-2-33663637 [email protected]

    Ruey-Beei Wu National Taiwan University

    No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan(R.O.C.)

    +886-2-33663630 [email protected]

    Juinn-Horng Deng Yuan Ze University

    135 Yuan-Tung Road, Chung-Li, 32003, Taiwan(R.O.C.)

    +886-3-463-8800 [email protected]

    James Wang MediaTek No.1, Dusing Rd. 1, Hsinchu Science Park, Hsin-Chu, Taiwan 30078, R.O.C.

    +886-3-567-0766 [email protected]

    Vish Ponnampalam Media Tek No.1, Dusing Rd. 1, Hsinchu Science Park, Hsin-Chu, Taiwan 30078, R.O.C.

    +886-3-567-0766 [email protected]

    Alvin Hsu Media Tek No.1, Dusing Rd. 1, Hsinchu Science Park, Hsin-Chu, Taiwan 30078, R.O.C.

    +886-3-567-0766 [email protected]

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Abstract

    • This presentation proposes two techniques to minimize the impact of RF impairments on the performance of 60-GHz multi-gigabit system.

    • An example of 60-GHz 65-nm CMOS power amplifier pre-distortion linearizer is proposed for the optimization of multi-gigabit RF system linearity.

    • A 60-GHz sub-harmonic local oscillator topology is also proposed for the 65-nm CMOS phase noise optimization.

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Outline

    • Introduction• 65-nm CMOS PA linearity optimization• 65-nm CMOS phase noise optimization• Conclusions• References

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Introduction

    SwitchBPF

    BasebandReceiver

    LNA

    PA

    LocalOscillator

    LPF

    LPFBaseband

    Transmitter

    BasebandRF SiP

    Antenna57-66 GHz

    Rx

    Tx

    RF

    RF SoC

    LOLO/2LO/4

    Linearizer

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Modified Rapp PA Modeling [1]

    • Input signal x(t) to an amplifier produces output signal y(t):

    [ ] [ ]

    [ ]PM)-(AM distortion phase theis ))((

    AM)-(AM distortion (gain) amplitude theis )(where

    ))(()(2cos)())(2cos()()(

    tAtAG

    tAttftAGy(t)ttftAtx

    c

    c

    Ψ

    Ψ++=+=

    θπθπ

    level saturation theis factor smoothness theis

    signalgain small theis where

    1

    )(21

    2

    sat

    ss

    sat

    Asg

    AgA

    AgAG

    ⎟⎟

    ⎜⎜

    ⎛⎟⎟⎠

    ⎞⎜⎜⎝

    ⎛+

    =

    ⎟⎟⎠

    ⎞⎜⎜⎝

    ⎛⎟⎟⎠

    ⎞⎜⎜⎝

    ⎛+

    =Ψ2

    1

    1

    )(q

    q

    A

    AA

    β

    α

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    65nm CMOS Standard PA [1]

    AM-AM parametersg = 4.65Asat = 0.58s = 0.81

    AM-PM parametersa = 2560b = 0.114q1 = 2.4q2 = 2.3

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    65nm CMOS NTU PA AM-AMVDD 1V

    g=8.5, s=1.2 ,Asat=1.7

    OP1dB = 10.8 dBm

    Psat = 14.3 dBm

    g is the small signal gain

    s is the smoothness factor

    Asat is the saturation level

    12 2

    ( )

    1s s

    sat

    AG A g

    gAA

    =⎛ ⎞⎛ ⎞⎜ ⎟+ ⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

    -30 -25 -20 -15 -10 -5 0 5 10-10

    -5

    0

    5

    10

    15

    20

    Out

    put P

    ower

    (dB

    m)

    Input Power(dBm)

    Pout_Rapp Model Pout_Simulation Power Gain

    PA simulation is using ADS and CMOS foundry model

    Gai

    n (d

    B)

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    q1=4.4 ,

    q2=3.0 ,

    a=8000 ,

    B=0.125

    65nm CMOS NTU PA AM-PMVDD 1V

    1

    2( )

    1

    q

    q

    AAA

    α

    β

    Ψ =⎛ ⎞⎛ ⎞+⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

    -30 -25 -20 -15 -10 -5 0 5 10-2

    -1

    0

    1

    2

    3

    4

    5

    6

    7

    8

    9

    10

    Norm

    alize

    d P

    hase D

    isto

    rtio

    n in D

    egre

    e

    Input Power (dBm)

    Phase Distortion in Degree_Modified Rapp Model Phase Distortion in Degree_Simulation

    PA simulation is using ADS and CMOS foundry model

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    65nm CMOS NTU PA with Linearizer AM-AMVDD 1V

    g=5.8, s=1.35 ,Asat=1.75

    OP1dB = 12.5 dBm

    Psat = 14.3 dBmg is the small signal gain

    s is the smoothness factor

    Asat is the saturation level

    12 2

    ( )

    1s s

    sat

    AG A g

    gAA

    =⎛ ⎞⎛ ⎞⎜ ⎟+ ⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

    -30 -25 -20 -15 -10 -5 0 5 10-10

    -5

    0

    5

    10

    15

    20

    Out

    put P

    ower

    (dB

    m)

    Input Power(dBm)

    Pout Rapp Pout Simulation Power Gain

    PA simulation is using ADS and CMOS foundry model

    Gai

    n (d

    B)

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    q1=4.5 ,

    q2=3.2 ,

    a=5000 ,

    B=0.125

    65nm CMOS NTU PA With Linearizer AM-PMVDD 1V

    1

    2( )

    1

    q

    q

    AAA

    α

    β

    Ψ =⎛ ⎞⎛ ⎞+⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

    -30 -25 -20 -15 -10 -5 0 5 10-2

    -1

    0

    1

    2

    3

    4

    5

    6

    7

    8

    9

    10

    Norm

    alize

    d P

    hase D

    isto

    r

    Input Power (dBm)

    tion in D

    egre

    e Phase Distortion in Degree_Modified Rapp Model Phase Distortion in Degree_Simulation

    PA simulation is using ADS and CMOS foundry model

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    BER Peformance

    SC 16-QAM, 3Gbps

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    EVM Performance

    SC 16-QAM, 3Gbps

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    65nm CMOS NTU PA IMD3

    -30 -25 -20 -15 -10 -5 0 5 10-40-35-30-25-20-15-10-505

    101520

    Gai

    n (d

    B) &

    IMD

    3 (d

    Bc)

    Input Power(dBm)

    Simulated IMD3 With Linearizer Simulated IMD3 W/O Linearizer Simulated Power Gain

    Two tone frequency : 60GHz , 60.5GHzPA simulation is using ADS and CMOS foundry model

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Comparison of IMD3 for 65nm CMOS NTU PAWithout Linearizer

    -30 -25 -20 -15 -10 -5 0 5 10-50

    -45

    -40

    -35

    -30

    -25

    -20

    -15

    -10

    -5

    0

    IMD

    3 (d

    Bc)

    Input Power(dBm)

    Rapp model IMD3 W/0 Linearizer Simulated IMD3 W/O Linearizer

    Two tone frequency : 60GHz , 60.5GHzPA simulation is using ADS and CMOS foundry model

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Comparison of IMD3 for 65nm CMOS NTU PAWith Linearizer

    -30 -25 -20 -15 -10 -5 0 5 10-50

    -45

    -40

    -35

    -30

    -25

    -20

    -15

    -10

    -5

    0

    IMD

    3 (d

    Bc)

    Input Power(dBm)

    Simulated IMD3 With Linearizer Rapp model IMD3 With Linearizer

    Two tone frequency : 60GHz , 60.5GHzPA simulation is using ADS and CMOS foundry model

    [3]

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    VCO Performances for LO (1/2)VCO Performances for LO (1/2)Circuit Schematic & Design Parameters

    Based-on tuning requirement (6~8-GHz @60 GHz)

    Design without band-switching for comparison

    Td: CPW with shielded ground

    Device Design Value

    M1, M21 × 8 μm / 0.06

    μm

    Ibias 7.5 mA

    width 4 μm

    length 220μm

    spacing 10 μmTd

    Z0 57.7 Ω

    Cvar 21 ~ 46 fF

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    10.0k 100.k 1.00M 10.0M1.00k 100.M

    -120

    -100

    -80

    -60

    -40

    -20

    -140

    0

    Offset Freq. (Hz)

    PN

    (dB

    c/H

    z)

    Vctrl = 0 VVctrl = 0.6 V

    Vctrl = 1.2 V

    0.2 0.4 0.6 0.8 1.00.0 1.2

    -90

    -85

    -80

    -95

    -75

    Vctrl (V)

    PN @

    1-M

    Hz

    offs

    et (d

    B/H

    z)

    0.2 0.4 0.6 0.8 1.00.0 1.2

    4

    6

    8

    2

    10

    -8

    -6

    -4

    -10

    -2

    Vctrl (V)

    Cor

    e P

    ower

    (dB

    m)

    Buffered P

    ower (dB

    m)

    0.2 0.4 0.6 0.8 1.00.0 1.2

    60

    62

    64

    66

    58

    68

    Vctrl (V)

    Freq

    uenc

    y (G

    Hz)

    17

    VCO Performances for LO (2/2)VCO Performances for LO (2/2)

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission18

    VCO Performances for LO/2 (1/2)VCO Performances for LO/2 (1/2)Circuit Schematic & Design Parameters

    Based-on tuning requirement (3~4-GHz @30 GHz)

    Design without band-switching for comparison

    Device Design Value

    M1, M21 × 12 μm / 0.06

    μmIbias 5.4 mA

    L 0.21 nHLd Q 32

    Cvar 62 ~ 100 fF

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    0.2 0.4 0.6 0.8 1.00.0 1.2

    4

    6

    8

    2

    10

    -8

    -6

    -4

    -10

    -2

    Vctrl (V)

    Cor

    e P

    ower

    (dB

    m)

    Buffered P

    ower (dB

    m)

    10.0k 100.k 1.00M 10.0M1.00k 100.M

    -140-120-100

    -80-60-40-20

    -160

    0

    Offset Freq. (Hz)

    PN

    (dB

    c/H

    z)

    Vctrl = 0 V

    Vctrl = 0.6 V

    Vctrl = 1.2 V

    0.2 0.4 0.6 0.8 1.00.0 1.2

    -115

    -110

    -105

    -100

    -95

    -90

    -120

    -85

    Vctrl (V)

    PN

    @1-

    MH

    z of

    fset

    (dB

    /Hz)

    0.2 0.4 0.6 0.8 1.00.0 1.2

    29

    30

    31

    32

    33

    28

    34

    Vctrl (V)

    Freq

    uenc

    y (G

    Hz)

    19

    VCO Performances for LO/2 (2/2)VCO Performances for LO/2 (2/2)

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission20

    VCO Performances for LO/4 (1/2)VCO Performances for LO/4 (1/2)Circuit Schematic & Design Parameters

    Based-on tuning requirement (1.5~2-GHz @15 GHz)

    Design without band-switching for comparison

    Device Design Value

    M1, M21 × 9 μm / 0.06

    μmIbias 2.9 mA

    L 0.88 nHLd Q 17.5

    Cvar 60 ~ 100 fF

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    10.0k 100.k 1.00M 10.0M1.00k 100.M

    -140-120-100

    -80-60-40-20

    -160

    0

    Offset Freq. (Hz)

    PN

    (dB

    c/H

    z)Vctrl = 0 V

    Vctrl = 0.6 V

    Vctrl = 1.2 V

    0.2 0.4 0.6 0.8 1.00.0 1.2

    -110

    -105

    -100

    -115

    -95

    Vctrl (V)

    PN

    @1-

    MH

    z O

    ffset

    (dB

    c/H

    z)

    0.2 0.4 0.6 0.8 1.00.0 1.2

    5

    6

    7

    8

    9

    4

    10

    -7

    -6

    -5

    -4

    -3

    -8

    -2

    Vctrl (V)

    Cor

    e Po

    wer

    (dBm

    )

    Buffered Power (dBm

    )

    0.2 0.4 0.6 0.8 1.00.0 1.2

    14.5

    15.0

    15.5

    16.0

    16.5

    14.0

    17.0

    Vctrl (V)

    Freq

    uenc

    y (G

    Hz)

    21

    VCO Performances for LO/4 (2/2)VCO Performances for LO/4 (2/2)

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission22

    ComparisonComparisonPerformance Comparison among LO, LO/2, LO/4

    Phase-noise degradation: 6-dB/octave

    Phase-noise performances can be further improved via band-

    switching design to cover the wide tuning range

    Mode LO LO/2 LO/4

    Technology 65-nm 1P6M CMOS

    Frequency 60 GHz 30 GHz 15 GHz

    Tuning Range 9 GHz 5 GHz 2 GHz

    FTR 15 % 20 % 13.3 %

    PN @1 MHz -79 ~ -91 dBc/Hz -88 ~ -109 dBc/Hz-97 ~ -108

    dBc/Hz

    PN degradation 0 dB 6 dB 12 dB

    Core Power 4.5 ~ 8.5 dBm 5.8 ~ 7.6 dBm 7.8 ~ 9.2 dBm

    DC Power 9 mW 6.48 mW 3.48 mW

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission23

    FOM CalculationsFOM CalculationsFOM Comparison among LO, LO/2, LO/4 (VCO only)

    FOM = PN–20log(fo/Δf)-20log(FTR/10)+10log(PDC/1mW)-1.5log2(fo/LO)

    PN degradations are included.

    1.5 dB conversion loss is assumed for each multiplication by 2.

    Based on simple LC-tank VCO, the one with LO/2 case yields the

    highest FOM.

    The LO case with wide tuning ranges PN degradations

    Low inductor Q for LO/4 case Colpitts structure or other available

    high-Q inductors

    Mode LO LO/2 LO/4

    FOM -174.56 dBc/Hz -184.42 dBc/Hz -180.59 dBc/Hz

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Recent Published VCO Phase Noise

    SiGe

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Phase Noise Model [1] • Phase noise may be reasonably modeled by a two

    pole – one zero model

    • Case 1:– PSD(0) = -92 dBc/Hz– Pole frequency fp = 1 MHz– Zero frequency fz = 100 MHz– PSD(infinity) = -130 dBc/Hz

    ⎥⎥⎦

    ⎢⎢⎣

    ++

    =))/(1

    )/(1)0()( 22

    p

    z

    ffffPSDfPSD

    • Case 2:– PSD(0) = -85 dBc/Hz– Pole frequency fp = 1 MHz– Zero frequency fz = 100 MHz– PSD(infinity) = -130 dBc/Hz

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    BER Peformance

    SC 16-QAM, 3Gbps

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    EVM Performance

    SC 16-QAM, 3Gbps

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    Conclusions

    • 65nm CMOS PA linearizer can boost 60-GHz linear power 2-3dB under the same linearity requirement and DC power consumption.

    • The modified Rapp PA model has a difficulty to model the corresponding IM3 plot with 3:1 asymptotic behavior.

    • The divided-by-2 local oscillator frequency in 65nm CMOS 60-GHz RF system has better phase noise performance than the fundamental local oscillator frequency.

  • May 2010

    Tian-Wei Huang, National Taiwan University

    doc.: IEEE 802.11-10/0497r0

    Submission

    References

    • [1] 11-09-1213-01-00ad-60ghz-impairments-modeling.ppt • [2] Jeng-Han Tsai, Hong-Yeh Chang, Pei-Si Wu, Yi-Lin Lee, Tian-

    Wei Huang, and Huei Wang, " Design and Analysis of a 44-GHz MMIC Low-loss Built-in Linearizer for High-Linearity Medium Power Amplifiers," IEEE Trans. Microwave Theory Tech. Vol. 54, No. 6, pp. 2478-2496, June 2006

    • [3] S. Cripps, “The Intercept Point Deception,” IEEE Microwave Magazine, pp. 44-50, Feb. 2007

    AbstractOutlineModified Rapp PA Modeling [1]65nm CMOS Standard PA [1]65nm CMOS NTU PA AM-AM�VDD 1V65nm CMOS NTU PA AM-PM�VDD 1V65nm CMOS NTU PA with Linearizer AM-AM�VDD 1V65nm CMOS NTU PA With Linearizer AM-PM�VDD 1VBER PeformanceEVM Performance65nm CMOS NTU PA IMD3Comparison of IMD3 for 65nm CMOS NTU PA�Without LinearizerComparison of IMD3 for 65nm CMOS NTU PA�With LinearizerVCO Performances for LO (1/2)VCO Performances for LO (2/2)VCO Performances for LO/2 (1/2)VCO Performances for LO/2 (2/2)VCO Performances for LO/4 (1/2)VCO Performances for LO/4 (2/2)ComparisonFOM CalculationsRecent Published VCO Phase NoisePhase Noise Model [1] BER Peformance EVM PerformanceConclusionsReferences