me 2255 - electronics and microprocessors

7/23/2019 Me 2255 - Electronics and Microprocessors

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UNIT I: SEMICONDUCTORS AND RECTIFIERS

Classification of solids based on energy band theory Intrinsic semiconductors Extrinsicsemiconductors P-type and N-type PN junction Zener effect Zener diode characteristics

Half a!e and full a!e rectifiers "oltage regulation

Semiconductor diodes

# modern semiconductor diode is made of a crystal of semiconductor li$e silicon that hasimpurities added to it to create a region on one side that contains negati!e charge carriers%electrons&' called n-type semiconductor' and a region on the other side that contains positi!echarge carriers %holes&' called p-type semiconductor( )he diode*s terminals are attached to eachof these regions( )he boundary ithin the crystal beteen these to regions' called a PN

junction' is here the action of the diode ta$es place( )he crystal conducts con!entionalcurrent in a direction from the p-type side %called the anode& to the n-type side %called the

cathode&' but not in the opposite direction(

#nother type of semiconductor diode' the +chott$y diode' is formed from the contact beteena metal and a semiconductor rather than by a p-n junction(

Currentvoltage caracteristic

# semiconductor diode,s beha!ior in a circuit is gi!en by its current!oltage characteristic' orI" graph %see graph belo&( )he shape of the cur!e is determined by the transport of chargecarriers through the so-called depletion layer or depletion region that exists at the p-n junction

beteen differing semiconductors( hen a p-n junction is first created' conduction band%mobile& electrons from the N-doped region diffuse into the P-doped region here there is alarge population of holes %!acant places for electrons& ith hich the electrons .recombine (

hen a mobile electron recombines ith a hole' both hole and electron !anish' lea!ing behindan immobile positi!ely charged donor %dopant& on the N-side and negati!ely charged acceptor%dopant& on the P-side( )he region around the p-n junction becomes depleted of charge carriersand thus beha!es as an insulator(

Hoe!er' the idth of the depletion region %called the depletion idth& cannot gro ithoutlimit( /or each electron-hole pair that recombines' a positi!ely charged dopant ion is left

behind in the N-doped region' and a negati!ely charged dopant ion is left behind in the P-doped region( #s recombination proceeds more ions are created' an increasing electric fieldde!elops through the depletion 0one hich acts to slo and then finally stop recombination(#t this point' there is a .built-in potential across the depletion 0one(

If an external !oltage is placed across the diode ith the same polarity as the built-in potential'the depletion 0one continues to act as an insulator' pre!enting any significant electric currentflo %unless electron1hole pairs are acti!ely being created in the junction by' for instance'light( see photodiode&( )his is the re!erse biasphenomenon( Hoe!er' if the polarity of theexternal !oltage opposes the built-in potential' recombination can once again proceed'resulting in substantial electric current through the p-n junction %i(e( substantial numbers ofelectrons and holes recombine at the junction&( /or silicon diodes' the built-in potential isapproximately 2(3 " %2(4 " for 5ermanium and 2(6 " for +chott$y&( )hus' if an externalcurrent is passed through the diode' about 2(3 " ill be de!eloped across the diode such thatthe P-doped region is positi!e ith respect to the N-doped region and the diode is said to be.turned on as it has a forard bias(

# diode,s *IV characteristic'can be approximated by four regions of operation(


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IV characteristics of a P-N junction diode

#t !ery large re!erse bias' beyond the pea$ in!erse !oltage or PI"' a process called re!ersebrea$don occurs hich causes a large increase in current %i(e( a large number of electronsand holes are created at' and mo!e aay from the pn junction& that usually damages the de!ice

permanently( )he a!alanche diode is deliberately designed for use in the a!alanche region( Inthe 0ener diode' the concept of PI" is not applicable( # 0ener diode contains a hea!ily doped

p-n junction alloing electrons to tunnel from the !alence band of the p-type material to theconduction band of the n-type material' such that the re!erse !oltage is

.clamped to a $non !alue %called the zener voltage&' and a!alanche does not occur( 7othde!ices' hoe!er' do ha!e a limit to the maximum current and poer in the clamped re!erse

!oltage region( #lso' folloing the end of forard conduction in any diode' there is re!ersecurrent for a short time( )he de!ice does not attain its full bloc$ing capability until the re!ersecurrent ceases(

)he second region' at re!erse biases more positi!e than the PI"' has only a !ery small re!ersesaturation current( In the re!erse bias region for a normal P-N rectifier diode' the currentthrough the de!ice is !ery lo %in the 8# range&( Hoe!er' this is temperature dependent' andat sufficiently high temperatures' a substantial amount of re!erse current can be obser!ed %m#or more&(

)he third region is forard but small bias' here only a small forard current is conducted(

#s the potential difference is increased abo!e an arbitrarily defined .cut-in !oltage or .on-

!oltage or .diode forard !oltage drop %" d& ' the diode current becomes appreciable %thele!el of current considered .appreciable and the !alue of cut-in !oltage depends on theapplication&' and the diode presents a !ery lo resistance( )he current!oltage cur!e isexponential( In a normal silicon diode at rated currents' the arbitrary .cut-in !oltage isdefined as 2(9 to 2(3 !olts( )he !alue is different for other diode types : +chott$y diodes can

be rated as lo as 2(6 "' 5ermanium diodes 2(6;-2(4 "' and red or blue light-emitting diodes%(? " and ?(2 " respecti!ely(

#t higher currents the forard !oltage drop of the diode increases( # drop of > " to >(; " istypical at full rated current for poer diodes(


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application of a diode in a special circuit' or are really different de!ices li$e the 5unn andlaser diode and the +/E)A

Normal %p-n& diodes' hich operate as described abo!e' are usually made of doped silicon or'more rarely' germanium( 7efore the de!elopment of modern silicon poer rectifier diodes'cuprous oxide and later selenium as usedJ its lo efficiency ga!e it a much higher forard!oltage drop %typically >(?>(3 " per .cell ' ith multiple cells stac$ed to increase the pea$

in!erse !oltage rating in high !oltage rectifiers&' and re@uired a large heat sin$ %often anextension of the diode,s metal substrate&' much larger than a silicon diode of the same currentratings ould re@uire( )he !ast majority of all diodes are the p-n diodes found inC+integrated circuits' hich include to diodes per pin and many other internal diodes(

Avalance diodes

=iodes that conduct in the re!erse direction hen the re!erse bias !oltage exceeds thebrea$don !oltage( )hese are electrically !ery similar to Zener diodes' and are oftenmista$enly called Zener diodes' but brea$ don by a different mechanism' the avalancheeffect( )his occurs hen the re!erse electric field across the p-n junction causes a a!e ofioni0ation' reminiscent of an a!alanche' leading to a large current( #!alanche diodes are

designed to brea$ don at a ell-defined re!erse !oltage ithout being destroyed( )hedifference beteen the a!alanche diode %hich has a re!erse brea$don abo!e about 9(6 "&and the Zener is that the channel length of the former exceeds the .mean free path of theelectrons' so there are collisions beteen them on the ay out( )he only practical difference isthat the to types ha!e temperature coefficients of opposite polarities(

Constant current diodes

)hese are actually a K/E) ith the gate shorted to the source' and function li$e a to-terminal

current-limiter analog to the Zener diode' hich is limiting !oltage( )hey allo a current

through them to rise to a certain !alue' and then le!el off at a specific !alue( #lso called CLDs'

constantcurrent diodes' diodeconnected transistors' or currentregulatingdiodes(

Esa!i or tunnel diodes

)hese ha!e a region of operation shoing negati!e resistance caused by @uantum tunneling'thus alloing amplification of signals and !ery simple bistable circuits( )hese diodes are alsothe type most resistant to nuclear radiation(

'unn diodes

)hese are similar to tunnel diodes in that they are made of materials such as 5a#s or InP thatexhibit a region of negati!e differential resistance( ith appropriate biasing' dipole domainsform and tra!el across the diode' alloing high fre@uency microa!e oscillators to be built(

(igt)emitting diodes *(EDs+

In a diode formed from a direct band-gap semiconductor' such as gallium arsenide' carriersthat cross the junction emit photons hen they recombine ith the majority carrier on the

other side( =epending on the material' a!elengths %or colors&L>>M

from the infrared to the near

ultra!iolet may be produced(L>6M

)he forard potential of these diodes depends on thea!elength of the emitted photonsA >(6 " corresponds to red' 6(? " to !iolet( )he first


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used as lo-efficiency photodiodes in signal applications( #n 4M# photodiode can be

used in solar cells' in photometry' or in optical communications( ultiple photodiodes may bepac$aged in a single de!ice' either as a linear array or as a to-dimensional array( )hesearrays should not be confused ith charge-coupled de!ices(

,oint)contact diodes

)hese or$ the same as the junction semiconductor diodes described abo!e' but theirconstruction is simpler( # bloc$ of n-type semiconductor is built' and a conducting sharp-pointcontact made ith some group-4 metal is placed in contact ith the semiconductor( +omemetal migrates into the semiconductor to ma$e a small region of p-type semiconductor nearthe contact( )he long-popular >N4? germanium !ersion is still used in radio recei!ers as adetector and occasionally in speciali0ed analog electronics(

,IN diodes

# PIN diode has a central un-doped' or intrinsic' layer' forming a p-type1intrinsic1n-typestructure(

L>?M)hey are used as radio fre@uency sitches and attenuators( )hey are also used as

large !olume ioni0ing radiation detectors and as photodetectors( PIN diodes are also used inpoer electronics' as their central layer can ithstand high !oltages( /urthermore' the PINstructure can be found in many poer semiconductor de!ices' such as I57)s' poer+/E)s' and thyristors(

Scott!" diodes

+chott$y diodes are constructed from a metal to semiconductor contact( )hey ha!e a loerforard !oltage drop than p-n junction diodes( )heir forard !oltage drop at forard currents


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of about > m# is in the range 2(>; " to 2(?; "' hich ma$es them useful in !oltage clampingapplications and pre!ention of transistor saturation( )hey can also be used as lo lossrectifiers although their re!erse lea$age current is generally higher than that of other diodes(+chott$y diodes are majority carrier de!ices and so do not suffer from minority carrier storage

problems that slo don many other diodes : so they ha!e a faster .re!erse reco!ery thanp-n junction diodes( )hey also tend to ha!e much loer junction capacitance than p-n diodes

hich pro!ides for high sitching speeds and their use in high-speed circuitry and D/ de!icessuch as sitched-mode poer

varactor diodes

"aractors are operated re!erse-biased so no current flos' but since the thic$ness of

the depletion 0one !aries ith the applied bias !oltage' the capacitance of the diode can be madeto !ary( 5enerally' the depletion region thic$ness is proportional to the s@uare root of the applied!oltageJ andcapacitance is in!ersely proportional to the depletion region thic$ness( )hus' thecapacitance is in!ersely proportional to the s@uare root of applied !oltage(

#ll diodes exhibit this phenomenon to some degree' but specially made !aractordiodes exploit the effect to boost the capacitance and !ariability range achie!ed - most

diode fabrication attempts to achie!e the opposite(In the figure e can see an example of a crossection of a !aractor ith the depletion layerformed of a p-n-junction( 7ut the depletion layer can also be made of a +-diode ora +chott$y diode( )his is !ery important in C+ and IC technology(

-ener diodes

=iodes that can be made to conduct bac$ards( )his effect' called Zener brea$don' occurs ata precisely defined !oltage' alloing the diode to be used as a precision !oltage reference( In

practical !oltage reference circuits Zener and sitching diodes are connected in series andopposite directions to balance the temperature coefficient to near 0ero( +ome de!ices labeled

as high-!oltage Zener diodes are actually a!alanche diodes %see abo!e&( )o %e@ui!alent&Zeners in series and in re!erse order' in the same pac$age' constitute a transient absorber %or)ransorb' a registered trademar$&( )he Zener diode is named for =r( Clarence el!in Zener ofCarnegie ellon ni!ersity' in!entor of the de!ice(

ther uses for semiconductor diodes include sensing temperature' and computing analoglogarithms %see perational amplifier applications


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)he Zener diode*s operation depends on the hea!y doping of its p-n

junction alloing electrons to tunnel from the !alence band of the p-type material to the

conduction band of the n-type material( In the atomic scale' this tunneling corresponds to thetransport of !alence band electrons into the empty conduction band statesJ as a result of thereduced barrier beteen these bands and high electric fields that are induced due to the

relati!ely high le!els of dopings on both sides(

L>M

)he brea$don !oltage can be controlled@uite accurately in the doping process( hile tolerances ithin 2(2; are a!ailable' the mostidely used tolerances are ; and >2( 7rea$don !oltage for commonly a!ailable 0enerdiodes can !ary idely from >(6 !olts to 622 !olts(

#nother mechanism that produces a similar effect is the a!alanche effect as in the a!alanchediode( )he to types of diode are in fact constructed the same ay and both effects are

present in diodes of this type( In silicon diodes up to about ;(9 !olts' the Zener effect is thepredominant effect and shos a mar$ed negati!e temperature coefficient( #bo!e ;(9 !olts' the

a!alanche effect becomes predominant and exhibits a positi!e temperature coefficientL>M

( In a;(9 " diode' the to effects occur together and their temperature coefficients neatly canceleach other out' thus the ;(9 " diode is the component of choice in temperature-critical

applications( odern manufacturing techni@ues ha!e produced de!ices ith !oltages loerthan ;(9 " ith negligible temperature coefficients' but as higher !oltage de!ices areencountered' the temperature coefficient rises dramatically( # 3; " diode has >2 times thecoefficient of a >6 " diode(

#ll such diodes' regardless of brea$don !oltage' are usually mar$eted under the umbrellaterm of OZener diodeO(

Current-!oltage characteristic of a Zener diode ith a brea$don !oltage of >3 !olt( Noticethe change of !oltage scale beteen the forard biased %positi!e& direction and the re!erse

biased %negati!e& direction(

Zener diodes are idely used as !oltage references and as shunt regulators to regulate the!oltage across small circuits( hen connected in parallel ith a !ariable !oltage source so thatit is re!erse biased' a Zener diode conducts hen the !oltage reaches the diode*s re!erse

brea$don !oltage( /rom that point on' the relati!ely lo impedance of the diode $eeps the!oltage across the diode at that !alue(


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In this circuit' a typical !oltage reference or regulator' an input !oltage' IN' is regulated donto a stable output !oltage )( )he intrinsic !oltage drop of diode = is stable o!er a idecurrent range and holds )relati!ely constant e!en though the input !oltage may fluctuateo!er a fairly ide range( 7ecause of the lo impedance of the diode hen operated li$e this'Desistor D is used to limit current through the circuit(

In the case of this simple reference' the current floing in the diode is determined using hms

la and the $non !oltage drop across the resistor D( I=iodeQ %IN- )& 1 DR)he !alue of!must satisfy to conditionsA

>( ! must be small enough that the current through = $eeps = in re!erse brea$don( )he

!alue of this current is gi!en in the data sheet for =( /or example' the common7ZS3TC;"9

L6M de!ice' a ;(9 " 2(; Zener diode' has a recommended re!erse

current of ; m#( If insufficient current exists through =' then ) ill beunregulated' and less than the nominal brea$don !oltage %this differs to !oltage

regulator tubes here the output !oltage ill be higher than nominal and could rise ashigh as IN&( hen calculating!' alloance must be made for any current throughthe external load' not shon in this diagram' connected across )(

6( ! must be large enough that the current through = does not destroy the de!ice( If the

current through = isI=' its brea$don !oltage V7and its maximum poer dissipation"#S' thenIDV#U"$%&(

# load may be placed across the diode in this reference circuit' and as long as the 0ener staysin re!erse brea$don' the diode ill pro!ide a stable !oltage source to the load(

+hunt regulators are simple' but the re@uirements that the ballast resistor be small enough toa!oid excessi!e !oltage drop during orst-case operation %lo input !oltage concurrent ithhigh load current& tends to lea!e a lot of current floing in the diode much of the time'ma$ing for a fairly asteful regulator ith high @uiescent poer dissipation' only suitable forsmaller loads(

Zener diodes in this configuration are often used as stable references for more ad!anced!oltage regulator circuits(

)hese de!ices are also encountered' typically in series ith a base-emitter junction' intransistor stages here selecti!e choice of a de!ice centered around the a!alanche1Zener pointcan be used to introduce compensating temperature co-efficient balancing of the transistor PN

junction( #n example of this $ind of use ould be a =C error amplifier used in a regulatedpoer supply circuit feedbac$ loop system(

Zener diodes are also used in surge protectors to limit transient !oltage spi$es(

#nother notable application of the 0ener diode is the use of noise caused by its a!alanchebrea$don in a random number generator that ne!er repeats(


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UNIT II: TRANSISTORS AND AM,(IFIERS

7ipolar junction transistor C7' CE' CC configuration and characteristics 7iasing circuits Class #' 7 and C amplifiers /ield effect transistor Configuration and characteristic of /E)amplifier +CD' diac' triac' K) Characteristics and simple applications +itching

transistors Concept of feedbac$ Negati!e feedbac$ #pplication in temperature and motorspeed control(

Bipolar Transistor Basics

In the Diode tutorials e sa that simple diodes are made up from to pieces ofsemiconductor material' either +ilicon or 5ermanium to form a simple PN-junction and ealso learnt about their properties and characteristics( If e no join together to indi!idualdiodes end to end gi!ing to PN-junctions connected together in series' e no ha!e a three

layer' to junction' three terminal de!ice forming the basis of a .i$olar /unctionTransistor'or./T for short( )his type of transistor is generally $non as a.i$olar Transistor' becauseits basic construction consists of to PN-junctions ith each terminal or connection beinggi!en a name to identify it and these are $non as the Emitter' 7ase and Collectorrespecti!ely(

)he ord )ransistor is an acronym' and is a combination of the ords )ransfer "aristor usedto describe their mode of operation ay bac$ in their early days of de!elopment( )here areto basic types of bipolar transistor construction' NPN and PNP' hich basically describes the

physical arrangement of the P-type and N-type semiconductor materials from hich they aremade( 7ipolar )ransistors are OCDDEN)O #mplifying or current regulating de!ices that

control the amount of current floing through them in proportion to the amount of biasingcurrent applied to their base terminal( )he principle of operation of the to transistor typesNPN and PNP' is exactly the same the only difference being in the biasing %base current& andthe polarity of the poer supply for each type(

.i$olar Transistor Construction


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)he construction and circuit symbols for both the NPN and PNP bipolar transistor are shonabo!e ith the arro in the circuit symbol alays shoing the direction of con!entionalcurrent flo beteen the base terminal and its emitter terminal' ith the direction of the arro

pointing from the positi!e P-type region to the negati!e N-type region' exactly the same as forthe standard diode symbol(

)here are basically three possible ays to connect a .i$olar Transistorithin an electroniccircuit ith each method of connection responding differently to its input signal as the staticcharacteristics of the transistor !ary ith each circuit arrangement(

>(Common 7ase Configuration - has "oltage 5ain but no Current 5ain(

6(Common Emitter Configuration - has both Current and "oltage 5ain(4(Common Collector Configuration - has Current 5ain but no "oltage 5ain(

The Common Base Configuration.

#s its name suggests' in the Common .ase or 5rounded 7ase configuration' the 7#+Econnection is common to both the input signal #N= the output signal ith the input signal

being applied beteen the base and the emitter terminals( )he corresponding output signal ista$en from beteen the base and the collector terminals as shon ith the base terminalgrounded or connected to a fixed reference !oltage point( )he input current floing into theemitter is @uite large as its the sum of both the base current and collector current respecti!ely

therefore' the collector current output is less than the emitter current input resulting in aCurrent 5ain for this type of circuit of less than O>O' or in other ords it O#ttenuatesO thesignal(


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Te Common .ase Am$li%ier Circuit

)his type of amplifier configuration is a non-in!erting !oltage amplifier circuit' in that thesignal !oltages "in and "out are In-Phase( )his type of arrangement is not !ery common dueto its unusually high !oltage gain characteristics( Its utput characteristics represent that of a

forard biased diode hile the Input characteristics represent that of an illuminated photo-diode( #lso this type of configuration has a high ratio of utput to Input resistance or moreimportantly O


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Te Common Emitter Am$li%ier Circuit

In this type of configuration' the current floing out of the transistor must be e@ual to thecurrents floing into the transistor as the emitter current is gi!en as Ie Q Ic V Ib( #lso' as theload resistance %D


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Te Common Collector Am$li%ier Circuit

)he Common Emitter configuration has a current gain e@ual to the W !alue of the transistoritself( In the common collector configuration the load resistance is situated in series ith theemitter so its current is e@ual to that of the emitter current( #s the emitter current is thecombination of the collector #N= base currents combined' the load resistance in this type ofamplifier configuration also has both the collector current and the input current of the base

floing through it( )hen the current gain of the circuit is gi!en asA

)his type of bipolar transistor configuration is a non-in!erting amplifier circuit in that thesignal !oltages of "in and "out are OIn-PhaseO( It has a !oltage gain that is alays less thanO>O %unity&( )he load resistance of the common collector amplifier configuration recei!es both

the base and collector currents gi!ing a large current gain %as ith the Common Emitterconfiguration& therefore' pro!iding good current amplification ith !ery little !oltage gain(

Bipolar Transistor ummar!.

)he beha!iour of the bipolar transistor in each one of the abo!e circuit configurations is !erydifferent and produces different circuit characteristics ith regards to Input impedance'utput impedance and 5ain and this is summarised in the table belo(

Transistor Caracteristics

)he static characteristics for .i$olar Transistoramplifiers can be di!ided into the folloingmain groups(


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Input CharacteristicsA- Common 7ase - IEY "E7

Common Emitter - I7Y "7E

utput CharacteristicsA- Common 7ase - ICY "C

Common Emitter - ICY "C

)ransfer CharacteristicsA- Common 7ase - IEY IC

Common Emitter - I7Y IC

ith the characteristics of the different transistor configurations gi!en in the folloing tableA

CharacteristicCommon Common Common

7ase Emitter Collector

Input impedance


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In a grounded-emitter transistor circuit' such as the light-sitch circuit shon' as the base!oltage rises the base and collector current rise exponentially' and the collector !oltage drops

because of the collector load resistor( )he rele!ant e@uationsA

"DCQ ICE DC' the !oltage across the load %the lamp ith resistance DC&

"DC

V "CE

Q "CC

' the supply !oltage shon as 9"

If "CEcould fall to 2 %perfect closed sitch& then Ic could go no higher than "CC1 DC' e!enith higher base !oltage and current( )he transistor is then said to be saturated( Hence' !alues

of input !oltage can be chosen such that the output is either completely off'L>4M

or completelyon( )he transistor is acting as a sitch' and this type of operation is common in digital circuitshere only OonO and OoffO !alues are rele!ant(

Transistor as an am$li%ier

#mplifier circuit' standard common-emitter configuration(

)he common-emitter amplifier is designed so that a small change in !oltage in %Vin& changesthe small current through the base of the transistor and the transistor*s current amplificationcombined ith the properties of the circuit mean that small sings in Vin produce largechanges in Vout(

"arious configurations of single transistor amplifier are possible' ith some pro!iding currentgain' some !oltage gain' and some both(

/rom mobile phones to tele!isions' !ast numbers of products include amplifiers for soundreproduction' radio transmission' and signal processing( )he first discrete transistor audioamplifiers barely supplied a fe hundred milliatts' but poer and audio fidelity gradually

increased as better transistors became a!ailable and amplifier architecture e!ol!ed(

odern transistor audio amplifiers of up to a fe hundred atts are common and relati!elyinexpensi!e


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0oltage divider 2ias

0oltage divider 2ias

)he !oltage di!ider is formed using external resistors D> and D6( )he !oltage across D6

forard biases the emitter junction( 7y proper selection of resistors D>and D6' the operatingpoint of the transistor can be made independent of W( In this circuit' the !oltage di!ider holdsthe base !oltage fixed independent of base current pro!ided the di!ider current is largecompared to the base current( Hoe!er' e!en ith a fixed base !oltage' collector current!aries ith temperature %for example& so an emitter resistor is added to stabili0e the [-point'similar to the abo!e circuits ith emitter resistor(

In this circuit the base !oltage is gi!en byA

!oltage across

pro!ided (

#lso

/or the gi!en circuit'

Merits:

nli$e abo!e circuits' only one dc supply is necessary(

perating point is almost independent of W !ariation(


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perating point stabili0ed against shift in temperature(


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Demerits:

In this circuit' to $eep ICindependent of W the folloing condition must be metA

hich is approximately the case if

here D>\\ D6denotes the e@ui!alent resistance of D>and D6connected in parallel(

#s W-!alue is fixed for a gi!en transistor' this relation can be satisfied either by$eeping DEfairly large' or ma$ing D>\\D6!ery lo(

If DEis of large !alue' high "CCis necessary( )his increases cost as ell asprecautions necessary hile handling(

If D>\\ D6is lo' either D>is lo' or D6is lo' or both are lo( # lo D>raises"7closer to "C' reducing the a!ailable sing in collector !oltage' and limitingho large DCcan be made ithout dri!ing the transistor out of acti!e mode( #lo D6 loers "be' reducing the alloed collector current(


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#asebias

+ilicon small signal transistors typically ha!e a W in the range of >22-422( #ssuming that eha!e a WQ>22 transistor' hat !alue of base-bias resistor is re@uired to yield an emitter currentof >m#]

+ol!ing the IE base-bias e@uation for D7and substituting W' "77' "7E' and IEyields T42$R()he closest standard !alue is T>2$R(

hat is the the emitter current ith a T>2$R resistor] hat is the emitter current if e

randomly get a WQ422 transistor]

)he emitter current is little changed in using the standard !alue T>2$R resistor( Hoe!er' itha change in W from >22 to 422' the emitter current has tripled( )his is not acceptable in a

poer amplifier if e expect the collector !oltage to sing from near "CCto near ground(Hoe!er' for lo le!el signals from micro-!olts to a about a !olt' the bias point can becentered for a W of s@uare root of %>22^422&Q>34( )he bias point ill still drift by aconsiderable amount ( Hoe!er' lo le!el signals ill not be clipped(

7ase-bias by its self is not suitable for high emitter currents' as used in poer amplifiers( )hebase-biased emitter current is not temperature stable( Thermal run awayis the result of highemitter current causing a temperature increase hich causes an increase in emitter current'hich further increases temperature(


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Collector)%eed2ac! 2ias

"ariations in bias due to temperature and beta may be reduced by mo!ing the " 77end of thebase-bias resistor to the collector as in /igure belo( If the emitter current ere to increase'

the !oltage drop across DCincreases' decreasing "C' decreasing I7fed bac$ to the base( )his'in turn' decreases the emitter current' correcting the original increase(

rite a "< e@uation about the loop containing the battery' DC' D7' and the "7Edrop( +ubstitute ICIEand I7IE1W( +ol!ing for IEyieldsthe IE C/7-bias e@uation( +ol!ing for I7yields the I7 C/7-bias e@uation(

Collector)%eed2ac! 2ias3

/ind the re@uired collector feedbac$ bias resistor for an emitter current of > m#' a ?(3

collector load resistor' and a transistor ith WQ>22 ( /ind the collector !oltage "C( It should beapproximately miday beteen "CCand ground(

)he closest standard !alue to the ?92$ collector feedbac$ bias resistor is ?32$( /ind theemitter current IEith the ?32 resistor( Decalculate the emitter current for a transistor ithWQ>22 and WQ422(


25/135

e see that as beta changes from >22 to 422' the emitter current increases from 2(TBTm# to>(?Bm#( )his is an impro!ement o!er the pre!ious base-bias circuit hich had an increasefrom >(26m# to 4(23m#( Collector feedbac$ bias is tice as stable as base-bias ith respectto beta !ariation(

Emitter)2ias

Inserting a resistor DE in the emitter circuit as in /igure belo causes degeneration' also$non as negati!e feedbac$( )his opposes a change in emitter current IEdue to temperaturechanges' resistor tolerances' beta !ariation' or poer supply tolerance( )ypical tolerances areas follosA resistor: ;' beta: >22-422' poer supply: ;( hy might the emitterresistor stabili0e a change in current] )he polarity of the !oltage drop across DEis due to thecollector battery "CC( )he end of the resistor closest to the %-& battery terminal is %-&' the endclosest to the %V& terminal it %V&( Note that the %-& end of DEis connected !ia " 77battery andD7 to the base( #ny increase in current flo through DEill increase the magnitude ofnegati!e !oltage applied to the base circuit' decreasing the base current' decreasing the emittercurrent( )his decreasing emitter current partially compensates the original increase(

Emitter)2ias

Note that base-bias battery "77is used instead of "CCto bias the base in /igure abo!e(


26/135

attention to the polarities on the components( e substitute I7IE1W and sol!e for emitter current I E( )his e@uation can be sol!ed for D7' e@uationA D7 emitter-bias' /igure abo!e(

7efore applying the e@uationsA D7 emitter-bias and IE emitter-bias' /igure abo!e' e need tochoose !alues for DC and DE ( D Cis related to the collector supply "CC and the desiredcollector current IChich e assume is approximately the emitter current IE( Normally the

bias point for "Cis set to half of "CC( )hough' it could be set higher to compensate for the!oltage drop across the emitter resistor DE( )he collector current is hate!er e re@uire orchoose( It could range from micro-#mps to #mps depending on the application and transistorrating( e choose ICQ >m#' typical of a small-signal transistor circuit( e calculate a !aluefor DCand choose a close standard !alue( #n emitter resistor hich is >2-;2 of the collectorload resistor usually or$s ell(

Collector-to-"ase "iased "ipolar amplifier

/igure 6A J center - inserting independentsource and mar$ing leads to be cutJ right - cutting the dependent source free and short-circuiting bro$en leads

/igure > %top right& shos a bipolar amplifier ith feedbac$ bias resistor !f dri!en by aNorton signal source( /igure 6 %left panel& shos the corresponding small-signal circuitobtained by replacing the transistor ith its hybrid-pi model( )he objecti!e is to find the return

ratio of the dependent current source in this amplifier(

LTM

)o reach the objecti!e' the stepsoutlined abo!e are folloed( /igure 6 %center panel& shos the application of these steps up to

+tep ?' ith the dependent source mo!ed to the left of the inserted source of !alue it' and theleads targeted for cutting mar$ed ith an'( /igure 6 %right panel& shos the circuit set up forcalculation of the return ratio T' hich is

)he return current is


27/135

)he feedbac$ current in!fis found by current di!ision to beA

)he base-emitter !oltage v(is then' from hm*s laA

Conse@uently'

A$$lication in as"m$totic gain model

)he o!erall transresistance gain of this amplifier can be shon to beA

ith!)* !S++ r(and!,* !D++ r-(

)his expression can be reritten in the form used by the asymptotic gain model' hichexpresses the o!erall gain of a feedbac$ amplifier in terms of se!eral independent factors thatare often more easily deri!ed separately than the o!erall gain itself' and that often pro!ideinsight into the circuit( )his form isA

here the so-called as"m$totic gain./is the gain at infinitegm' namelyA

and the so-called %eed %or1ardor direct %eedtroug.0is the gain for 0erogm' namelyA

/or additional applications of this method' see asymptotic gain model(

>( =C 7iasing Circuits

6( )he acoperation of an amplifier depends on the initial dc!alues ofI#'IC' and VC1(

4( 7y !arying I#around an initial dc !alue'ICand VC1are made to !ary around theirinitial dc !alues(


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?( DC biasing is a static operation since it deals ith setting a %i4ed *stead"+ le!el ofcurrent %through the de!ice& ith a desired fixed !oltage drop across the de!ice(

V"CC

DC

D7

vout

vin

vce

ib

ic

Purpose of the =C biasing circuit

>( )o turn the de!ice .N

6( )o place it in operation in the region of its characteristic here the de!ice operatesmost linearly' i(e( to set up the initial dc !alues ofI#'IC' and VC1

0oltage)Divider .ias

_ )he !oltage di!ider %or potentiometer& bias circuit is by far the most commonly used(

_ D7>' D76

!oltage-di!ider to set the !alue of "7 ' I7 V"CC_ C4

to sort circuit acsignals to ground' hile not effect the =C operating %or biasing&of a circuit


29/135

DC

D>


30/135

%DE stabili0es the ac signals&

."$ass Ca$acitor

V"CC

'ra$ical DC .ias Anal"sis

IC DC

D>

D6I

E

DEVCC IC!C VC1 I1!1 2

forICI

1

IC

>

VC1

VCC

!C !1 !C !1

Point - slope form of straight line e@uation A

y m'Ic Q " 1%DCVD &C%sat& CC E

DC (oad (ineI

C

%m#&


31/135

"CE%off&

Q "CC


32/135

_ )he straight line is $no as the DC load line

_ Its significance is that regardless of the beha!ior of the transistor' the collector currentIC and the collector-emitter !oltage "CE must alays lie on the load line' dependsN


33/135

_ hen an ac signalis applied to the base of the transistor' ICand VC1ill both !aryaround their 2-point !alues(

_ hen the 2-point is centered' IC and VC1can both ma$e the ma4imum possibletransitions abo!e and belo their initial dc !alues(

_ hen the 2-point is a2ovethe center on the load line' the input signal may cause the

transistor to saturate( hen this happens' a part of the output signal ill be clippedoff(

_ hen the 2-point is 2elo1midpoint on the load line' the input signal may cause thetransistor to cutoff( )his can also cause a portion of the output signal to be clipped(

DC and AC E#uivalent Circuits

V"CC

V"CC

DC

D> IC DC

D>D


34/135

vin

rC

vce

D>11D6

7ias Circuit =C e@ui!alent circuit rCQ DC11D&(>(

)his !alue is smaller than h71V >' hich is the !alue obtained for the fixed-bias case(

If the load resistance!Lis !ery small' as in a transformer-coupled circuit' then the pre!iousexpression for S shos that there ould be no impro!ement in the stabili0ation in thecollector-to-base bias circuit o!er the fixed-bias circuit( # circuit that can be used e!en if thereis 0ero dc resistance in series ith the collector terminal is the self-biasing configuration of

illus( c( )he current in the resistance!1in the emitter lead causes a !oltage drop hich is inthe direction to re!erse-bias the emitter junction( +ince this junction must be forard-biased

%for acti!e region bias&' thebleeder!>-!6has been added to the circuit(

IfICtends to increase' the current in!1increases( #s a conse@uence of the increase in !oltagedrop across!1' the base current is decreased( HenceICill increase less than it ould ha!ehad there been no self-biasing resistor!1( )he stabili0ation factor for the self-bias circuit is

shon by E@( %6&' here!#Q!>!61%!>V!6&( )he smaller the !alue of!#' the

6(

better the stabili0ation( E!en if !#approaches 0ero' the !alue of Scannot be reduced belounity(

In order to a!oid the loss of signal gain because of the degeneration caused by !1' this resistoris often bypassed by a !ery large capacitance' so that its reactance at the fre@uencies underconsideration is !ery small(


37/135

)he selection of an appropriate operating point %ID' V.S' VDS& for a field-effect transistor

%/E)& amplifier stage is determined by considerations similar to those gi!en to transistors' asdiscussed pre!iously( )hese considerations are output-!oltage sing' distortion' poerdissipation' !oltage gain' and drift of drain current( In most cases it is not possible to satisfy alldesired specifications simultaneously(


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V >


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5roup of B bits(

>B& T& +tate the abbre!iations of #+CII and E7C=IC code]

#+CII-#merican +tandard Code for Information Interchange(

E7C=IC-Extended 7inary Coded =ecimal Information Code(

62& hat are the different types of number complements]

i& r,s Complement

ii& %r->&,s Complement(

6>& 5i!en the to binary numbers S Q >2>2>22 and ` Q >2222>>' perform the subtraction

%a& S -` and %b& ` - S using 6*s complements(

a& S Q >2>2>22

6*s complement of ` Q 2>>>>2>

--------------

+um Q >22>222>

=iscard end carry

%nswer8 S - ` Q 22>222>

b& ` Q >2222>>

6*s complement of S Q V 2>2>>22

---------------+um Q >>2>>>>

)here is no end carry' )he +7 7I) I+ >(

#nser is `-S Q -%6*s complement of >>2>>>>& Q - 22>222>

66& 5i!en the to binary numbers S Q >2>2>22 and ` Q >2222>>' perform the subtraction

%a& S -` and %b& ` - S using >*s complements(

a& S - ` Q >2>2>22 - >2222>>

S Q >2>2>22


71/135

>*s complement of ` Q V 2>>>>22

--------------

+um Q >22>2222

End -around carry Q V >

--------------

%nswer8 S - ` Q 22>222>

b& ` - S Q >2222>> - >2>2>22

` Q >2222>>

>*s complement of S Q V 2>2>2>>

-----------

+um Q V >>2>>>2

)here is no end carry(

)herefore the anser is ` - S Q -%>*s complement of >>2>>>2& Q -22>222>

64& rite the names of basic logical operators(

>( N) 1 IN"ED)

6( #N=

4( D

6?& hat are basic properties of 7oolean algebra]

)he basic properties of 7oolean algebra are commutati!e property' associati!eproperty and distributi!e property(

6;& +tate the associati!e property of boolean algebra(

)he associati!e property of 7oolean algebra states that the D ing of se!eral !ariablesresults in the same regardless of the grouping of the !ariables( )he associati!e

property is stated as follosA

#V %7VC& Q %#V7& VC

69& +tate the commutati!e property of 7oolean algebra(

)he commutati!e property states that the order in hich the !ariables are D edma$es no difference( )he commutati!e property isA

#V7Q7V#

63& +tate the distributi!e property of 7oolean algebra(


72/135

)he distributi!e property states that #N= ing se!eral !ariables and D ing the resultith a single !ariable is e@ui!alent to D ing the single !ariable ith each of the these!eral !ariables and then #N= ing the sums( )he distributi!e property isA

#V7CQ %#V7& %#VC&

6B& +tate the absorption la of 7oolean algebra(

)he absorption la of 7oolean algebra is gi!en by SVS`QS' S%SV`& QS(

6T& +implify the folloing using =e organ*s theorem L%%#7&*C&**

=M* L%%#7&*C&** =M* Q %%#7&*C&** V =* L%#7&* Q #* V 7*M

Q %#7&* C V =*

Q %#* V 7* &C V =*

42& +tate =e organ*s theorem(

=e organ suggested to theorems that form important part of 7oolean algebra( )heyare'

>& )he complement of a product is e@ual to the sum of the complements(

%#7&* Q #* V 7*

6& )he complement of a sum term is e@ual to the product of the complements(

%# V 7&* Q #*7*

4>& Deduce #(#*C

#(#*C Q 2(C L#(#* Q >M

Q 2

4>& Deduce #%# V 7&

#%# V 7& Q ## V #7

Q #%> V 7& L> V 7 Q >M

Q #(

46& Deduce #*7*C* V #*7C* V #*7C

#*7*C* V #*7C* V #*7C Q #*C*%7* V 7& V #*7*C

Q #*C* V #*7C L# V #* Q >M

Q #*%C* V 7C&

Q #*%C* V 7& L# V #*7 Q # V 7M

44& Deduce #7 V %#C&* V #7*C%#7 V C&


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#7 V %#C&* V #7*C%#7 V C& Q #7 V %#C&* V ##7*7C V #7*CC

Q#7 V %#C&* V #7*CC L#(#* Q 2M

Q#7 V %#C&* V #7*C L#(# Q >M

Q#7 V #* V C* Q#7*C L%#7&* Q #* V 7*M

Q#* V 7 V C* V #7*C L# V #7* Q # V 7M

Q#* V 7*C V 7 V C* L# V #*7 Q # V 7M

Q #* V 7 V C* V 7*C

Q#* V 7 V C* V 7*

Q#* V C* V >

Q > L# V > Q>M

4?& +implify the folloing expression ` Q %# V 7&%# V C* &%7* V

C* & ` Q %# V 7&%# V C* &%7* V C* &

Q %##* V #C V#*7 V7C &%7* V C*& L#(#* Q 2M

Q %#C V #*7 V 7C&%7* V C* &

Q #7*C V #CC* V #*77* V #*7C* V 77*C V 7CC*

Q #7*C V #*7C*

4;& +ho that %S V * V S`&% S V `*&%S*`& Q 2

%S V `* V S`&% S V `*&%S*`& Q %S V `* V S&%S V `* &%S* V `& L# V #*7 Q # V 7M

Q %S V * &%S V * &%S* & L# V # Q >M

Q %S V * &%S*`& L#(# Q >M

Q S(S* V *(S*(`

Q 2 L#(#* Q 2M

49& Pro!e that #7C V #7C* V #7*C V #*7C Q #7 V #C V 7C

#7C V #7C* V #7*C V #*7CQ#7%C V C*& V #7*C V #*7C

Q#7 V #7*C V #*7C

Q#%7 V 7*C& V #*7C

Q#%7 V C& V #*7C

Q#7 V #C V #*7C

Q7%# V C& V #C


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ii& )he map method is restricted in its capability since they are useful for

simplifying only 7oolean expression represented in standard form(

?4& hat is a $arnaugh map]

# $arnaugh map or $ map is a pictorial form of truth table' in hich the map diagram is

made up of s@uares' ith each s@uares representing one minterm of the function(

??& /ind the minterms of the logical expression ` Q #*7*C* V #*7*C V #*7C V

#7C* Q #*7*C* V #*7*C V #*7C V #7C*

Qm2 V m> Vm4

Vm9 Qm%2' >' 4' 9&

?;& rite the maxterms corresponding to the logical expression

` Q %# V 7 V C* &%# V 7* V C*&%#* V 7* V C&

Q %# V 7 V C* &%# V 7* V C*&%#* V 7* V C&

Q>(4(9

Q %>'4'9&

?9& hat are called don,t care conditions]

In some logic circuits certain input conditions ne!er occur' therefore the

corresponding output ne!er appears( In such cases the output le!el is not defined' itcan be either high or lo( )hese output le!els are indicated by GS, orGd, in the truthtables and are called don,t care conditions or incompletely specified functions(

?3& hat is a prime implicant]

# prime implicant is a product term obtained by combining the maximum possiblenumber of adjacent s@uares in the map(

?B& hat is an essential implicant]

If a min term is co!ered by only one prime implicant' the prime implicant is

said to be essential


76/135

,art .

>& +implify the boolean function using tabulation method(

/ Q %2'>'6'B'>2'>>'>?'>;&

>'>;& '64'6;'6T'4>&

/i!e !ariables hence to !ariable $ maps one for # Q 2 and the other for #Q>(

/ Q #*7*E* V 7=*E V #CE

?& btain the canonical sum of products of the function ` Q #7 V

#C= ` Q #7 %C V C*&%= V =*& V #C= %7 V 7*&

` Q #7C= V #7C=* V #7C*= V #7C*=* V #7*C=


77/135

;& +tate the postulates and theorems of 7oolean algebra(


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UNIT I0 : 898 MICRO,ROCESSOR

7loc$ diagram of microcomputer #rchitecture of B2B; Pin configuration Instruction set

#ddressing modes +imple programs using arithmetic and logical operations(

Internal #rchitecture of B2B; icroprocessor

Control nit

5enerates signals ithin uP to carry out the instruction' hich has beendecoded( In

reality causes certain connections beteen bloc$s of the uP to be opened orclosed' so

that data goes here it is re@uired' and so that #


79/135

)he B2B;1B2B2# has six general-purpose registers to store B-bit dataJ these areidentified as 7'C'='E'H' and < as shon in the figure( )hey can be combined asregister pairs - 7C' =E' and H< - to perform some >9-bit operations( )he

programmer can use these registers to store or copy data into the registers byusing

data copy instructions(

#ccumulator)he accumulator is an B-bit register that is a part of arithmetic1logic unit %#9-bit register(

)he microprocessor uses this register to se@uence the execution of theinstructions(


80/135

)he function of the program counter is to point to the memory address fromhich the

next byte is to be fetched( hen a byte %machine code& is being fetched' theprogram

counter is incremented by one to point to the next memory location+tac$ Pointer %+P&

)he stac$ pointer is also a >9-bit register used as a memory pointer( It points to amemory location in D1 memory' called the stac$( )he beginning of the stac$ isdefined by loading >9-bit address in the stac$ pointer( )he stac$ concept is

explained

in the chapter O+tac$ and+ubroutines(O Instruction Degister1=ecoder

)emporary store for the current instruction of a program( 9 bits Q >9 ires( 7inary number carried alerts


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odern day microprocessors' li$e B24B9' B2?B9 ha!e much larger busses()ypically

>9 or 46 bit busses' hich allo larger number of instructions' more memorylocation' and faster arithmetic( icrocontrollers organi0ed along same lines'

exceptA

because microcontrollers ha!e memory etc inside the chip' the busses may all be

internal( In the microprocessor the three busses are external to the chip %exceptfor the

internal data bus&( In case of external busses' the chip connects to the busses !iabuffers' hich are simply an electronic connection beteen external bus and theinternal data bus(

;3 898 ,in descri$tion3

Properties+ingle V ;" +upply

? "ectored Interrupts %ne is Non as$able&+erial In1+erial ut Port

=ecimal' 7inary' and =ouble Precision #rithmetic

=irect #ddressing Capability to 9? bytes of memory)he Intel B2B;# is a ne generation' complete B bit parallel central processing

unit

%CP&( )he B2B;# uses a multiplexed data bus( )he address is split beteen the

Bbit

address bus and the Bbit data bus( /igures are at the end of the document(Pin =escription

)he folloing describes the function of each pinA

A< ) A=s *Out$ut ; State+

#ddress 7usJ )he most significant B bits of the memory address or the B bits of the I12address'4 stated during Hold and Halt modes(AD9 ) > *In$ut?Out$ut ;state+

ultiplexed #ddress1=ata 7usJ


83/135

enables the address to get latched into the on chip latch of peripherals( )he

falling

edge of #


84/135

and immediately after an interrupt is accepted(IN)# %utput&

IN)EDDP) #CN


85/135

instruction(

"ccV; !olt supply(

"ss

5round Deference(

@3 898 Functional Descri$tion)he B2B;# is a complete B bit parallel central processor( It re@uires a single V;

!olt

supply( Its basic cloc$ speed is 4 H0 thus impro!ing on the present B2B2*sperformance ith higher system speed( #lso it is designed to fit into a minimumsystem of three IC*sA )he CP' a D#1 I' and a D or PD1I chip()he B2B;# uses a multiplexed =ata 7us( )he address is split beteen the higher

Bbit

#ddress 7us and the loer Bbit #ddress1=ata 7us( =uring the first cycle the

address

is sent out( )he loer Bbits are latched into the peripherals by the #ddress can be interpreted as D1 in all bus transfers( In the B2B;# the B


86/135

3(;' has a programmable mas$( )D#P is also a DE+)#D) interrupt except it isnonmas$able( )he three DE+)#D) interrupts cause the internal execution of D+)%sa!ing the program counter in the stac$ and branching to the DE+)#D) address& if theinterrupts are enabled and if the interrupt mas$ is not set( )he non-mas$able )D#Pcauses the internal execution of a D+) independent of the state of the interrupt enable ormas$s( )he interrupts are arranged in a fixed priority that determines hich interrupt is

to be recogni0ed if more than one is pending as follosA )D#P highest priority' D+)3(;'

D+) 9(;' D+) ;(;' IN)D loest priority )his priority scheme does not ta$e intoaccount the priority of a routine that as started by a higher priority interrupt(

D+)

;(; can interrupt a D+) 3(; routine if the interrupts ere re-enabled before the

end of

the D+) 3(; routine( )he )D#P interrupt is useful for catastrophic errors such aspoer failure or bus error( )he )D#P input is recogni0ed just as any other

interrupt

but has the highest priority( It is not affected by any flag or mas$( )he )D#P

input isboth edge and le!el sensiti!e(

.asic S"stem Timing

)he B2B;# has a multiplexed =ata 7us( #


87/135

)he B2B; programming model includes six registers' one accumulator' and one flagregister' as shon in /igure( In addition' it has to >9-bit registersA the stac$ pointerand the program counter( )hey are described briefly as follos(Registers

)he B2B; has six general-purpose registers to store B-bit dataJ these areidentified as

7'C'='E'H' and < as shon in the figure( )hey can be combined as register pairs-

7C' =E' and H< - to perform some >9-bit operations( )he programmer can use

these

registers to store or copy data into the registers by using data copy instructions(#ccumulator

)he accumulator is an B-bit register that is a part of arithmetic1logic unit %#


88/135

change the se@uence of a program hen C` flag is set( )he thoroughunderstanding

of flag is essential in riting assembly language programs(Program Counter %PC&

)his >9-bit register deals ith se@uencing the execution of instructions( )his

register

is a memory pointer( emory locations ha!e >9-bit addresses' and that is hythis is a

>9-bit register(

)he microprocessor uses this register to se@uence the execution of theinstructions(

)he function of the program counter is to point to the memory address fromhich the

next byte is to be fetched( hen a byte %machine code& is being fetched' theprogram

counter is incremented by one to point to the next memory location+tac$ Pointer %+P&

)he stac$ pointer is also a >9-bit register used as a memory pointer( It points to amemory location in D1 memory' called the stac$( )he beginning of the stac$ isdefined by loading >9-bit address in the stac$ pointer()his programming model ill be used in subse@uent tutorials to examine ho

these

registers are affected after the execution of an instruction(=3 =9 =; =? =4 =6 => =2

( =irect #ddressing ode

6( Degister #ddressing ode

4( Degister Indirect #ddressing ode

?( Immediate #ddressing ode

;( Implicit #ddressing ode

=irect #ddressing ode


89/135

In this mode' the address of the operand is gi!en in the instruction itself(


90/135

=ata is present in the instruction( ( 7eteen Degisters(Copy the contents of the register 7 into register =(

6( +pecific data byte to a register or a memorylocation(


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memory location can be added to the contents of the accumulator and the sum isstored in the accumulator( No to other B-bit registers can be added directly %e(g(' thecontents of register 7 cannot be added directly to the contents of the register C&( )heinstruction =#= is an exceptionJ it adds >9-bit data directly in register pairs(

+ubtraction - #ny B-bit number' or the contents of a register' or the contents of a

memory location can be subtracted from the contents of the accumulator and theresults stored in the accumulator( )he subtraction is performed in 6*s compliment' andthe results if negati!e' are expressed in 6*s complement( No to other registers can besubtracted directly(

Increment1=ecrement - )he B-bit contents of a register or a memory location can beincremented or decrement by >( +imilarly' the >9-bit contents of a register pair %suchas 7C& can be incremented or decrement by >( )hese increment and decrementoperations differ from addition and subtraction in an important ayJ i(e(' they can be

performed in any one of the registers or in a memory location(

s and all >s are replaced by 2s(

7ranching perations

)his group of instructions alters the se@uence of program executioneither conditionally or unconditionally(

Kump - Conditional jumps are an important aspect of the decision-ma$ing process inthe programming( )hese instructions test for a certain conditions %e(g(' Zero orCarry flag& and alter the program se@uence hen the condition is met( In addition'

the instruction set includes an instruction called unconditional 9um36

Call' Deturn' and Destart - )hese instructions change the se@uence of a program eitherby calling a subroutine or returning from a subroutine( )he conditional Call andDeturn instructions also can test condition flags(

achine Control perations

)hese instructions control machine functions such as Halt' Interrupt' or do nothing()he microprocessor operations related to data manipulation can be summari0ed infour functionsA

>( copying data

6( performing arithmetic operations4( performing logical operations


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?( testing for a gi!en condition and alerting the programse@uence +ome important aspects of the instruction set are noted beloA

>( In data transfer' the contents of the source are not destroyedJ only the contents

of

the destination are changed( )he data copy instructions do not affect the flags(

6( #rithmetic and 9-bit & data' an internal register' a memory location' or B-bit %or >9-bit& address(In some instructions' the operand is implicit(Instruction ord si0e

)he B2B; instruction set is classified into the folloing three groups according

to

ord si0eA

>( ne-ord or >-byte instructions

6( )o-ord or 6-byte instructions

4( )hree-ord or 4-byte instructions

In the B2B;' ObyteO and OordO are synonymous because it is an B-bit microprocessor(Hoe!er' instructions are commonly referred to in terms of bytes rather than ords(

One)."te Instructions# >-byte instruction includes the opcode and operand in the same byte(

perand%s&

are internal register and are coded into theinstruction( /or exampleA

)as$ pcode perand 7inary Code Hex CodeCopy the contents of the accumulator in the register C(

" C'# 2>22 >>>> ?/H

#dd the contents of register 7 to the contents of the accumulator(#== 7 >222 2222 B2H

In!ert %compliment& each bit in the accumulator(C# 22>2 >>>> 6/H)hese instructions are >-byte instructions performing three different tas$s( In the

first

instruction' both operand registers are specified( In the second instruction' theoperand 7 is specified and the accumulator is assumed( +imilarly' in the thirdinstruction' the accumulator is assumed to be the implicit operand( )hese instructionsare stored in B-bit binary format in memoryJ each re@uires one memory location(

" rd' rs

rd U-- rs copies contents of rs into rd(

Coded as 2> ddd sss here ddd is a code for one of the 3 general registers hich isthe destination of the data' sss is the code of the source register(

ExampleA " #'7Coded as 2>>>>222 Q 3BH Q >32 octal %octal as used extensi!ely in instruction


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design of such processors&(#== r# U-- # V r

T1o)."te Instructions

In a to-byte instruction' the first byte specifies the operation code and thesecond

byte specifies the operand( +ource operand is a data byte immediately folloing theopcode( /or exampleA

)as$ pcode perand 7inary Code Hex Code9-bit address( Note that the second byte is the lo-order addressand the third byte is the high-order address(

opcode V data byte V databyte /or exampleA)as$ pcode perand 7inary code Hex Code

)ransfer the program se@uence to the memory location 62B;H(KP 62B;H C4B;

62

/irst byte+econd 7yte)hird 7yte

)his instruction ould re@uire three memory locations to store in memory()hree byte instructions - opcode V data byte V data byteH 62H ;2H in three bytes( )his is also immediate

addressing(


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# U-- %addr& #ddr is a >9-bit address in < H order( ExampleA 4?H coded as4#H 4?H 6>H( )his is also an example of direct addressing(T( +ample Programs

rite an assembly program to add to numbersProgram"I =' B7H

"I C' 9/H" #' C>>22 22>>>222 2>2>22>2 2222#== =) PD)>HH( Processorspeed %H0& 6 - 4(>4 - 9

6( Poer supply V;"'-V;"

;"and V>6"

4( n-chip peripherals Cloc$ oscillator %similar toB66?& system controller

%similar to B66B&

+erial I1 lines


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+eparateultiplexed address

address and?( #ddress1=ata bus and data

data busses

Reset Out $in

RD 2us signalR 2us signal

;( Pins1signalsIO?MM 2us signal

A(E $in $rovides

encoded 2us

status in%ormation

)hree mas$able interrupts and

9( Interrupts one non- mas$able

DI - read interrupt mas$ 3( Instruction set +I - +et interrupt mas$

B2B; microprocessor @uestions

>( hat are the !arious registers in B2B;] - #ccumulator register' )emporary register'Instruction register' +tac$ Pointer' Program Counter are the !arious registers in B2B; (

6( In B2B; name the >9 bit registers] - +tac$ pointer and Program counter all ha!e >9 bits(

4( hat are the !arious flags used in B2B;] - +ign flag' Zero flag' #uxillary flag' Parityflag' Carry flag(

?( hat is +tac$ Pointer] - +tac$ pointer is a special purpose >9-bit register in theicroprocessor' hich holds the address of the top of the stac$(

;( hat is Program counter] - Program counter holds the address of either the first byte ofthe next instruction to be fetched for execution or the address of the next byte of a multi

byte instruction' hich has not been completely fetched( In both the cases it getsincremented automatically one by one as the instruction bytes get fetched( #lso Programregister $eeps the address of the next instruction(

9( hich +tac$ is used in B2B;] -


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97/135


98/135

#nsA >6 address lines(

>9( hat are the Control signals used for =# operation]#nsA-HB( T( hat is meant by polling]

#nsA-Polling or de!ice polling is a process hich identifies the de!ice that hasinterrupted the microprocessor(

62( hat is meant by interrupt]

#nsA-Interrupt is an external signal that causes a microprocessor to jump toa specific subroutine(

6>( Explain priority interrupts of B2B;(

#nsA-)he B2B; microprocessor has fi!e interrupt inputs( )hey are )D#P' D+) 3(;' D+)9(;' D+) ;(;' and IN)D( )hese interrupts ha!e a fixed priority of interrupt ser!ice( Ifto or more interrupts go high at the same time' the B2B; ill ser!ice them on priority

basis( )he )D#P has the highest priority folloed by D+) 3(;' D+) 9(;' D+) ;(;( )hepriority of interrupts in B2B; is shon in the table(

)D#P >

D+) 3(; 6

D+) 9(; 4D+) ;(; ?

IN)D ;

66( hat is a microcomputer]

#nsA-# computer that is designed using a microprocessor as its CP is calledicrocomputer64( hat is the signal classification of B2B;

#nsA-#ll the signals of B2B; can be classified into 9groups #ddress bus=ata bus

Control and status signalsPoer supply and fre@uency signalsExternally initiated signals


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+erial I1 ports

6?( hat are operations performed on data in B2B;

#nsA- )he !arious operations performed are +tore B-bit data Perform arithmetic andlogical operations)est for conditions +e@uence the execution of instructions +tore datatemporarily during execution in the defined D1 memory locations called the stac$

6;( +teps in!ol!ed to fetch a byte in B2B;#nsA-i( )he PC places the >9-bit memory address on the address bus

ii( )he control unit sends the control signal D= to enable the memorychip iii( )he byte from the memory location is placed on the data bus

i!( )he byte is placed in the instruction decoder of the microprocessor and the tas$ iscarried out according to the instruction69( Ho many interrupts does B2B; ha!e' mention them

#nsA-)he B2B; has ; interrupt signalsJ they are IN)D' D+)3(;' D+)9(;'D+);(; and )D#P

63( 7asic concepts in memory interfacing#nsA-)he primary function of memory interfacing is that the microprocessor should beable to read from and rite into a gi!en register of a memory chip( )o perform theseoperations the microprocessor should 7e able to select the chipIdentify the register(Enable the appropriate buffer

6B( =efine instruction cycle' machine cycle and )-state

#nsA-Instruction cycle is defined' as the time re@uired completing the execution of aninstruction( achine cycle is defined as the time re@uired completing one operation ofaccessing memory' I1 or ac$noledging an external re@uest( )cycle is defined as onesubdi!ision of the operation performed in one cloc$ period

6T( hat is an instruction]

#nsA-#n instruction is a binary pattern entered through an input de!ice tocommand the microprocessor to perform that specific function42( hat is the use of #


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#nsAH9-bit

#rithmetic Instructions -#== D =CD


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+tac$ Pointer %>9&Program Counter %>9&4T( =efine stac$ and explain stac$ related instructions

#nsA)he stac$ is a group of memory locations in the D1 memory that is used for thetemporary storage of binary information during the execution of the program( )he stac$

related instructions are P+H PP

?2( hy do e use SD# # instruction

#nsA)he SD# # instruction is used to clear the contents of the #ccumulator and storethe !alue 22H(

?>( Compare C#


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6(hen DE) is executed the +P is incremented by to4(Has B conditional DE)DN instructions

>(PP transfers the contents of the top to locations of the stac$ to the specifiedregister pair

6( hen PP is executed the +P is incremented by to

4(No conditional PP instructions

?9(hat is interrupt ser!ice routine]

#nsAInterrupt means to brea$ the se@uence of operation( hile the CP isexecuting a program an interrupt brea$s the normal se@uence of execution ofinstructions di!erts its execution to some other program( )his program to hich thecontrol is transferred is called the interrupt ser!ice routine(

,ARTB.

>( =ra the functional bloc$ diagram of B2B;' and explain in brief( %>9&6( hat are the different addressing modes used in B2B;( Explain ith an example( %>9&

4( =iscuss the interrupt system in B2B;( %>9&

?( hat are the memories mapped I1' I1 mapped I1 explain( %>9&

;( =ra the timing diagram for IN ) instructions of B2B;( %>9&

3( a( =ra the bloc$ diagram of B2B; mp and explain] %>6&

b( rite an assembly language program to add to 6-digits 7C= Number] %?&

B( a( Explain the instruction set of B2B;] %>2&

b( rite notes on status flag] %9&T( a( Explain the architecture of Intel B2B; ith the help of a bloc$ diagram] %>6&

b( Explain the similarities diff b1 subtract and compare instructions in B2B;] %?& >2

>2( a( =escribe the se@uence of e!ent that may occur during the different ) state in the

opcode /etch machine cycle of B2B;] %B&

b( rite an assembly language program to con!ert on array of #+CII code to corresponding

7inary %hex& !alue( )he #+CII array is stored starting from ?622H()he first element of the

number of elements in the array( %B&

>>( a( ith neat bloc$ diagram explain the architecture of B2B;] %>2&

b( 6( a( Ho do the instructions of B2B; is classified based on their function and ord length]5i!e

an example] %B&

b( rite an #


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>4( %a&+pecify the contents of the registers and the flag status as the folloing instructions are

executed(%B&

i( "I #' 22H

ii( "I 7' /BH

iii( " C' #

i!( " =' 7

!( H(%B&

>?( %a&hy the loer order address bus is multiplexed ith data bus] Ho they ill be demultiplexed] %B& %b& =ifferentiate beteen mas$able and non-mas$able interrupts(%B&

>; (%a&rite an B2B; assembly language program using minimum number of instructions toadd the >9 bit no( in 7C' =E H9 bit result in =E pair( %B&

b& Explain the similarities diff b1 subtract and compare instructions in B2B;] %B&

>9( %a&Explain in detail the folloing instructionsA- %i& #=C %ii&


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UNIT 0: INTERFACIN' AND A,,(ICATIONS OF

MICRO,ROCESSOR

7asic interfacing concepts Interfacing of Input and output de!ices #pplications of microprocessor temperature control +tepper motor control

)raffic light control(

#D) /unctionality

)he #D) is a uni!ersal asynchronous recei!er1transmitter' hich is modeled on thereal-orld( Intel B6;> peripheral interface adapter component( In the model e areconsidering' the #D) consists of three main bloc$s(

_ a serial transmit bloc$

_ a serial recei!e bloc$ and

_ a CP Interface %I1/& bloc$(

)he serial transmit bloc$ has to buffers %/I/& into hich data is ritten bythe CP I1/ bloc$( #fter the data is ritten into the buffers it is transmitted serially onto

)S=( #s long as the /I/ is not full the serial transmit bloc$ sets the signal )SD=`high(

)he serial recei!e bloc$ has four buffers %/I/&( )he bloc$ chec$s for the parityand the !alidity of the data frame on the DS= input and then rites correct data into its

buffers( It also sets the signal DSD=` lo if its /I/ is empty(

)he CP I1/ bloc$ is responsible for reading the status register' data register andriting data into interrupt enable register and data register( It recei!es control signalsfrom the CP for

performing certain tas$s( )he different functions for the set of control signals is gi!en inatabular form belo(

=S+ D1 CP I1/ /unction

2 D Dead status register

2 rite interrupt enable

register

> D Decei!e data from

recei!e bloc$ into dataregister(

> rite data register transmit data into

transmit /I/(

)he SIN) is asserted hen there is an interrupt factor' i(e( atleast one of statusregister bits is asserted' and is also not mas$ed by a corresponding bit in the interruptenable register( 7its 2' >' 6 of the interrupt enable register mas$ the bits 2' >'6 of the

status register( )he bloc$ diagram for the #D) ith its I1 ports and three main bloc$sis gi!en belo in /igure>


105/135

)he timing chart for the reading and riting operations' and the serial dataformat' are gi!en belo in /igure 6 %6(> through 6(4&(


106/135

6( +ystem partitioning and Component =escription

)he #D) can be di!ided into se!eral sub-components' according to differentfunctionality( )he description of each of these components is gi!en next section( )he

bloc$ diagram depicting the more detailed component partitioning is shon in /igures 4and ?(


107/135

)he bloc$ diagram shos the different components( )he =S+' SC+' =#)#'SD' SD= inputs are synchroni0ed ith the cloc$ by their respecti!e synchroni0ing

bloc$s each of hich register the signals tice(

)he CP I1/ registers the status register' interrupt enable register' and data

register are modeled separately( Each of these components ha!e =S+>' SD1SD=as control signals( )he transmit and recei!e /I/,s are separated from theircorresponding control bloc$s the transmit and recei!e bloc$s( )he DS= is passedthrough an I// and the )S= goes through an // before being output( )he data goesthrough an // before being ritten onto =#)# output(6(>( )he Components

=#)#+ynchA )his component registers the =#)# signal tice so as to synchroni0e itith thesystem cloc$ C9( )he synchroni0ed signal is databus>(

=S++ynchA )his component registers the =S+ signal tice so as to synchroni0e itith thesystem cloc$ C9( )he synchroni0ed output is =S+>(

SC++ynchA )his component registers the SC+ signal tice so as to synchroni0e it iththesystem cloc$ C9( )he synchroni0ed output is SC+>(

SD+ynchA )his component registers the SD signal tice so as to synchroni0e itith thesystem cloc$ C9( )he synchroni0ed output is SD(

SD=+ynchA )his component registers the SD= signal tice so as to synchroni0e it iththesystem cloc$ C9( )he synchroni0ed output is SD=(

DS=I//A )he DS= input is synchroni0ed ith the cloc$ before being read by therecei!e bloc$()he synchroni0ed output is rxd(

=#)#//A )he data from the data register1status register is registered once beforebeingritten onto =#)# output(

=ata )ristate 7ufferA )his component dri!es the data bus output( It sets it to databus6hen


108/135

the SD= is asserted and to high impedance otherise(

SIN)//A )he interrupt factor signal xintd is registered once before being output asSIN)(

)S=//A )he transmit data signal from the serial transmit bloc$ txd is synchroni0ed

ith thecloc$ before being output onto )S= output(

+tatus DegisterA )his component represents the status of the #D)( )he register has)SD=`'

DSD= ' PEDD as its contents corresponding to bits 2' >' 6 respecti!ely( Its data isused togenerate the interrupt factor xintd(

Interrupt Enable DegisterA )he contents of this register are used to mas$ the interruptsthe CP

does not ant to process( =ata on the databus> bus %bits 6 donto 2& is ritten intothis register

hen both =S+> and SD are lo( )he SIN) generator uses this register contents tomas$the unanted interrupts(

SIN) 5eneratorA )his component generates the interrupt from the status register dataand the

interrupt enable register data( )he e@uation for the interrupt signal xintd generation is asgi!en

belo(

)ransmit /I/A )he /I/ is B-bit by 6-ord( It recei!es control signals from the serialtransmit

bloc$( )he data on signal databus> is ritten into its buffer hen DP is asserted( #tthe same

time the rite pointer is incremented( )he data is read onto the stbfifodata signalhen the

stbfiforead is asserted( )he stbfiforeadinc asserted at the same time asstbfiforead'

increments the read pointer by one( )he read pointer is reset hen the read pointer hasreached

its maximum( )he rite pointer is cleared hen the rite pointer has reached itsmaximum( )he)SD=` is set lo hen the /I/ is full(

Decei!e /I/A )he /I/ is B-bit by ?-ord( It recei!es control signals from the serialrecei!e


109/135

bloc$( )he data recei!ed from the recei!e bloc$' recdata is ritten into its buffer hensrbfiforite is asserted( )he srbfiforiteinc asserted at the same time assrbfiforite'increments the rite pointer by one(

)he data is read onto the databus6 signal hen the SD= is asserted( )hesrbfiforeadinc

asserted at the same time as srbfiforead increments the read pointer by one( )he readpointer is

reset hen the read pointer has reached its maximum !alue( )he rite pointer is clearedhen

the rite pointer reaches its maximum limit before further increment( )he DSD=` isassertedlo hen the /I/ is empty(

+erial )ransmit 7loc$A )his component is responsible for serial transmission of dataonto )S=(

It generates the re@uisite control signals for reading and riting the transmit /I/( )his

component can be di!ided into sub-components to ma$e modeling easier( )he bloc$diagram forthis is gi!en belo in /igure 4(

#ll the sub-components ha!e SC+> as chip enable and SD+) as reset signals( )hetransmit

cloc$ counter counts the C9 cloc$ cycles and sets the stbcl$>9 high after e!ery>9 cloc$

cycles( )his signal is used as a enable by the transmit data counter' and the transmitbloc$( )he

transmit data counter $eeps count of the number of data bits transmitted onto txd( )hedata

count is incremented hen stbdci is asserted and cleared hen stbdcc is asserted(

)hesesignals are pro!ided by the transmit control bloc$( )he parity counter counts the numberof bits

that ere high in the eight bits of data being transmitted( )he parity count isincremented on

assertion of stbpci and cleared on assertion of stbpcc( )hese to signals are pro!idedby thetransmit bloc$(


110/135

)he transmit control bloc$ controls the hole process of transmission( It ismodeled in the form of a state machine( )he state machine has three states namelyA

I=( It then transmits the data bit by bit on e!ery stbcl$>9 high until the countreaches T( #fter this it sends the parity bit corresponding to the parity countstbparcount( hen the count becomes greater than >2 it transmits stop bit and assertstransmitted signal(

+erial Decei!e 7loc$A )his component is responsible for serial recei!ing of data onDS=( It


111/135


112/135

)he recei!e control bloc$ controls the hole recei!ing process( It is modeled in the formof a

state machine( )he state machine has four states namelyA I=


113/135

Hoe!er' most often the functionality the B6;; offered is no not implemented ith theB6;; chip itself anymore' but is embedded in a larger " and #2 allo to successi!ely access any one of the ports or the control registeras listed beloA

#> #2 /unction

2 2 port #

2 > port 7

> 2 port C

> > control register

)he control signal O*CS: 43in ;5 is used to enable the ie> when C+ Q *2' the B6;; is enabled( )he DE+E) input %pin 4;& is connected toa system %li$e B2B;' B2B9' etc( & reset line so that hen the system is reset' all the portsare initialised as input lines( )his is done to pre!ent B6;; and1or any peripheralconnected to it' from being destroyed due to mismatch of ports( )his is explained asfollos( +uppose an input de!ice is connected to B6;; at port #( If from the pre!iousoperation' port # is initialised as an output port and if B6;; is not reset before using thecurrent configuration' then there is a possibility of damage of either the input de!iceconnected or B6;; or both since both B6;; and the de!ice connected ill be sending out

data(

)he control register or the control logic or the command ord register is an B-bitregister used to select the modes of operation and input1output designation of the ports(

$perational %odes of &((

)here are to main operational modes of B6;;A

>( Input1output mode 6( 7it set1reset mode

In$ut?Out$ut Mode

)here are three types of the input1output mode( )hey are as follosA


114/135

Mode 9

In this mode' the ports can be used for simple input1output operations ithouthandsha$ing( If both port # and 7 are initiali0ed in mode 2' the to hal!es of port C can

be either used together as an additional B-bit port' or they can be used as indi!idual ?-bitports( +ince the to hal!es of port C are independent' the may be used such that one-

half is initiali0ed as an input port hile the other half is initiali0ed as an output port(

Mode =

hen e ish to use port # or port 7 for handsha$e %strobed& input or output operation'e initialise that port in mode > %port # and port 7 can be initilalised to operate indifferent modes'ie' for eg' port # can operate in mode 2 and port 7 in mode >&( +ome ofthe pins of port C function as handsha$e lines(

/or port 7 in this mode %irrespecti!e of hether is acting as an input port or outputport&' PC2' PC> and PC6 pins function as handsha$e lines(

If port # is initialised as mode > input port' then' PC4' PC? and PC; function ashandsha$e signals( Pins PC9 and PC3 are a!ailable for use as input1output lines(

If port # is initialised as mode > output port' then pins PC4' PC9 and PC3 function ashandsha$e signals( PC? and PC; are a!ailable as input1output lines(

Mode

nly group # can be initialised in this mode( Port # can be used for bidirectionalhandshake data transfer( )his means that data can be input or output on the same eight

lines %P#2 - P#3&( Pins PC4 - PC3 are used as hansha$e lines for port #( )he remainingpins of port C %PC2 - PC6& can be used as input1output lines if group 7 is initialised inmode 2( In this mode' the B6;; may be used to extend the system bus to a sla!emicroprocessor or to transfer data bytes to and from a floppy dis$ controller(

7it +et1Deset %7+D& mode

In this mode only port C can be used %as an output port&( Each line

me 2255 - electronics and microprocessors

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