meljun cortes arithmetic and logic instructions

* Property of STI of 17

Arithmetic Instructions and Logic instructions

Computer Organization and Assembly Language

The NEG Instruction

Ø The NEG (Negate) instruction converts the specified operand to its 2’s complement equivalent and the result returned to the operand location. This is, in effect, reversing the sign of an integer.

Format: NEG DAction: D 0 - [D]

NEG byte ptr [BX]MM

NEG AXregister

ExampleDestination




Example – NEG Instruction

Ø Determine the value of AL and the value of the flags (assume all flags are initially 0) following the instruction sequence:

MOV AL, 05HNEG AL




The CMP Instruction

Ø The CMP (Compare) instruction subtracts the source operand from the destination operand. It then discards the result but it updates the values of all the status flags.

Format: CMP D, SAction: [D] - [S]

CMP byte ptr [BX], 34HimmediateMM

CMP SI, ABCDHimmediateregister

CMP BETA, DXregisterMM

CMP CX, BETAMMregister

CMP BX, CXregisterregister

ExampleSourceDestination




Example – CMP Instruction

Ø Unless otherwise stated, determine the contents of all the affected general purpose registers and flags after executing the following program. Each instruction is dependent of one another. Whenever necessary, use the memory map (handout) for additional data. Assume the following register contents and assume that all flags are initially 0:

CMP AX, BXCMP [SI], DI

4000HES =001EHSI =001BHDX =

2000HSS =0017HDI =0012HCX =

2000HDS =0035HSP =0019HBX =

3000HCS =0002HBP =0015HAX =




Program Tracing Example 1

Trace the following program. Assume the following: all flags and registers (unless specified otherwise) are initially zero, DS = 2000H, SS = 2001H, the label ALPHA = 001CH. Use the memory map (if necessary).

MOV AX, ALPHAMOV SP, AXPOP BXADD BX, AXSUB BX, 9F79HXCHG BX, BPMOV CX, [BP]SBB AX, CXADC AX, 0029HADD AL, CLDAANEG AXLEA SI, ALPHAMOV DX, [SI]




The AND Instruction

Ø The AND (Logical AND) instruction logically ANDs the source and the destination operands and stores the result in the destination operand.

Format: AND D, SAction: D [D] ⋅ [S]

AND byte ptr BETA, 12HImmediateMM

AND BX, 0015Himmediateregister

AND BETA, CXregisterMM

AND DX, [BP + SI]MMregister

AND BX, CXregisterregister





Example – AND Instruction

Ø Determine the value of affected registers and the value of the flags (assume all flags are initially 0) following the instruction sequence:

MOV AL, 05HMOV BL, FEHAND AL, BL




The OR Instruction

Ø The OR (Logical OR) instruction logically ORs the source and the destination operands and stores the result in the destination operand.

Format: OR D, SAction: D [D] + [S]

OR byte ptr BETA, 12HimmediateMM

OR BX, 0015Himmediateregister

OR BETA, CXregisterMM

OR DX, [BP + SI]MMregister

OR BX, CXregisterregister





Example – OR Instruction


MOV CL, 05HMOV DL, 80HOR CL, DL




The XOR Instruction

Ø The XOR (Logical XOR) instruction logically XORs the source and the destination operands and stores the result in the destination operand.

Format: XOR D, SAction: D [D] ⊕ [S]

XOR byte ptr BETA, 12HimmediateMM

XOR BX, 0015Himmediateregister

XOR BETA, CXregisterMM

XOR DX, [BP + SI]MMregister

XOR BX, CXregisterregister





Example – XOR Instruction


MOV AL, 15HMOV BL, ABHXOR AL, BL




The NOT Instruction

Ø The NOT (Logical NOT) instruction performs a 1’s complement on the operand.

Format: NOT DAction: D [D]’

NOT byte ptr BETAMM

NOT AXregister

ExampleDestination




Example – NOT Instruction

Ø Perform the following operation. Each instruction is dependent on one another. Assume that all flags are initially 0:

MOV BX, D32BHMOV CX, 1056LHNOT BX NOT CH




The TEST Instruction

Ø The TEST instruction logically ANDs the source and the destination operands. The result is discarded but the values of the status flags are updated.

Format: TEST D, SAction: [D] ⋅ [S]




Example – NOT Instruction

Ø Perform the following operation. Each instruction is dependent on one another. Assume that all flags are initially 0:

MOV SI, 2376HMOV DI, 1941HTEST SI, DI




Logic Instruction Program Tracing Example

Ø Trace the following program. Assume the following: all flags and registers (unless specified otherwise) are initially zero, DS = 2000H, SS = 2001H, the label ALPHA = 001CH. Use the memory map (if necessary).

MOV BX, ALPHAMOV SP, BXNEG BXAND BX, [AX]OR BX, 0020HCMP BX, SPMOV CX, [SP]TEST BX, CXNOT AXXOR AL, CL




Program Tracing Exercise 1

Ø Trace the following program. Assume the following: all flags and registers (unless specified otherwise) are initially zero, DS = 2000H, SS = 2001H, the label ALPHA = 001CH. Use the memory map (if necessary).

MOV AL, 23HMOV CH, 6BHXOR AL, 0CHADD AL, 77HNEG BXAND CH, 33HXOR CH, AAHTEST CH, ALDEC AXOR CH, ALSUB AX, CX

meljun cortes arithmetic and logic instructions

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