microcontroller systems part 1. figure 1.1elements of a digital controller cpu central processing...
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MICROCONTROLLER SYSTEMS
Part 1
Figure 1.1 Elements of a digital controller
CPU
Central Processing
Unit
InputPeripherals
OutputPeripherals
ROM Read OnlyMemory
RAMRead & Write
MemoryProgramdownload
User input User output
The microcontroller contains all these elements in one chip
Figure 1.2 16F877 pin-out
The microcontroller pins have multiple functions
Figure 1.3 PIC 16F877 MCU Block diagram
Shows the main parts of the chip in simplified form
FlashROM
ProgramMemory
8192 x 14 bits
0000 – 1FFF
Instruction Register
MCUcontrol lines
Program Counter(13 bits)
Stack13 bits
x 8 levels
RAMFile
Registers368
X 8 bits
000-1FF
Data Bus(8 bits)
File SelectRegister
Working (W)Register
File Address
Literal
Op-code
Instructions
Address
Arithmetic & Logic Unit
Ports, TimersADC, Serial I/O
Status bits
Timing control
EEPROM256 bytes
Clock Reset
Port A B C D E
Program address
Instruction Decode &
CPU control
Status (Flag)Register
Table 1.1 PIC16F877 simplified file register map
Bank 0 (000 – 07F) Bank 1 (080 – 0FF) Bank 2 (100-180) Bank 3(180-1FF)
Address Register Address Register Address Register Address Register
000h Indirect 080h Indirect 100h Indirect 180h Indirect
001h Timer0 081h Option 101h Timer0 181h Option
002h PC Low 082h PC Low 102h PC Low 182h PC Low
003h Status Reg 083h Status Reg 103h Status Reg 183h Status Reg
004h File Select 084h File Select 104h File Select 184h File Select
005h Port A data 085h PortA direction 105h - 185h -
006h Port B data 086h PortB direction 106h Port B data 186h PortB direction
007h Port C data 087h PortC direction 107h - 187h -
008h Port D data 088h PortD direction 108h - 188h -
009h Port E data 089h PortE direction 109h - 189h -
00Ah PC High 08Ah PC High 10Ah PC High 18Ah PC High
00Bh Interrupt Control 08Bh Interrupt Control 10Bh Interrupt Control 18Bh Interrupt Control
00Chto
01Fh
20 PeripheralControl
Registers
08Chto
09Fh
20 PeripheralControl
Registers
10Chto
10Fh
4 PeripheralControl
Registers
18Chto
18Fh
4 PeripheralControl
Registers
110hto
16Fh
96 GeneralPurposeRegisters
190hto
1EFh
96 GeneralPurpose
Registers
020hto
06Fh
80 GeneralPurposeRegisters
0A0hto
0EFh
80 GeneralPurposeRegisters
070hto
07Fh
16 CommonAccess GPRs
0F0hto
0FFh
Accesses70h – 7Fh
170hto
17Fh
Accesses70h – 7Fh
1F0hto
1FFh
Accesses70h – 7Fh
Table 1.2 PIC microcontroller types
MCU
Pins
Dataword(bits)
Programmemory(bytes)
Typical
InstructionSet
SpeedMIPS
Comment
10FXXX
= 6 8 <= 51233 x 12
bits<= 2
Low pin count, small form factor, cheapNo EEPROM, none low power, assembler program
12FXXX
= 8 8 <= 2 KB 12 / 14 bits <= 5Low pin count, small form factor, cheapEEPROM, 10-bit ADC, some low power, assembler
16FXXX
<= 64 8 <= 14 KB35 x 14
bits<= 5
Mid-range, UART, I2C, SPImany low power, C or assembler program
18FXXXX
<= 100
8<= 128
KB75 x 16
bits<= 16 High range, CAN, USB
J series 3V supply, C program
24FXXXX
<= 100
16<= 128
KB
76 x 24 bits
= 16
Power range, 3V supply, no EEPROM,data RAM < 8 KB, C program
Figure 1.4 I/O pin operation
The pin can be set for input or output data transfer
CPU Data Bus OutputCurrentDriver
OutputDataLatch
DataDirection
LatchTri-stateOutputEnable
InputDataLatch
Write data bit
Read data bit
Write TRIS bit
Analogue inputmultiplexer
Figure 1.5 General Timer Operation
A binary counter is used as a timer when driven from the clock
Binary CounterPre-
scaler(clock divide)
Post-scaler(output divide)
TimerOverflow/Timeout(Interrupt)Flag
ClockSourceSelect
Instruction Clock
External Pulse
Capture register
Compare register
Capture signal
Match flag
Figure 1.6 ADC operation
The ADC converts an analog input into a binary code
ANx
Analogue to DigitalConverter
Vref+
Input volts 0-Vf
Reference volts, Vf8-bit or 16-bitinteger result
Setup ADC
Read ADC
Figure 1.7 Comparator operation
Vc+
Vc-
Compartor status bitVc+ > Vc-
The comparator simply sets a bit if one input is higher than the other
Figure 1.8 Parallel Slave Port operation
The PSP allows an external data bus to be connected to the MCU
ParallelSlave Port
Chip selectReadWrite
EXTERNALData x 8
Interrupt
INTERNALData x 8
Table 1.3 Interrupts sources in the PIC 16F877
Interrupt Source Interrupt trigger event CCS C Interrupt label
TIMERS
Timer 0 Timer 0 register overflow INT_TIMER0
Timer 1 Timer 1 register overflow INT_TIMER1
CCP 1 Timer 1 capture or compare detected INT_CCP1
Timer 2 Timer 2 register overflow INT_TIMER2
CCP2 Timer 2 capture or compare detected INT_CCP2
PORTS
RB0/INT pin Change on single pin RB0 INT_EXT
Port B pins Change on any of four pins RB4 – RB7 INT_RB
Parallel Slave Port Data received at PSP (write input active) INT_PSP
Analog Converter A/D conversion completed INT_AD
Analog Comparator Voltage compare true INT_COMP
SERIAL
UART Serial Port Received data available INT_RDA
UART Serial Port Transmit data buffer empty INT_TBE
SPI Serial Port Data transfer completed (read or write) INT_SSP
I2C Serial Port Interface activity detected INT_SSP
I2C Serial Port Bus collision detected INT_BUSCOL
MEMORY
EEPROM Non-volatile data memory write complete INT_EEPROM
Program Execution
Program Execution
1Start counter
statement
2Run
Counteruntil
overflow
5Time-outProcess(InterruptServiceRoutine)
7Continue
3TimeoutInterrupt
6Return
fromInterrupt
4Jump to
ISR
Figure 1.9 Timer Interrupt Process
Time-out forces the program to be suspended and the ISR executed
PIC MCU
TX1 Transmit
RX1 Receive
Ground
HOST PC
RX2
TX2COM PORT
Ground
LineDriver
Interface
Figure 1.10 USART RS232 Signal
Line drivers convert the signal to a bipolar, higher voltage
+/- 12V
Figure 1.11 Typical USART RS232 signal
Bit2
Bit3
Idle StartBit
Bit0
Bit1
Bit4
Bit5
Bit6
Bit7
StopBit
Time
1
0
Bit period
The data bits are timed from the falling edge of the start bit
Master
Serial Data Out, SDOSerial Data In, SDISerial Clock, SCK
Slave Select SS1Outputs SS2
SS3
Slave 1
SDOSDISCK
!SS
Slave 2
SDOSDISCK
!SS
Figure 1.12 SPI Connections
SPI uses hardware slave selection and separate clock
Figure 1.13 SPI Signals
7 6 5 4 3 2 1 0 Data bitsSDO/SDI
SCK Clock
Each data bit is transferred on the falling edge of the clock
Master Slave1 Slave2+5V
SDASCL
etc
Figure 1.14 I2C Connections
Slave selection uses addresses issued by the Master
7 6 5 4 3 2 1 0SDA
SCL
AcknowledgeAddress / Data bits
Start
Figure 1.15 I2C Signals
Data is strobed in using the master clock, and reception is acknowledged by the slave by taking the data line low
Listing 1.1 A simple C program
/* OUTBYTE.C MPB 2-1-07 V1.0 */ #include "16F877A.h" // MCU select void main() // Main block{ output_D(255); // Switch on outputs}
This minimal program outputs a binary code to Port D
Listing 1.2 Program hex file
:1000000000308A0004280000840183131F30830518:1000100083161F149F141F159F1107309C00880121:08002000FF3083128800630029:02400E00733FFE:00000001FF;PIC16F877A
The machine code is downloaded as a binary file to the chip
Figure 1.16 Screenshot of MPLAB Project
The C program is compiled and tested in simulation mode
Figure 1.17 ICSP target board connections
Application Board
MCU
Vpp/!MCLRVddVss PGDPGC
12345
ICSPInterface
Reset
10k
Vdd VssBoard +5V Supply
Connections to the target chip for programming