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Page 1: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

MicroprocessorsSunday, Mar. 16

Dr. Asmaa FaroukFaculty of Engineering, Electrical Department,

Assiut University

Page 2: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Topics of Today• Reading:Reading:– Mazidi:

• Section 0.2: Inside the computer.

• Section 1.2: Inside the 8088/8086.

• Section 1.3: Introduction to Assembly Programming.

– Brey:• Section 2.1: Internal

Microprocessor Architecture.

Page 3: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Topics of Today

• Inside the Computer.• Inside the 8088/8086 Microprocessor.• Internal Microprocessor Architecture.• Introduction to Assembly Programming.

Page 4: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Some Important Terminology:Some Important Terminology:

Page 5: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Some Important Terminology:Some Important Terminology:– The abbreviation K is often used to represent

kilobytes.– A Megabyte, or Meg, a little over 1 million bytes;

exactly 1,048,576 bytes, with abbreviation M.– A gigabyte (over 1 billion), with abbreviation G.– A terabyte (over 1 trillion), with abbreviation T.

Page 6: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Some Important Terminology:Some Important Terminology:– Two types of commonly used memory: RAM &

ROM.• RAM: Random Access Memory: it is read/write memory

that store temporary running programs.– It is called volatile memory because data is lost when the

computer is turned-off.

• ROM: Read Only Memory: it stores the important data and information essential for computer working.– It is called nonvolatile memory because it cannot be erased by

the user (or when the computre is turned-off).

Page 7: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Organization of Computers:Internal Organization of Computers:

– Three main parts:• CPU (Central Processing Unit).• Memory.• I/O (Input / Output) devices.

Page 8: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Organization of Computers:Internal Organization of Computers:

– CPU: executes (processes) information stored in memory.

Page 9: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Organization of Computers:Internal Organization of Computers:

– The CPU is connected to memory and I/O through a group of wires called a bus.• The bus allows signals to carry information from place to place.

– There are three types of buses:• Address bus; Data bus; Control bus.

Page 10: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Organization of Computers:Internal Organization of Computers:– For any device (memory or I/O) to be recognized by

the CPU, it must be assigned an address.• No two devices can have the same address.

– The address assigned to a given device must be unique.

– The CPU puts the address (in binary form) on the address bus & decoding circuitry finds the device.

– The CPU then uses the data bus either to get data from that device or to send data to it.

– Control buses provide device read/write signals.• To indicate if the CPU is asking for, or sending

information.

Page 11: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• More about the Data Bus:More about the Data Bus:– As data buses carry information in/out of a CPU, the

more data buses available, the better the CPU.• Average bus size is between 8 and 64 bit.• More buses mean a more expensive CPU & computer.

– Computer processing power is related to bus size.• An 8-bit bus can send out 1 byte a time.• A 16-bit bus can send out 2 bytes at a time (twice as fast).

– Data buses are bidirectional, because the CPU must use them either to receive or to send data.

Page 12: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• More about the Address Bus:More about the Address Bus:– The address bus is used to identify devices and

memory connected to the CPU.• The more address bits available, the larger the number of

devices that can be connected to the computer.

– The number of CPU address bits determines the number of locations it can communicate.• Always equal to 2x where x is the number of address

lines, regardless of the size of the data bus.

– The address bus is unidirectional.• The CPU uses the bus only to send addresses out.

Page 13: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• CPU and its Relation to RAM & ROM:CPU and its Relation to RAM & ROM:– For the CPU to process information, the data must

be stored in the RAM or ROM.• The CPU cannot get the information from the disk directly

because accessing the disk is too slow.• RAM & ROM are often referred to as primary memory.• Disks are called secondary memory.

Page 14: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Inside CPUs:Inside CPUs:– A program stored in memory provides instructions

to the CPU to perform an action.• The role of the CPU is to fetch these instructions from

memory and then execute them.

Page 15: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Inside CPUs:Inside CPUs:– To perform the actions of fetch and execute, all

CPUs are equipped with resources such as:• Registers: to temporarily store information.

– 8, 16, 32, 64-bit, depending on CPU.

Page 16: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Inside CPUs:Inside CPUs:– To perform the actions of fetch and execute, all

CPUs are equipped with resources such as:• Program counter: to point to the address of the next

instruction to be executed.– In the IBM PC, a register

called IP or instruction pointer.

Page 17: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Inside CPUs:Inside CPUs:– To perform the actions of fetch and execute, all

CPUs are equipped with resources such as:• Instruction decoder: to interpret the instruction fetched

into the CPU.– Can be considered as a dictionary that stores the meaning of each instruction.

Page 18: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Inside CPUs:Inside CPUs:– To perform the actions of fetch and execute, all

CPUs are equipped with resources such as:• ALU (Arithmetic/Logic Unit): for arithmetic functions such

as add, subtract, multiply, and divide.– Also logic functions such as

AND, OR, and NOT.

Page 19: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– A step-by-step analysis of CPU processes to add

three numbers, with steps & code is shown below.• Assume a CPU has registers A, B, C, and D.• An 8-bit data bus and a 16-bit address bus.

– So, the CPU can access memory addresses 0000 to FFFFH.– A total of 64K bytes (10000H locations ).

Page 20: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– A step-by-step analysis of CPU processes to add

three numbers, with steps & code is shown below.• The action to be performed by the CPU is to put

hexadecimal value 21 into register A, and then add to register A values 42H and 12H.Move value to

register A:B0H = 1011 0000

Add value to register A:

04H = 0000 0100

Page 21: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– If the program to perform the actions listed above is

stored in memory locations starting at 1400H, the following would represent the contents for each memory address location:

Page 22: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– The CPU’s program counter can have a value

between 0000 and FFFFH.• The program counter must be set to the address of the

first instruction code to be executed: 1400H.

Page 23: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– The CPU puts the address 1400H on the address bus

and sends it out.• Memory circuitry finds the location while the CPU

activates the READ signal, indicating it wants the byte at 1400H.– The content (B0) is put on the data bus & brought to the CPU.

Page 24: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– The CPU decodes the instruction B0H with the help

of its instruction decoder dictionary.• Brings the byte of the next memory location (1401H) into

CPU Register A.

Page 25: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– After completing the instruction, the program

counter points to the address of the next instruction: 1402H.• Sent out on the address bus, to fetch the next instruction.

Page 26: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– From 1402H, the CPU fetches code 04H.

• After decoding, the CPU knows it must add the byte at the next address (1403H) to the contents of register A.– After it brings the value (42H) into the CPU, it provides the contents of Register A,

along with this value to the ALU to perform the addition.– Program counter becomes 1404H, the next instruction address.

Page 27: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– Address 1404H is put on the address bus and the

code is fetched, decoded, and executed.• Again adding a value to Register A.

– Program counter is updated to 1406H.

Page 28: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the Computer• Internal Working of Computers:Internal Working of Computers:– The contents of address 1406H (HALT code) are fetched in

and executed.• The HALT instruction tells the CPU to stop incrementing the program

counter and stop asking for the next instruction.– Without HALT, the CPU would continue updating the program counter

and fetching instructions.

Page 29: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Topics of Today

• Inside the Computer.• Inside the 8088/8086 Microprocessor.• Internal Microprocessor Architecture.• Introduction to Assembly Programming.

Page 30: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:– Two ways to make the CPU process information

faster:1) Increase the working frequency.

– Using technology available, with cost considerations.

2) Change the internal working of the CPU.– Pipelining.

Page 31: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:

– 8085 could fetch or execute at any given time.– The idea of pipelining in its simplest form is to allow

the CPU to fetch and execute at the same time.

Page 32: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:– Intel implemented

pipelining in 8088/86 by splitting the internal structure of the into two sections:

1) The Execution Unit (EU).

2) The Bus Interface Unit (BIU).

Page 33: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:– Intel implemented

pipelining in 8088/86 by splitting the internal structure of the into two sections:• These two sections

work simultaneously.

Page 34: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:– Intel implemented

pipelining in 8088/86 by splitting the internal structure of the into two sections:• The BIU accesses

memory and peripherals.

• The EU executes instructions previously fetched.

Page 35: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:– Intel implemented

pipelining in 8088/86 by splitting the internal structure of the into two sections:• This works only if the

BIU keeps ahead of the EU, so the BIU of the 8088/86 has a buffer, or queue.

Page 36: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:– Intel implemented

pipelining in 8088/86 by splitting the internal structure of the into two sections:• The buffer is 4-bytes

long in 8088 and 6-bytes in 8086.

Page 37: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Pipelining:Pipelining:– Notes:• If an instruction takes too long to execute, the queue is

filled to capacity and the buses will sit idle.• In a pipelined CPU, too much jumping reduces the

efficiency of a program.– In some circumstances, the microprocessor must flush out the

queue.– When a jump instruction is executed, the BIU starts to fetch

information from the new location in memory and information fetched previously is discarded.

– The EU must wait until the BIU fetches the new instruction.

Page 38: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Registers:Registers:– In the CPU, registers store temporarily information.• One or two bytes of data to be processed.• The address of data.

– General-purpose registers in 8088/86 processors can be accessed as either 16-bit or 8-bit registers.• All other registers can be accessed only as the full 16 bits.

– In 8088/86, data types are either 8 or 16-bits.• To access 12-bit data, for example, a 16-bit register must

be used with the highest 4 bits set to 0.

Page 39: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Registers:Registers:– The bits of a register are numbered in descending

order, as shown below:

– The first letter of each register indicates its use:• AX is used for the Accumulator.• BX is a Base addressing register.• CX is a Counter in loop operations.• DX points to Data in I/O operations.

Page 40: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Inside the 8088/8086• Registers:Registers:

Page 41: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Topics of Today

• Inside the Computer.• Inside the 8088/8086 Microprocessor.• Internal Microprocessor Architecture.• Introduction to Assembly Programming.

Page 42: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– 8086 through Core2 considered program visible.• Because its registers are used during applications

programming and are specified by the instructions.

– Other registers considered to be program invisible.• Not addressable directly during applications

programming.• Only 80286 and above contain program invisible

registers to control and operate protected memory and other features of the microprocessor.

Page 43: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– 80386 through Core2 microprocessors contain full

32-bit internal architectures.– 8086 through the 80286 are fully upward-

compatible to the 80386 through Core2.– Figure (2 - 1) illustrates the programming model of

8086 through Core2 microprocessors.• Including the 64-bit extensions.

Page 44: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– The shaded areas

represent registers that are: – Found in early versions

of the 8086, 8088, or 80286 microprocessors.

– And are provided on the 80386–Core2 microprocessors for compatibility to the early versions.

• The Programming Model:The Programming Model:

Page 45: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– 8-bit registers: AL, AH,

BL, BH, CL, CH, DL, DH.– 16-bit registers: AX (AH, AX (AH,

AL), BX (BH, BL), CX (CH, AL), BX (BH, BL), CX (CH, CL), DX (DH, DL)CL), DX (DH, DL), SP, BP, DI, SI, IP, FLAGS, CS, DS, ES, SS, FS, GS.

• The Programming Model:The Programming Model:

Page 46: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Multipurpose Registers:

• RAX: a 64-bit register (RAX), a 32-bit register (accumulator) (EAX), a 16-bit register (AX), or as either of two 8-bit registers (AH and AL).

• The accumulator is used for instructions such as multiplication, division, and some of the adjustment instructions.

• The Programming Model:The Programming Model:

Page 47: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Multipurpose Registers:

• RBX: is addressable as RBX, EBX, BX, BH, or BL.

• The BX register (base index) sometimes holds the offset address of a location in the memory system in all versions of the microprocessor.

• In the 80386 and above, EBX also can address memory data. – In the 64-bit Pentium 4 and

Core2, RBX can also address memory data.

• The Programming Model:The Programming Model:

Page 48: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Multipurpose Registers:

• RCX, as RCX, ECX, CX, CH, or CL.– A (count) general-purpose

register that also holds the count for various instructions.

• RDX, as RDX, EDX, DX, DH, or DL.– A (data) general-purpose

register.– Holds a part of the result

from a multiplication or part of dividend before a division.

• The Programming Model:The Programming Model:

Page 49: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Multipurpose Registers:

• RBP, as RBP, EBP, or BP.– Points to a memory

location (base pointer) for memory data transfers.

• RDI addressable as RDI, EDI, or DI.– Often addresses string

destination data (destination index) for the string instructions.

• The Programming Model:The Programming Model:

Page 50: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Multipurpose Registers:

• RSI used as RSI, ESI, or SI.– The (source index) register

addresses source string data for the string instructions.

• R8 - R15 found only in the Pentium 4 and Core2 if 64-bit extensions are enabled.– Data are addressed as 64-,

32-, 16-, or 8-bit sizes and are of general purpose.

• The Programming Model:The Programming Model:

• Most applications do not use these registers until 64-bit processors are common.• The 8-bit portion is the rightmost 8-bit only.• Bits 8 to 15 are not directly addressable as a

byte.

Page 51: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Special-Purpose Registers:

• Include RIP, RSP, and RFLAGS.• Segment registers include CS,

DS, ES, SS, FS, and GS.

• The Programming Model:The Programming Model:

Page 52: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Special-Purpose Registers:

• Include RIP, RSP, and RFLAGS.• Segment registers include CS,

DS, ES, SS, FS, and GS.• RIP addresses the next

instruction in a section of memory.– Defined as (instruction pointer)

a code segment.

• RSP addresses an area of memory called the stack.– The (stack pointer) stores data

through this pointer.

• The Programming Model:The Programming Model:

Page 53: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Special-Purpose Registers:

• RFLAGS indicate the condition of the microprocessor and control its operation.

• The Programming Model:The Programming Model:

Page 54: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• Figure (2-2) below shows the flag registers of all versions

of the microprocessor.

• The 8086–80286 contain a FLAG register (16-bit).

Page 55: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• Figure (2-2) below shows the flag registers of all versions

of the microprocessor.

• The 80386 and above contain an EFLAG register (32-bit Extended FLAG register).

Page 56: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• Figure (2-2) below shows the flag registers of all versions

of the microprocessor.

• The rightmost five flags and the overflow flag are changed by most arithmetic and logic operations. Data transfers do not affect them.

Page 57: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• C (carry): holds the carry after addition or borrow after subtraction.• Also indicates error conditions.

Page 58: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• P (parity): is the count of ones in a number expressed as even or odd. Logic 0 for odd parity; logic 1 for even parity.

Page 59: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• A (auxiliary carry): holds the carry (half-carry) after addition or the borrow after subtraction between bit positions 3 and 4 of the result.

Page 60: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• Z (zero): shows that the result of an arithmetic or logic operation is zero.• If Z = 1, the result is zero; if Z = 0 ,

the result is not zero.

• S (sign): flag holds the arithmetic sign of the result after an arithmetic or logic instruction executes.• If S = 1, the sign bit (leftmost bit of a number) is set (negative result); if S

= 0, the sign bit is cleared (positive result).

Page 61: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• T (trap): The trap flag enables trapping through an on-chip debugging feature.

• I (interrupt): controls operation of the INTR (interrupt request) input pin.

Page 62: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• D (direction): selects increment or decrement mode for the DI and/or SI registers in string instructions.

• O (overflow): occurs when signed numbers are added or subtracted.• An overflow indicates the result has exceeded

the capacity of the machine.• For unsigned operations, the overflow flag is

ignored

Page 63: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• IOPL (I/O privilege level): used in protected mode operation to select the privilege level for I/O devices.

• NT (nested task): flag indicates the current task is nested within another task in protected mode operation.

Page 64: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• RF (resume): used with debugging to control resumption of execution after the next instruction.

• VM (virtual mode): flag bit selects virtual mode operation in a protected mode system.

• AC (alignment check): flag bit activates if a word or double word is addressed on a non-word or non-double word boundary.

Page 65: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Model:The Programming Model:– Special-Purpose Registers:• List of each flag bit, with a brief description of its

function.

• VIF (virtual interrupt) : is a copy of the interrupt flag bit available to the Pentium 4.

• VIP (virtual interrupt pending): provides information about a virtual mode interrupt for Pentium.• Used in multitasking environments to provide

virtual interrupt flags.

• ID (identification): flag indicates that the Pentium microprocessors support the CPUID instruction.• CPUID instruction provides the system with

information about the Pentium microprocessor.

Page 66: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Segment Registers:

• Generate memory addresses when combined with other registers in the microprocessor.

• Four or six segment registers in various versions of the microprocessor.

• A segment register functions differently in real mode than in protected mode.

• The Programming Model:The Programming Model:

Page 67: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Segment Registers:

• CS (code) segment: holds code (programs and procedures) used by the microprocessor.

• DS (data): contains most data used by a program.– Data are accessed by an

offset address or contents of other registers that hold the offset address.

• ES (extra): an additional data segment used by some instructions to hold destination data.

• The Programming Model:The Programming Model:

Page 68: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Segment Registers:

• SS (stack): defines the area of memory used for the stack.– Stack entry point is

determined by the stack segment and stack pointer registers.

– The BP register also addresses data within the stack segment.

• The Programming Model:The Programming Model:

Page 69: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Internal Microprocessor Architecture• The Programming Mod– Segment Registers:

• FS and GS segments: are supplemental segment registers available in 80386–Core2 microprocessors.– Allow two additional

memory segments for access by programs.

• Windows uses these segments for internal operations, but no definition of their usage is available.

• The Programming Model:The Programming Model:

Page 70: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Topics of Today

• Inside the Computer.• Inside the 8088/8086 Microprocessor.• Internal Microprocessor Architecture.• Introduction to Assembly Programming.

Page 71: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• The CPU can work only in binary, with very high

speeds.– It is tedious & slow for humans to deal with 0s & 1s

in order to program the computer.

• A program of 0s & 1s is called “machine language”.– Early computer programmers actually coded

programs in machine language.

Page 72: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly languages were developed, which

provided mnemonics for machine code.– Mnemonic is typically used in computer science and

engineering literature to refer to codes & abbreviations that are relatively easy to remember.

Page 73: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly language is referred to as a low-level

language because it deals directly with the internal structure of the CPU.– To program in Assembly language, programmers

must know the number of registers and their size.• As well as other details of the CPU.

• Assembly language programs must be translated into machine code by a program called an “assembler”.

Page 74: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Today there are many different programming

languages, such as C/C++, BASIC, C#, etc.– Called “high-level languages” because the

programmer does not have to be concerned with internal CPU details.

• High-level languages are translated into machine code by a program called a “compiler”.– To write a program in C, one must use a C compiler

to translate the program into machine language.

Page 75: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– An Assembly language program consists of a series

of lines of Assembly language instructions.– An Assembly language instruction consists of a

mnemonic, optionally followed by one or two “operands”.• Mnemonics are commands to the CPU, telling it what to

do with those items.• Operands are the data items being manipulated.

– Two widely used instructions are MOV & ADD.

Page 76: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– MOV instruction: copies data from one location to

another using this format:

– This instruction tells the CPU to copy the source operand to the destination operand.• For example, the instruction "MOV DX,CX" copies the

contents of register CX to register DX.• After instruction execution, register DX will have the

same value as register CX.

Page 77: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– MOV instruction:

– This program first loads CL with value 55H, then moves this value around to various registers inside the CPU.

– All registers here are 8-bit registers.

Page 78: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– MOV instruction:– The use of 16-bit registers is shown here:

Page 79: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– MOV instruction rules:• In the 8086 CPU, data can be moved among all the

registers (except the flag register).– There is no such instruction as "MOV FR,AX“.

• The source and destination registers should match in size.– Code such as "MOV AL,DX" will cause an error.

» One cannot move the contents of a 16-bit register into an 8-bit register.

Page 80: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– MOV instruction rules:• Data can be moved directly into non-segment registers

only.– The following demonstrates legal & illegal instructions.

Page 81: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– MOV instruction rules:• Values cannot be loaded directly into any segment

register (CS, DS, ES, or SS).– To load a value into a segment register, load it to a non-segment

register, then move it to the segment register.

Page 82: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– MOV instruction rules:• If a value less than FFH is moved into a 16-bit register,

the rest of the bits are assumed to be zeros.– For example, in "MOV BX,5H" the result will be BX = 0005.

» BH = 00H and BL = 05H.

• Moving a value that is too large into a register will cause an error.

Page 83: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– ADD instruction:

– This tells the CPU to add the source & destination operands and put the result in the destination.• To add two numbers such as 25H and 34H, each can be

moved to a register, then added together:

• Executing the program above results in:– AL = 59H (25H + 34H = 59H) and BL = 34H.

» The content of BL does not change.

Page 84: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– ADD instruction:• The program above can be written in many ways,

depending on the registers used, such as:

• The program above results in DH = 59H and CL = 34H.

Page 85: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– ADD instruction rules:• it is not necessary to move both data items into registers

before adding them together.

• In the case above, one register contained one value, the second value followed the instruction as an operand.– This is called an immediate operand.

Page 86: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– ADD instruction rules:• An 8-bit register can hold numbers up to FFH.

– For numbers larger than FFH (255 decimal), a 16-bit register such as AX, BX, CX, or DX must be used.

• The following program can add 34EH & 6A5H:

• Running the program gives DX = 9F3H.– (34E + 6A5 = 9F3) and AX = 34E.

Page 87: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Introduction to Assembly Programming• Assembly Language Programming:Assembly Language Programming:– ADD instruction rules:• Any 16-bit non-segment registers could have been used

to perform the action above:

• The general-purpose registers are typically used in arithmetic operations.– Register AX is sometimes referred to as the accumulator.

Page 88: Microprocessors Sunday, Mar. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University

Questions?Questions?