mimo 3 preliminary test results. mimostar 2 16/05/2007 mimostar3 status evaluation of mimostar2...
DESCRIPTION
MIMOSTAR 3 16/05/ st Run: MimoStar3 Test MimoStar3 with 20 µm EPI substrate: ~100% pixel work 2 chips tested on PCB 25 & 50 MHz ) 5 on probe station 60 KHz) High ENC, Ex. ENC ~ 20 e 20 °C, t r.o. = 4 ms Confirmed by static diode leakage current measurements: 4-7 times higher than room T (I Leak < 5 fA/diode) M*3 M*2 (14 µm EPI)TRANSCRIPT
MIMO3Preliminary Test Results
MIMOSTAR [email protected] 216/05/2007
MimoStar3 Status Evaluation of MimoStar2 chip
Test in Laboratory + Beam test at DESY + Irradiation test 100% yield with RadTol pixels on 15 chips MimoStar2 performances meet STAR requirements
End of June 2006: Submission engineering run Two types of substrates (14, 20 µm EPI)
Reception (Oct. 2006) test (up to Feb. 2007) Missing HRES layer (option) in fabrication High diode leakage current
Re fabrication with HRES (Jan. 2007) VTFPP out of spec (discussion ~ 1 month)
Reception (April 2007) wafer test High diode leakage current
MimoStar3
MimoTEL Imager10µ Imager12µ
Mimosa16 Mimosa16
Latchup ADC ADC MyMap
TestStruct
MIMOSTAR [email protected] 316/05/2007
1st Run: MimoStar3 Test MimoStar3 with 20 µm EPI substrate:
~100% pixel work 2 chips tested on PCB (CK @ 25 & 50 MHz ) 5 on probe station (CK @ 60 KHz)
High ENC, Ex. ENC ~ 20 e-, @ 20 °C, t r.o. = 4 ms Confirmed by static diode leakage current measurements:
4-7 times higher than M*2 @ room T (ILeak< 5 fA/diode)VDD_DIODE CURRENT NORMALIZED BY NUMBER OF PIXEL (VDD_DIODE= 3.3V)
0,00
20,00
40,00
60,00
80,00
100,00
-20,0 -10,0 0,0 10,0 20,0 30,0 40,0
Temperature (°C)
VDD_DIODE/number of pixel
(fA)
M*3L N°4 (EPI-20um)
M*3L N°5 (EPI-20um)
M*2 (EPI-14um) M*3
M*2 (14 µm EPI)
MIMOSTAR [email protected] 416/05/2007
1st Run: MimoStar3 Test MimoStar3 with 14 µm EPI substrate:
Seems less noise Ex. ENC ~ 18 e-, @ 20 °C, t r.o. = 4 ms
Confirmed by static diode leakage current measurements: Diode leakage current 3-6 times higher than M*2
MIMOSTAR [email protected] 516/05/2007
1st Run: MimoStar3 Test MimoStar3 with 14 µm EPI substrate:
Seems less noise Ex. ENC ~ 18 e-, @ 20 °C, t r.o. = 4 ms
Confirmed by static diode leakage current measurements: Diode leakage current 3-6 times higher than M*2
"Dead" pixel zone for all tested chips: yield? 7 chips tested on PCB (CK @ 25 & 50 MHz )
MIMOSTAR [email protected] 616/05/2007
Wafer Map (2nd Run) Diode Leakage Current:
M*2 as ref Static ILeak< 5 fA/diode M*3 ILeak should be < 1 nA for a pixel array of 320x640
Even in the centre of wafer, ILeak = 2 x ILeak of M*2
Wafer 20 µm EPI Wafer 14 µm EPI
MIMOSTAR [email protected] 716/05/2007
MimoStar3 (1st & 2nd Run) Problems:
High diode leakage current Dead pixel zone (1st Run) Is there any relationship between these problems?
Why? no explanation for the moment
Notice! Only radtol pixel on M*3 M18 on same reticule use standard diodes
10 chips (14&20 µm) tested without yield & leakage current problems Next steps:
More extensive tests on the wafer & PCB for all chips of reticule Establish contact with AMS, propose design/techno review
Is there any impact of pixel geometries on the yield for ~reticule size?
Ultimate MIMO
MIMOSTAR [email protected] 916/05/2007
Ultimate Chip: MimoStarXXL Geometries:
Pitch: 18.4 µm radiation hard consideration Pixel Array: 1024 x 1088 Active surface: 18.84 x 20.02 mm2 ~ 1.1 x 106 pixels / frame
Read out speed: t R.O.: 200 µs / frame 200 ns /line >~ 5 x 109 pixels / s Need zero suppression system
According to STAR analysis Hit density rate (inner barrel) 2.4x105 /cm2/s
< 200 hits/frame (200 µs) ~ 2000 pixels / frame
Pixel Data: 21 bits (addresses) 1-3 bits (ADC) 22 - 24 bits / pixel
Effective data stream: ~ 240 MBit/s
MIMOSTAR [email protected] 1016/05/2007
MimoStarXXL: Proposed Architecture
Pixel array: 1024x1088 (18.4 µm) Pixel with CDSReadout: row by row
Matrix divided in 17 groups
ADC (1 bit) at the bottom of each column
Find N hits for each groupFind M hits for each row(with N & M determined by pixel array occupancy rate)
Memory which stores M hits (2 frames) + Serial transmission
MIMOSTAR [email protected] 1116/05/2007
MimoStarXXL: Status
Radtol Pixel with integrated CDS: Functionality tested in M8, M16 18.4 pitch pixels will be implemented in M22
Submission Sept. - Oct. 2007 Test at beginning of the next year
1088 discriminators: Tested in a pitch of 25 µm in M8, M16 Implemented in M22
Zero suppression circuit: Prototype Suze-01 will be submitted at end of June 2007
Test from September
MIMOSTAR [email protected] 1216/05/2007
MimoStarXXL: Power Management
Using trigger To reduce mean power consumption To decorrelate acquisition and readout
Proposition
Pixel Pitch (µm)
Pixel Discri. Group Hits Finder
Line Hits Finder(mW)
Sq. controller(Pix+Dig)
Memory(mW)
LVDS receiver(mW)
LVDS trans.(mW)
Total (mW)
Power (mW/cm2)
20 205 mW0.2 x 1024
308 mW0.3 x 1024
240 mW15 x 16
6 20 34 8 8 829 208
18 218 mW0.2 x 1088
327 mW0.3 x 1088
255 mW15 x 17
6 20 34 8 8 876 220