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767 Operations Manual Chapter 1 Airplane General, Emergency Equipment, Doors, Windows Table of Contents Section 0 Copyright © The Boeing Company. See title page for details. D632T001-300G 1.TOC.0.1 1.0 Airplane General, Emergency Equipment, Doors, Windows-Table of Contents Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.10.1 Principal Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.10.1 Turning Radius . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.10.2 Instrument Panels, Overhead . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.20.1 Flight Deck Panels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.20.1 Left Overhead Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.20.2 Right Overhead Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.20.3 Instrument Panels, Forward . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21.1 Left Forward Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21.1 Right Forward Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21.2 Glareshield Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21.3 Center Forward Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21.4 Forward Aisle Stand . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21.5 Instrument Panels, Aft and Side . . . . . . . . . . . . . . . . . . . . . . . . . 1.22.1 Control Stand . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.22.1 Aft Aisle Stand . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.22.2 Right Sidewall, Accessory Panel . . . . . . . . . . . . . . . . . . . . . . . . . 1.22.3 Left, Right Sidewall, and Observer Panels . . . . . . . . . . . . . . . . . 1.22.4 Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.30.1 Push–Button Switches . . . . . . . . . 1.30.1 Alternate Action Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.30.1 Momentary Action Switches . . . . . . . . . . . . . . . . . . . . . . . . . 1.30.2 Passenger Cabin Signs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.30.2 Passenger Sign Selectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.30.2 August 25, 2006

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Page 1: MIPSfpga - capap-h.ceta-ciemat.escapap-h.ceta-ciemat.es/wp-content/uploads/2017/01/Bloque-2-charla-08-Chaver-UCM.pdfScratchpad RAM Description Introduction to the caches available

MIPSfpga <1>

MIPSfpga

Page 2: MIPSfpga - capap-h.ceta-ciemat.escapap-h.ceta-ciemat.es/wp-content/uploads/2017/01/Bloque-2-charla-08-Chaver-UCM.pdfScratchpad RAM Description Introduction to the caches available

MIPSfpga <2>

Getting Started Guide v2.0

microAptiv Core

1. MicroAptiv soft-core plus MIPSfpga system

2. Guide (more than 130 pgs)

3. Multiple scripts and documentation

Page 3: MIPSfpga - capap-h.ceta-ciemat.escapap-h.ceta-ciemat.es/wp-content/uploads/2017/01/Bloque-2-charla-08-Chaver-UCM.pdfScratchpad RAM Description Introduction to the caches available

MIPSfpga <3>

Fundamentals v2.0 – Part 1 (Intro)

Page 4: MIPSfpga - capap-h.ceta-ciemat.escapap-h.ceta-ciemat.es/wp-content/uploads/2017/01/Bloque-2-charla-08-Chaver-UCM.pdfScratchpad RAM Description Introduction to the caches available

MIPSfpga <4>

Fundamentals v2.0 – Part 2 (I/O)

Page 5: MIPSfpga - capap-h.ceta-ciemat.escapap-h.ceta-ciemat.es/wp-content/uploads/2017/01/Bloque-2-charla-08-Chaver-UCM.pdfScratchpad RAM Description Introduction to the caches available

MIPSfpga <5>

Fundamentals v2.0 – Part 3 (Core)

Page 6: MIPSfpga - capap-h.ceta-ciemat.escapap-h.ceta-ciemat.es/wp-content/uploads/2017/01/Bloque-2-charla-08-Chaver-UCM.pdfScratchpad RAM Description Introduction to the caches available

MIPSfpga <6>

Fundamentals v2.0 – Part 4 (Memory)

Page 7: MIPSfpga - capap-h.ceta-ciemat.escapap-h.ceta-ciemat.es/wp-content/uploads/2017/01/Bloque-2-charla-08-Chaver-UCM.pdfScratchpad RAM Description Introduction to the caches available

MIPSfpga <7>

MIPSfpga-SoC• Build a System On Chip based on microAptiv core and Xilinx IP

blocks + Run Linux and play with it– Part 1 (RTL focused): 5 tutorials in separate documents + solution

projects + bare metal code. These sequentially build up the SOC design

• 01_LED

• 02_UART

• 03_Custom_GPIO

• 04_IIC_TempSensor

• 05_INTController_Ethernet_DDR

– Part 2 (Linux focused): 5 tutorials that sequentially build up the Linux side after Part 1

• 01_LinuxKernelInitial

• 02_Buildroot

• 03_IntController

• 04_IIC_Ethernet

• 05_CustomGPIO