nano-cmos thermal sensor design optimization for efficient ... · nano-cmos thermal sensor design...
TRANSCRIPT
Nano-CMOS Thermal Sensor Design Optimization forEfficient Temperature Measurement
Oghenekarho Okobiaha,1, Saraju P. Mohantya,1,∗, Elias Kougianosa,1
aNanoSystem Design Laboratory (NSDL), University of North Texas, Denton, TX 76207, USA.bDepartment of Computer Science and Engineering, University of North Texas, USA.
cDepartment of Engineering Technology, University of North Texas, USA.
Abstract
We present a novel and efficient thermal sensor design methodology. The growing demand for power management
on VLSI systems drives the need for accurate thermal sensors. Conventional design techniques for on-chip thermal
sensors in nanometer technologies consume expensive design iterations and result in increased power consumption
and area overhead. Power-efficient, high-sensitivity thermal sensors are important for reducing the thermal stress
on the systems or circuits which are being monitored. The proposed design flow methodology, which incorporates
a stochastic gradient descent (SGD) algorithm, optimizes the power consumption (including leakage) of IC subsys-
tems. An illustration of the proposed design methodology is presented using a ring oscillator (RO) based on-chip
thermal sensor which was designed using 45 nm CMOS technology. The RO based thermal sensor has a resolution of
0.097°C/bit. Experimental tests and analysis of the design methodology on a full layout-accurate parasitic netlist of
the RO demonstrate the applicability of our methodology towards optimization of the power consumption with tem-
perature resolution as a design constraint. A reduction of power consumption by 52% with a final area of 1389.1µm2
is obtained.
Keywords: Thermal Sensor, Temperature Measurement, Design Flow, Design Optimization, Stochastic GradientDescent.
1. Introduction
The increasing complexity and power consumptionof Systems-on-Chip (SoCs) continues to grow as tech-nology shrinks due t oscaling. The density of modernintegrated chips (ICs) and SoCs results in very high on-chip power densities. The increase in power consump-tion and power density is a critical issue, directly af-fecting the thermal stability of SoCs. To mitigate theseissues, various thermal management schemes have been
∗Corresponding authorEmail addresses: [email protected] (Oghenekarho Okobiah),
[email protected] (Saraju P. Mohanty),[email protected] (Elias Kougianos)
1http://nsdl.cse.unt.edu
explored for efficient control of power density of ICs.Thermal sensors are typically used for controlling thepower consumption and to increase the reliability ofSoCs. Thermal sensors are needed for effective thermalmanagement which helps to reduce power consumptionand increase performance. Approximately 50% of relia-bility issues are attributed to thermal related causes [1].To monitor and effectively control the thermal proper-ties of integrated devices, the accuracy of thermal mea-surements must be ensured. Hence, the importance ofon-chip thermal sensors. They are one of the mostcommon methods of measuring the thermal character-istics of ICs [2] and depending on the application, an ICmay contain multiple such sensors. The placement ofon-chip thermal sensors on an example motherboard is
Preprint submitted to Elsevier October 22, 2013
shown in Fig. 1.
RAM
Central
Processing
UnitGraphical
Processing
Unit
Power
South
Bridge
North
Bridge
Memory Module
RAM
On-chip
thermal sensor
On-chip
thermal sensor
Figure 1: Thermal sensor locations on a motherboard.
The design of thermal sensors for different applica-tions has been widely researched and reported [3, 4, 5, 6,7, 8]. Such designs using CMOS technology have beenreviewed in [8, 7] and extended its applications to on-chip sensors in [4, 5]. Thermal sensors based on CMOStechnology utilize the temperature dependent character-istics of MOS transistors for sensing the temperature ofthe circuit [5]. Oscillator based designs are one of themost common techniques of CMOS based thermal sen-sors, where the oscillating frequency depends on tem-perature and is converted to temperature readings. Theuse of thermal sensors on chips, however, contributesto some problems. Poorly designed sensors can de-crease the performance by adding an area overhead andincreasing the overall power consumption. In [6], thepower consumption of the on-chip thermal sensor sig-nificantly increases the overall power consumption. Ineffect, integrated thermal sensors for SoCs must alsobe low-power and cost-effective area wise. In addition,the sensors must accurately measure the temperature ofthe chip which puts more constraints on the low-powerspecification. Hence, the design of thermal sensorsthemselves has also become an integral part of reliabil-ity designs. Recent research works [4, 5] have proposedsolutions for efficient on-chip thermal sensors which arelow-power and do not significantly impact the circuitintended for sensing. In designing for low power con-sumption, other factors such as thermal sensitivity areoften traded for optimization. Thermal sensors for on-chip use must be robustly designed to efficiently controlthe problems of power density without increasing theoverall power consumption or incurring more cost fromarea overhead or degradation of the thermal sensitivity.In the optimization of design for performance objec-tives, various search algorithms are used for efficient de-sign space exploration. Common search algorithms thathave been implemented for the optimization of nanoC-MOS circuits include genetic algorithms, swarm intel-ligence algorithms, geometric programming, simulated
annealing, tabu search and gradient search algorithms[9, 10, 11, 12].
In order to mitigate the problems of on-chip temper-ature measurement, this paper proposes a design opti-mization flow methodology for the design of efficienton-chip thermal sensors. The proposed methodologyincorporates a stochastic gradient descent based (SGD)algorithm. The use of optimization algorithms to in-crease the speed of explorative search designs has alsobeen widely reported. The use of an SGD algorithm im-proves the design process by reducing the design spaceexploration time for optimization. The modified SGDalgorithm also eliminates the problem of local optima.The design flow is presented using a 45 nm thermal sen-sor as case study circuit. In illustrating the effectivenessof the design flow, the power consumption of the ther-mal sensor is reduced using the accuracy of the temper-ature measurements as a constraint.
The rest of this paper is organized as follows. Thenovel contributions of this paper are presented in Sec-tion 2. A brief review of selected related research ispresented in Section 3. In Section 4, a description of thebaseline design of a thermal sensor circuit using 45 nmCMOS technology is presented. The proposed designoptimization flow methodology is presented in section5. The experimental setup, results and analysis are pre-sented in section 6. In Section 7, conclusions and futureresearch directions are discussed.
2. Novel Contributions of this Paper
This paper presents a novel design flow methodol-ogy incorporating the use of a Stochastic Gradient De-sign (SGD) based algorithm for the efficient design op-timization of analog circuits. An on-chip thermal sensorusing a 45 nm technology is used as an illustrative casestudy. The schematic and physical designs of the sensorare presented. The sensor is based on a ring oscillator(RO) architecture that uses a binary counter and regis-ters for accurate temperature measurement. The SGDbased algorithm also presented here is applied on nano-CMOS circuit designs for the first time. The standardSGD algorithm has been modified to restart at randompoints in order to mitigate the issue of local optima ofthe traditional SGD algorithm. A further analysis of theimpact of process variation on the power consumptionperformance of the thermal sensor is also discussed.
A summary of the contributions of the current pa-per are as follows:
1. A robust design flow is proposed to design andcharacterize nano-CMOS based thermal sensors.
2
2. A design optimization methodology is presentedfor fast design exploration of thermal sensors.
3. A modified Stochastic Gradient Descent (SGD) al-gorithm is presented for thermal sensor optimiza-tion.
4. A 45 nm RO based thermal based sensor is de-signed at the layout level and optimized.
5. A statistical analysis of the impact of process vari-ation of power consumption was performed on thethermal sensor.
3. Related Research on Temperature Sensors
The design of on chip thermal sensors, including de-sign for accurate temperature estimation and robust per-formance has been well researched [4, 5, 13, 7, 3, 14].In [5], a class of thermal sensors based on DifferentialRing Oscillators (DRO) is introduced. An implementa-tion using a current starved inverter topology utilizes thesensitivity of the oscillating frequency to temperaturefor thermal sensing. In [6], a low power thermal sen-sor has been proposed. It employs an oscillator basedon an RS register structure. The output frequency ofthe oscillator is Proportional to Absolute Temperature(PTAT) and is thus used with a constant pulse generatorand a bias calibrator. In [13], another approach is takento compensate for the effect of noise, process variationsand VDD fluctuations on the thermal sensor. A statis-tical methodology is proposed for estimating the actualtemperature reading of the sensor. The temperature ismodeled as a variable associated with a probability den-sity function (PDF) that is dependent on the noise, pro-cess variations and VDD fluctuations. In [15, 16], aPTAT current source is proposed. The circuit uses theratio between the drain currents of two current sourcetransistors operating in the subthreshold region whichis PTAT for thermal sensing. The source transistors arefed by a reference current which is independent of ambi-ent temperature and the output of the PTAT generator isconverted to a corresponding temperature reading withan A/D circuit [16]. In an effort to reduce the effect ofprocess variation and noise on thermal sensors, similarcircuits have been proposed in [17]. In [3], a techniqueimplementing inductors and variable capacitors is pro-posed for thermal sensing of high temperature environ-ments. The temperature reading is telemetrically placedoutside of the circuit to isolate it from the high temper-atures on the circuit.
A recent design has been proposed in [14] that imple-ments a miniaturized CMOS based thermal probe thatsignificantly reduces the size of comparable sensors al-lowing it to be easily placed near hot spots for localized
real-time temperature mapping. The thermal sensor de-sign presented in this paper is also oscillator based andis motivated by the design presented in [4]. The sensorused is implemented using the conventional ring oscilla-tor topology in contrast to the current starved topology.The thermal sensor is also not operated in the subthresh-old region which leads to a decrease in frequency withincreasing temperature. The frequency divider and mul-tiplexer are eliminated in our design.
4. Thermal Sensor Design for On-Chip Tempera-ture Measurement
The 45 nm thermal sensor used as an illustrative ap-plication of the proposed design flow methodology ispresented in this section. Fig. 2 shows the 45 nm ther-mal sensor which uses a ring oscillator as the majorcomponent for thermal sensing. The operational fre-quency of the ring oscillator is very sensitive and pro-portionally dependent on ambient temperature and thusthe output frequency fluctuates in response to the ef-fect of surrounding temperature. The RO is the primarycomponent of the sensor. The circuit also uses a combi-nation of 10-bit binary counters and 10-bit registers foraccurately expressing the temperature readings as a dig-ital output. The temperature measurement is calibratedby sampling the edges of the oscillator output during asampling period with the binary counter. The count dur-ing the period of the RO is proportional to the absolutetemperature which is stored in the 10 bit register.
clk
resetBinary Counter
10’b
Ring OscillatorctrlFout
clk
10’bSys_clk Register 10’b Out
Cout
inout
Figure 2: Block diagram of the thermal sensor.
The ring oscillator is shown in Fig. 3. It consists ofa cascade of an odd number of inverters that are con-nected in a loop leading to an unstable state which cre-ates the oscillations. The ring oscillator shown in Fig.3 has a total of 15 inverters, but the first inverter hasbeen modified as a NAND gate and used to gate thering oscillator operation. The transistor level schematicis shown in Fig. 4.
The oscillation frequency of the ring oscillator isgiven by the following expression:
fosc =1
n(tpLH + tpHL), (1)
3
Vdd
CTRL
Inv1 Inv2 Inv14
Vdd
Ln = 45 nm
Wn = 120 nm
Lp = 45 nm
Wp = 120 nm
Figure 4: Transistor level schematic of the RO.
NAND Inv1 Inv2 Inv14. . .
ctrlFout
Figure 3: Block diagram of the RO.
where n is the number of stages used in the oscillatorand tpLH and tpHL are the low-to-high and high-to-lowpropagation delays, respectively. The propagation de-lays can be expressed as [17]:
tpLH =−2CLVtp
κp(Vdd − Vtp)2(2)
+CL
κp(Vdd − Vtp)× (3)
ln
(1.5Vdd + 2Vtp
0.5Vdd
), (4)
tpLH =2CLVtn
κn(Vdd − Vtn)2(5)
+CL
κp(Vdd − Vtn)× (6)
ln
(1.5Vdd + 2Vtn
0.5Vdd
), (7)
where CL is the capacitive load, Vdd is the on-chippower supply and Vtp and Vtn are the PMOS andNMOS threshold voltages, respectively. The transcon-ductances κn and κp are calculated by the following ex-pression:
κn/p = µn/pCox
(W
L
)n/p
. (8)
In equations (1) - (5), the threshold voltages and mo-bilities µn/p are the factors most sensitive to tempera-ture fluctuations. They are given by [18]:
Vt(T ) = Vt(T0) + αVt(T − T0), (9)αVt = −0.5− 3.0mV/◦K.
µ(T ) = µ0
(T
T0
)αµ(10)
αµ = −1.2− 2.0.
An increase in temperature leads to an increase in thepropagation delay which translates to a decrease in os-cillating frequency.
The 10-bit binary counter is shown in Fig. 5 and con-sists of JK flip-flops, while the 10-bit register is used tostore the value from the counter and is also implementedwith JK flip-flops.
The thermal sensor shown in Fig. 2 was imple-mented using a 45 nm CMOS technology library pro-vided by Cadence Design Systems, Inc. The design isable to sense temperatures between 0°C and 100°C. TheSys clk signal set to a 500 KHz frequency is used to en-able the thermal sensor. When the Sys clk turns to logiczero, the ring oscillator is disabled, the counter is alsoreset and the register also stops saving the count, storingthe last count value it had before the Sys clk was set tologic ”0”. The binary counter is used to count the fre-quency difference between the ring oscillator output andthe system clock. The count is stored in the 10-bit reg-ister and calibrated to measure the temperature change.The physical design of the thermal sensor is shown inFig. 6. Temperature readings can be taken using twodifferent methods as follows:
4
JKFlipFlop0J
Kclk
QJKFlipFlop1
J
Kclk
Q J
Kclk
Q
b0 b1 b2
RO_in
clk
JKFlipFlop2
Buffer Buffer
AND
Buffer
AND . . .
. . .
J
Kclk
Qb9
JKFlipFlop9
Figure 5: Block diagram of the 10 bit binary counter.
1. Using the count characteristic plot which is shownin Fig. 7. This count is interpreted with a calibra-tion table.
2. Using the formula below which was generatedfrom linear data fitting with anR2 value of 0.9978.
Temperature = −0.5167× Count + 395.3. (11)
This equation can serve as a predictive function whichwill enable a direct temperature reading from the countvalue.
Fig. 8 shows a summary of the design steps. It can bebroadly divided into three main stages. Stage A involvesthe actual design of the sensor including the schematicand physical designs. Functional simulation of the ther-mal sensor is done to investigate and verify its sensingcharacteristics. The frequency output of the the sensoris observed while varying the temperature. The temper-ature range calibrated for the thermal sensor was 0°C∼100°Cwith a sensitivity of 9.42MHz/°Cfor the physicaldesign with silicon-accurate parasitics. The next stageinvolves the calibration of the thermal sensor. This isdone by measuring the range of the thermal sensor andassociating the corresponding frequency output of theRO. The 10 bit counter is then calibrated using the di-agram in Fig. 7 or used as a prediction based on ex-trapolation data. The size of the counter determines theresolution of the sensor. With the 10 bit counter usedfor this design over a range of 100°C, a resolution of0.097°C/bit is achieved. The final step of the design isthe digital display of the sensed temperature. For thisstage, a 10 bit register is used to store the output fromthe counter. This process could serve as a guideline fordesigners to reproduce the thermal design and to per-form accurate characterization.
The performance and accuracy of the physical designis degraded when compared to the schematic design.This is expected due to parasitic effects from the lay-out. Table 1 shows a comparison between the schematicand physical designs. Power consumption is increasedby 29% while the sensitivity decreases by 44%. This
circuit exhibits a linear dependence of oscillation fre-quency on junction temperature as shown in Fig. 9.
Table 1: Characterization of the 45nm CMOS Baseline Thermal Sen-sor Circuits.
Sensor Power Sensitivity AreaDesigns (PTS) (TTS) (µm2)Schematic 293.1 µW 16.88 MHz/°C -Layout 379.4 µW 9.42 MHz/°C 1221.37% Change +29% -44%
As the temperature is increased, the frequency de-creases. The schematic frequencies range from 0°C=5.924 GHz to 100°C= 4.236 GHz. Assuming a 6 GHzmax clock rate for the ring oscillator, and a 10 bitcounter (1024 max count) the effective resolution is cal-culated by dividing the temperature range by the num-ber count 100°C/1024 bit which gives a 0.097°C/bit res-olution. The range of frequency output is also severelydegraded as also seen in Fig. 9. The range drops to3.867 GHz to 2.986 GHz. The resolution can also bespecified in terms of GHz/°C to reflect the degradingeffect of parasitics from the physical design. There isa 44% change in frequency/temperature resolution be-tween the schematic and physical designs. The areaof the layout is 1221.37 µm2. Table 2 shows the totalcount of transistors for each component of the thermalsensor. The oscillator component consists of 32 transis-tors.
Table 2: Transistor Count for Thermal Sensor ComponentsComponent Transistor CountRing Oscillator 3410-bit Binary Counter 46210-bit Register 400Total 896
5
11111
11111
11111
11111
11111
11111
111111111111111111111111111111
11111
11111
11111
11111
11111
1111111111
11111
11111111111111111111
1
1
1
1
1
11
11
11
11
11
11
11
11
1111
1111
1111
11 11111111111 11111 1111111111111 11111111111 11111111111111111 1111111111111 11111111111 11111111111111111 1111111111111 11111111111 11111111111111111 1111111111111 11111111111 11111111111111111 11111111111
1111111111111111111111111111 11111111111111111111111111111111
1111111111111111111111111111
11111111111111111111111111111111111111111111111
11 1111111111 111 111111111111111111111111111111111111111111111111111111
1111111111
11
11
111111
111111
11111111
1111111111111111111111
11111111111111111111111111
1
1
1
1
1
1
111111
1
1
1
1
1
1
111111
11
11
11
11
11
11
11
11111111
11
11
11
11
11
11
11
111111111111
11
11
11
11
11
11
111111111111
11
11
11
11
11
11
111111111111
11
11
11
11
11
11
111111111111
1
1
1
1
1
1
111111
1
1
1
1
1
1
111111
11
11
11
11
11
11
111111111111
11
11
11
11
11
11
111111111111
1
1
1
1
1
1
111111
1
1
1
1
1
11
11
11
11
11
11
11
11
1111
1111
1111
11 1111111111111111111111111111111111111111111111111111111111111 11
11111
1111111111
11111
1111111111
11111
11111
11111
11111
11111
11111
11111
11111
11111
11111
11111
1111111111
11111
11111
111111111111111
1111 111111 1111 1111111111111 1111111111111111111111111
111 11 111 1111111111111 111111111111 111 1111 111111111111
1111 11111111 11111111111111
11111111111111 1111111111 11
1111111111 1111111111111 111
1111111111111111111111111111 1111 1111 111111111 1111111
111 11111111 111111111111111
11
11
11
11
11
1111
11
11
11
1111
11
111111
11
11
11
11
11
1111
11
1
1
1
111
1
1
1
11
1
11
1
1
1
11
1
1
1
1
1
11
1111
11
11
11
11
11
1111
11
11
11
11
11
11
11
111111
11
11
1111
11
1
1
1
1
1
1
1
1
11
1
1
1
111
1
11
1
1
1
1
1
1
11
11
1
1
1
1
11
1
1
1
111
111
1
1
1
1
1
111
1
1
1
111
11
111111
11
11
11
1111
11
11
11111
1
1
1
1
11
1
1
1
1111
1111
1111
1111
1111
1111
111111
1111
1111 1
11111111111
11
1111111111
1111111
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1111
1
1
1
1
1
1
1
1
1111
11
11
11
11
11
11
1111111111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
11
11
11
11
11
11111111
11
11
11
11
11
11
11
11
11111111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
11
11
11
11
11
11111111
11
11
11
11
11
11
11
11
11111111
1
1
1
1
1
1
1111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1111
1
1
1
1
1
1
1
1
1
11
11
11
11
11
11
11111111
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11111111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
11
11
11
11
11
11
1111
11
1111
11
11
11
11
11
11
11
11
1111
111111111111111111111111111111111111111111111
11
111
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
11
11
11
11
11
11
11
11
1111
1
1
1
1
1
1
1
1
11
1
1
1
1
111
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
1111
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
1111
1
1
1
1
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
1
111
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
1111
11
11
111
1
1
1
1
1
1
1
1
1
111
1
1
1
1
1
1
1
1
111111111111
11
11
11
1
1
1
1
1
1
1
1
1
11 1
11
1
111
11
11
1
1
11
1
1
11
11
1
1
1
1
1
1
1
1
1
11111 1111111111111111111 1111111111 1111111111111111 1111111 1111111111111111111 111111111111111111111111 1111111111111111 1111111 1111111111111111111 111111111111111111111111 1111111111111111 1111111 1111111111111111111 111111111111111111111111 1111111111111111 1111111 1111111111111111111 111111111111111111111111 1111111111111111 111
1111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111
1111
1111111111
1111111111
111111
11111111
111111111111
111111111111
111111111111111111111111111111111
1111111111 1
111
1111
1111111111
1111111111
111111
11111111
1111111111111
11111111111111111
1111
11111111111111
11111111111111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
11
11
11
11
11
11
11
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
11
11
11
11
11
11
11
1111111111
11111111111111111111111111111111111111111111111111111111111
1111
111
11111111 111111111111 11111111 11111111111111111111111111 11111111111111111111111111111111111111111111111111
111111 1111 111111 11111111111111111111111111 111111111111111111111111 111111 11111111 111111111111111111111111
11111111 1111111111111111 1111111111111111111111111111
1111111111111111111111111111 11111111111111111111 1111
11111111111111111111 11111111111111111111111111 111111
11111111111111111111111111111111111111111111111111111111 11111111 11111111 111111111111111111 11111111111111
111111 1111111111111111 111111111111111111111111111111
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
1
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
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Figure 6: Physical design of the 45 nm thermal sensor.
5. Proposed Methodology for Design Optimizationof the Thermal Sensor
One of the major aspects of optimization for thermalcircuit designs is the level of power consumption. Theaverage power consumption of the thermal sensor mustnot burden or impact the overall power consumption ofthe circuit which it monitors. However in designing foroptimal power consumption, the area overhead and theaccuracy or sensitivity of the sensor are often compro-mised. Hence, a design technique is desired which op-timizes power consumption without increasing the areaoverhead or degrading the sensitivity or at least mini-mizing the impact to both. To this effect, a novel designflow methodology which uses a stochastic gradient de-scent based algorithm is shown in Fig. 10. The designmethodology aims to optimize the power consumptionof the sensor using the thermal sensitivity as a design
0 10 20 30 40 50 60 70 80 90 100550
600
650
700
750
800Temperature Count Characteristics
Temperature
Th
erm
al S
enso
r C
ou
nt
Figure 7: Count characteristics for the thermal sensor from layout.
Ring Oscillator Design
Functional Simulation
Range Measurement
Counter Design
Register Design
A
B
C
Figure 8: Design flow for the thermal sensor
constraint. The SGD influence on the methodology im-proves the optimization phase by actively exploring thedesign space for the optimal design objective, in thiscase the minimal power consumption, while minimiz-ing the impact to the thermal sensitivity. The SGD ismodified to have random restarts in order to eliminatethe problem of local optima. The following subsectiondescribes in detail the overall design methodology andthe SGD based algorithm.
5.1. Design Optimization FlowThe first step in the design flow is to create the base-
line schematic design of the circuit that meets the givendesign specifications. For the case study circuit imple-mented in this paper common design objectives includepower consumption, temperature resolution, and tem-perature range. After the schematic design has been
6
0 20 40 60 80 1002.5
3
3.5
4
4.5
5
5.5
6x 10
9
Fre
quency (
Hz)
Temperature (°C)
Schematic
Layout
Figure 9: Ring oscillator frequency response versus temperature forboth schematic and physical designer.
created, a set of performance objectives are identified(Figures-of-Merit, FoMs) and a functional simulation isperformed to ensure that the circuit meets initial spec-ifications. If the design specifications are not met, theschematic is reiteratively designed until the specifica-tions are met. The next step is to create the physicallayout design of the circuit. The physical layout is val-idated with Design Rule Checks (DRC), and Layoutvs. Schematic (LVS) tests. From the physical layout,a fully parasitic netlist - resistance, capacitance and selfand mutual inductance (RLCK) is extracted to ensurethe simulation model is as silicon accurate as possible.The parasitic netlist is then parameterized with designand process parameters, including the length and widthof the transistors (L,W ), threshold voltages (Vt), ox-ide thickness (Tox), etc. It is only after the optimizationis complete that the physical design is redrawn usingthe parameters obtained from the optimization process.This ensures that the manual design of the physical lay-out is done at most twice, once before the parasitic ex-traction of the netlist and modified after the optimizationprocess is complete.
With a fully parameterized parasitic aware netlist anda chosen performance objective, a stochastic gradientdescent based algorithm is used to optimize the circuitto obtain the final optimized design. The stochastic gra-dient takes in as input the parameterized netlist, the de-sign objective and the range of parameter values forthe design. The output of the optimization algorithmare the design variable values that give the optimal per-
Identify FoMs and
No
Yes
No
STOP Optimized Final DesignYes
Design Optimization Flow
START
Create Baseline Schematic Design
Perform Functional Simulation
Specificationsmet?
Perform DRC/LVS/RCLK Extraction Parameterized ParasiticAware Netlist
Identify Optimization Objective
Create Physical Layout
Perform Optimatization using
Specificationsmet?
Stochastic Gradient Descent Algorithm
Figure 10: The proposed design optimization flow.
formance objective. The optimization process is reit-erated until the target specifications are met, as seenin Fig. 10. Upon completion of the optimization pro-cess, the final parameter values are used to manuallyredesign the physical layout. In using the parasitic ex-tracted netlist, the process ensures that the design flowis parasitic aware, and the final physical design is im-plemented to reflect more silicon accurate results. Adetailed discussion of the SGD based algorithm is pre-sented in Section 5.2.
5.2. Stochastic Gradient Descent Algorithm for Ther-mal Sensor Optimization
The stochastic gradient descent (SGD) algorithm isa variation of descent based algorithms that utilize thegradient of functions to search for optimal values. Thestochastic gradient descent is a cost function optimiza-tion algorithm that has been implemented for many dif-ferent applications. SGD algorithms can be appliedto optimization problems for a function f(x), where xis the vector of parameters. An example optimizationproblem is presented as follows:
MinimizeFx(x),where(x) = x1, x2, x3, . . . , xn (12)
7
The basic form of the SGD algorithm is given as [19]:
xi+1 = xi − γn∇Fx(xi), (13)
where xi is the set of design variables x at iteration iwhich minimize the objective function, and are to be es-timated. ∇Fx(xi) is the gradient of the function Fx(x)to be optimized. γ is a user defined factor that controlsthe step size of the descent. It is also usually referredto as the learning rate. The choice of γ is arbitrary andis commonly set as 1
n or some other decaying functionwith respect to n, where n is the number of iterationsteps. A very small γ will result in smaller steps andwill increase the convergence time, while a larger γ maylead to an unstable process.
The SGD is very similar to the gradient descent, thedifference being that the gradient of the objective func-tion Fx(x) is computed by an estimation, using a subsetof the parameter vector which is randomly chosen ineach iteration step. In the computation of Gradient De-scent, the gradient in each step is calculated using allparameters. For optimization problems with high den-sity parameters, the calculations become infeasible. Theestimation of the gradient in each iteration step greatlyreduces the computation costs and reduces the timerequired for convergence, simultaneously speeding upthe optimization process. This characteristic makes theSGD very suitable for computational expensive simula-tions and functions which are not easily differentiable.
The SGD is susceptible at being stuck at a local min-imum and is thus effective for local optimization. Wepropose a technique that reiteratively restarts the algo-rithmN times, whereN is a design factor chosen by thedesigner, while memorizing the local minima found andthe range of parameters traversed. The value of N se-lected is critical to the effectiveness of the algorithm; asmall value may not eliminate the problem of local min-ima, while a very large value may considerable increasethe run time of the algorithm. Hence the choice of a Ndepends on the topology of the circuit being designed.A response surface of the performance of the circuit be-ing designed can give an insight into the value of N tobe used. A termination criterion could also be intro-duced into the algorithm to exit once an optimizationgoal has been reached. When the algorithm is restartedwith a new random point, it checks to make sure it is anew point which has not been searched, thereby elimi-nating redundant searches. After the algorithm has beenrunN times, the optimized point is selected from the setof local minima. A summary of the implementation ofSGD for the optimization of the thermal sensor designis seen here:
Minimize PTS(w), (14)
where PTS is the power consumption of the thermalsensor. (w) = Wn,Wp, Ln, Lp, Vth... are the param-eter variables used for the design, in this case the widthof the transistors. The basic form of the SGD algorithmfor this case becomes:
wn+1 = wn − γn∇PTS(wn). (15)
The design variables used are Wn and Wp, while thedesign objective is the power consumption with the ther-mal sensitivity as a design constraint. The design vari-ables used here are a subset of the design and are chosento illustrate the effectiveness of the modified algorithm.This methodology can also be applied to an increasedparameter set without considerable computational over-head.
Algorithm 1 Stochastic Gradient Descent Optimizationfor Thermal Sensor.
1: Input: Sensor Optimization design objective anddesign variables with parameterized netlist.
2: Output: Optimal design parameters for design ob-jective of the thermal sensor.
3: Initialize max number of iterations as N ←Max Iter .
4: while N ≥ 0 do5: Choose random variable w0, w′0.6: Calculate thermal sensor FoM PTS(w0).7: Calculate thermal sensor FoM PTS(w
′0).
8: while ||PTS(wn+1)− PTS(wn)|| > ε do9: Choose a decreasing γn.
10: Estimate∇ PTS(wn) using PTS(w′n).11: Compute wn+1 = wn − γnOPTS(wn).12: end while13: W ← {wn, PTS(wn)}.14: N ← N − 1.15: end while16: return The lowest couple wn, PTS(wn) found.
The steps are shown in Algorithm 1. The algorithmshows the modifications to the traditional SGD in opti-mizing an objective output PTS(w) as a function of de-sign parameters w. First, the maximum iteration num-ber is set asN , then a random starting point is chosen tostart the optimization process. For each iteration step inlines 4-8, a set of solutions is stored in vector W , alsomarking traversed paths. The algorithm is restarted, i.e.reiterated, through lines 4-16 until the maximum itera-tion is reached or some other stop criteria are met. Whena new random point is to be picked, it checks to makesure that this point has not been searched. At the end ofthe algorithm, the optimized design objective is chosen
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as the minimum value in vector W . In this algorithm,we improve the efficiency by monitoring the set of ran-dom points to limit the range of parameters picked toonly those whose paths have not been traversed. Thiscuts down on the optimization algorithm time by elim-inating redundant searches, i.e. searches that will pro-duce already stored optima or discarded results.
6. Experimental Results and Analysis
6.1. Experimental Setup and Tool Interaction
To demonstrate the efficiency of the proposed flow, itis applied to the design optimization problem of the 45nm thermal sensor design which was discussed in sec-tion 4. Initial design parameters are as follows: Vdd = 1V, and nominal values L of 45 nm and Wn, Wp of 120nm and 240 nm, respectively, are used. The design tem-perature range was calibrated for an operational rangeof 0 – 100°C. This range was chosen for experimen-tal purposes and a feasible range to which on-chip ther-mal sensors could be expected to be functional. A fullblown parasitic (RLCK) netlist of the design was ex-tracted from the layout after the initial baseline designspecifications were met. The extracted netlist was thenparameterized with the design variables to enable multi-ple iterations of the design without having to redraw thelayout. In implementing the design optimization flowalgorithm, several tools were used for simulation andoptimization. Cadence Ocean scripts were generated torun the simulations for multiple iterations while varyingthe design parameters using the extracted, parameter-ized netlist from the physical design. The scripts andsimulations were supervised by MATLAB which drovethe design optimization flow. Fig. 11 shows the toolinteraction for the implementation.
CAD(Cadence on virtuoso Platform)
Schematic and Layout of baseline Design
MATLABParameterization of NetlistSample Point Generation
MATLABStochastic Gradient Descent based
Algorithm
Steps and Tool Interaction
OceanScriptData points Simulation
Figure 11: Experimental setup, steps and tool interactions.
6.2. Simulation of Optimization Algorithm and DesignEvaluation
The optimization goal for this experiment was to min-imize power consumption using temperature resolution(sensitivity) as an optimization constraint. The width ofthe transistors was used as the design parameter set tobe explored. The SGD algorithm in Algorithm 1, wasimplemented in MATLAB and was used to reiterativelysimulate through the design with updated inputs of tran-sistor widths. As was discussed in section 5.2, to mit-igate the possibility of the algorithm being stuck at alocal minimum, the algorithm was run with N = 20,restarting the algorithm with random start values.
The iteration of the SGD algorithm exploring the de-sign space for the optimal solution is shown in Fig. 12.The points show the solution for each iteration point ofthe algorithm. The points are the set of outputs obtainedfrom each run of the SGD algorithms. From the fig-ure, the points with higher power consumption valuesindicate points of local minima. By running the algo-rithm reiteratively and selecting the minimum output,the problem of local optimizations is eliminated.
100
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Wp(nm)
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START
END
Figure 12: Iterations of the proposed SGD algorithm.
The results of the optimized design compared to thebaseline design using Wn only as design parameter areshown in Table 3. The layout power consumption hasbeen reduced by 52% with an optimal parameter pointof Wn = 153 nm. The power consumption for this de-sign is relatively higher because it includes the powerconsumption from the counter and the register. The de-signs in [4] have been implemented in the subthresholdregion which significantly reduces the power consump-tion. A 13.75% increase in the area of the final physicaldesign is incurred. The increase in area results from anincrease of of 27.5% in the final Wn chosen.
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Table 3: Experimental Results for the 45nm CMOS Optimal ThermalSensor Circuit.
Sensor Power Sensitivity AreaDesigns (PTS) (TTS) (µm2)Schematic 293.1 µW 16.88 MHz/°C -Layout 379.4 µW 9.42 MHz/°C 1221.37Optimal 181.8 µW 9.42 MHz/°C 1389.31% Change -52.08% 0 +13.75%
For the proposed design methodology, the optimiza-tion goal was the minimization of the average power dis-sipation of the circuit using the thermal sensitivity as adesign constraint. The SGD could also be extended tomulti-objective optimization schemes which can mini-mize both average power dissipation and area overhead.In this case, we do not include the area overhead as a de-sign objective as the improved proposed design alreadyachieves a significantly reduced area by eliminating thefrequency divider and multiplexer components from themotivated circuit [4].
The normalized output for the optimal power, sensi-tivity and area of the thermal sensor is shown in Fig.13. The results depict the change in design specifica-tions from schematic to layout and the final optimizedvalues. Table 4 shows the final design parameters of thethermal sensor design.
0
0.2
0.4
0.6
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1
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Power Sensitivity Area
SchematicLayout Final
Figure 13: Final Results of the Thermal Sensor Optimization.
Table 4: Final Design Parameters of the Thermal Sensor.Design Parameter Initial Baseline Final ValueWnosc 120 nm 153 nmWnctr 120 nm 153 nmWnreg 120 nm 153 nmWposc 240 nm 401 nmWpctr 240 nm 401 nmWpreg 240 nm 401 nm
One of the modifications for the SGD included thestoring and checking of previously searched points to
eliminate redundant searches. In eliminating the redun-dant search iterations, the expensive simulation time foriterations can be reduced. A lookup table type struc-ture can be used to store the parameters for fast accesscompare to a simulation search time of approximately10 minutes.
6.3. Statistical Process Variation Analysis
Further analysis of the thermal sensor design wasdone to study the impact of process variation on the op-eration of the circuit. Fig. 14 shows the probabilitydensity function (pdf) of the statistical impact of pro-cess variation on the power consumption of the ther-mal sensor. The simulation analysis was set up witha 1000 Monte Carlo runs. To simulate the effect of pro-cess variation as close as possible the design parame-ters were varied using a normal sampling distributionwith a 5 % deviation from the mean. The mean valueswere chosen based on the optimal parameter design val-ues obtained from the optimization algorithm. The re-sults of the Monte Carlo analysis are shown in Fig. 14.The mean power consumption is 180. 12 µW while thestandard deviation is 31.90 µW. The figure shows thatthe thermal sensor is statistically robust to the effects ofprocess variation on its power consumption.
1 1.5 2 2.5 3 3.5x 10
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Freq
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Monte Carlo Analysis of Power Consumption
μ =180.12 μWσ = 31.90 μW
Figure 14: Probability density function of the (pdf)of the power con-sumption due to process variation
6.4. Comparative Perspective with similar Designs
Similar implementations of thermal sensors for on-chip sensing have been summarized in Table 5. Theresults from our work compare very well to similar de-signs for on-chip thermal sensors. The power consump-tion is higher than [4] which is most closely related tothis work. The operating voltage is however 1 V com-pared to 0.3 V for [4]. Compared to the other selected
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Table 5: A Summary of Selected Thermal Sensors in Existing Literature.Sensor Operating Power Sensitivity Area Range TechnologyDesign Voltage Dissipation Sensitivity Area Range NodeBakker et al. [8] 2.2 V 7 µW 0.625°C 1.5 mm2 -40 ∼ 120°C 2 µmChen et al. [18] 3.3 V 10 µW 0.16°C 0.175 mm2 0 ∼ 120°C 0.35 µmDatta et al. [5] 1 V 25 µW 2°C 0.04 mm2 -40 ∼ 150°C 45 nmShenghua et al. [6] – 0.9 µW 1°C 0.2 mm2 27 ∼ 47°C 0.2 µmSasaki et al. [20] 1 V 25 µW – – 50 ∼ 125°C 90 nmPertijs et al. [21] 3.3 V – 0.02°C 4.5 mm2 -55∼ 125°C 0.7 µmPark et al. [4] 0.3 V 95 nW 0.4°C 0.04 mm2 -20 ∼ 96°C 0.13 µmSheng-Huang et al. [22] 1.2 V 11.2 µW 11.9°C 54 µm2 100 ∼ 150°C 65 nmLuria et al. [14] 1.3 V – – 0.002 mm2 20 ∼ 130°C 90 nm[This Paper] 1.0 V 181.8 µW 0.097°C 0.001 mm2 0∼ 100°C 45 nm
designs, the power consumption is still fairly high, butthe sensor design has the counter and register compo-nents which are not in designs for [5], and [20]. Tofurther decrease the power consumption, the registercomponent can be left out of the design. The designpresented in this paper has a very high sensitivity of0.097°Cwhich is higher than the designs presented inTable 5. The thermal sensitivity was intentionally con-strained to be high enough for accurate measurements.The area overhead cost of this design is also low com-pared to other designs. It is noted however, that thethermal sensor was designed using a 45 nm technologycompared to other designs using µm technologies.
7. Conclusion
In this paper, a new thermal sensor design for efficienton-chip temperature measurements has been proposed.A design flow optimization methodology incorporatinga stochastic gradient descent based optimization algo-rithm has also been presented. The design flow method-ology improves the design process which ensures opti-mal designs that mitigate some of the inherent problemsin existing thermal sensors. The modified SGD algo-rithm is relatively fast and efficient and eliminates localoptima convergence problems. The proposed techniqueensures optimal designs with efficient optimization timeand is used to optimize a 45 nm thermal sensor designfor low power consumption while using the thermal sen-sitivity as a design constraint. The power consumptionwas reduced by 52% while maintaining the resolution ofthe thermal sensor at 0.097 °C. This compares very wellto selected optimizations of thermal sensor designs. Infuture research, the proposed methodology will be ex-tended to multi-objective optimization schemes.
Acknowledgments
This research is supported in part by NSF awardsCNS-0854182 and DUE-0942629. A shorter version ofthis research is presented at the following double-blindreview conference [23] (ISVLSI 2012 ). The authorswould like to acknowledge the inputs and help of UNTgraduate Dr. Oleg Garitselov.
References
[1] M. Pedram, S. Nazarian, Thermal Modeling, Analysis, andManagement in VLSI Circuits: Principles and Methods, Pro-ceedings of the IEEE 94 (8) (2006) 1487–1501.
[2] S. Sharifi, T. S. Rosing, Accurate Direct and Indirect On-ChipTemperature Sensing for Efficient Dynamic Thermal Manage-ment, IEEE Transactions on Computer-Aided Design of Inte-grated Circuits and Systems 29 (10) (2010) 1586–1599.
[3] E. Sardini, M. Serpelloni, Wireless Measurement Electronics forPassive Temperature Sensor, IEEE Transactions on Instrumen-tation and Measurement 61 (9) (2012) 2354–2361.
[4] S. Park, C. Min, S.-H. Cho, A 95nW Ring Oscillator-based Tem-perature Sensor for RFID Tags in 0.13 µm CMOS, in: Proceed-ings of the IEEE International Symposium on Circuits and Sys-tems, 2009, pp. 1153–1156.
[5] B. Datta, W. Burleson, Low-Power and Robust On-Chip Ther-mal Sensing Using Differential Ring Oscillators, in: Proceed-ings of the 50th Midwest Symposium on Circuits and Systems,2007, pp. 29–32.
[6] Z. Shenghua, W. Nanjian, A Novel Ultra Low Power Temper-ature Sensor for UHF RFID Tag Chip, in: Proceedings of theIEEE Asian Solid-State Circuits Conference, 2007, pp. 464–467.
[7] G. Meijer, G. Wang, F. Fruett, Temperature Sensors and VoltageReferences Implemented in CMOS Technology, IEEE SensorsJournal 1 (3) (2001) 225–234.
[8] A. Bakker, J. Huijsing, Micropower CMOS Temperature Sensorwith Digital Output, IEEE Journal of Solid-State Circuits 31 (7)(1996) 933–937.
[9] O. Garitselov, S. P. Mohanty, E. Kougianos, A ComparativeStudy of Metamodels for Fast and Accurate Simulation of Nano-CMOS Circuits, IEEE Transactions on Semiconductor Manu-facturing 25 (1) (2012) 26–36.
11
[10] S. P. Mohanty, D. K. Pradhan, ULS: A Dual-Vth/High-κ Nano-CMOS Universal Level Shifter for System-Level Power Man-agement, ACM Journal of Emerging Technologies in Comput-ing (JETC) 6 (2) (2010) 1–26.
[11] V. Aggarwal, Analog Circuit Optimization using EvolutionaryAlgorithms and Convex Optimization, Master’s thesis, Mas-sachusetts Institute of Technology (May 2007).
[12] T. Binder, C. Heitzinger, S. Selberherr, A Study on Globaland Local Optimization Techniques for TCAD Analysis Tasks,IEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems 23 (6) (2004) 814–822.
[13] Y. Zhang, A. Srivastava, Accurate Temperature EstimationUsing Noisy Thermal Sensors, in: Proceedings of the 46thACM/IEEE Design Automation Conference, 2009, pp. 472–477.
[14] K. Luria, J. Shor, Miniaturized cmos thermal sensor array fortemperature gradient measurement in microprocessors, in: Cir-cuits and Systems (ISCAS), Proceedings of 2010 IEEE Interna-tional Symposium on, 2010, pp. 1855–1858.
[15] C. Christoffersen, G. Toombs, A. Manzak, An Ultra-Low PowerCMOS PTAT Current Source, in: Argentine School of Micro-Nanoelectronics Technology and Applications (EAMTA), 2010,2010, pp. 35–40.
[16] K. Ueno, T. Hirose, T. Asai, Y. Amemiya, Ultralow-PowerSmart Temperature Sensor with Subthreshold CMOS Circuits,in: Proceedings of International Symposium on the IntelligentSignal Processing and Communications, 2006, pp. 546–549.
[17] T. Meng, C. Xu, A Cross-Coupled-Structure-Based Tempera-ture Sensor with Reduced Process Variation Sensitivity, Journalof Semiconductors 30 (4) (2009) 1642–1648.
[18] P. Chen, C.-C. Chen, C.-C. Tsai, W.-F. Lu, A Time-to-Digital-Converter-Based CMOS Smart Temperature Sensor, IEEE Jour-nal of Solid-State Circuits 40 (8) (2005) 1642–1648.
[19] C. Besse, Why Natural Gradient for General Optimization?, Tu-torial, Departement Informatique, Universite Laval Sainte-Foy(Quebec), Canada (Sept. 2009).
[20] M. Sasaki, M. Ikeda, K. Asada, A Temperature Sensor Withan Inaccuracy of -1/+0.8°CUsing 90-nm 1-V CMOS for OnlineThermal Monitoring of VLSI Circuits, IEEE Transactions onSemiconductor Manufacturing 21 (2) (2008) 201–208.
[21] M. Pertijs, K. Makinwa, J. Huijsing, A CMOS Smart Temper-ature Sensor With a Voltage-Calibrated Inaccuracy of ± 15°C(3σ) From -55°C to 125°C , IEEE Journal of Solid-State Cir-cuits 40 (12) (2005) 2805–2815.
[22] S.-H. Lee, C. Zhao, Y.-T. Wang, D. Chen, R. Geiger, Multi-Threshold Transistors Cell for Low Voltage Temperature Sens-ing Applications, in: Circuits and Systems (MWSCAS), 2011IEEE 54th International Midwest Symposium on, 2011, pp. 1–4.
[23] O. Okobiah, S. Mohanty, E. Kougianos, O. Garitselov,G. Zheng, Stochastic Gradient Descent Optimization for LowPower Nano-CMOS Thermal Sensor Design, in: Proceedingsof the IEEE Computer Society Annual Symposium on VLSI(ISVLSI), 2012, pp. 285–290.
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