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NCAR/TN-400+IANCAR TECHNICAL NOTE
December 1993
NCAR/RAF VMEbus Interface for theParticle Measuring Systems OpticalArray Grey Probe
Jerry V. Pelk
RESEARCH AVIATION FACILITYATMOSPHERIC TECHNOLOGY DIVISION
NATIONAL CENTER FOR ATMOSPHERIC RESEARCHBOULDER, COLORADO
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TABLE OF CONTENTS
List of Figures .......................................... iii
Preface .................. ................. v......... v
Acknowledgements ..................................... vii
Abstract ................. .. ............... .. ......... ix
1. Introduction ................................... . 1
2. General Circuit Description . ...................... 3
3. Probe Data Unloading ................. ............ . 5
4. Particle Timing and Statistics .......................... 9
5. Charge Sampling .................................... 11
6. VME Bus Interface ................. .............. 13
Appendix A .......................................... 15
Appendix B ............ .... .... .. .................. 21
Appendix C ........................................... 25
Appendix D .................................. .... 41
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LIST OF FIGURES
Figure 2.1 VME Grey Scale Interface Block Diagram. ............. 3Figure 3.1 Probe Connector Diagram. ....................... 5
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PREFACE
This Technical Note describes the design and operation of theNCAR/RAF VMEbus interface board for the Optical Array Grey Probemanufactured by Particle Measuring Systems, Inc. of Boulder, Colorado. Thisinterface was developed at the NCAR Research Aviation Facility in order toprovide an interface between the Grey Probes and the Aircraft Data Systemsflown on the RAF aircraft. The RAF Aircraft Data Systems are designedaround the VMEbus which is a computer bus widely used for industrial andinstrumentation computers. There were no commercial interface boardsavailable which met our needs, so a custom board has been developed.
This Technical Note does not attempt to describe the operation or designof the Grey Probe other than the data and interface signals. It is assumed thereader has a basic understanding of the Grey Probe and its interface signals.The reader is referred to the manuals available from Particle MeasuringSystems for more information about the Grey Probe.
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ACKNOWLEDGEMENTS
The author wishes to express his appreciation to the many people whoprovided advice and assisted in the development of this project. Mike Spowartand Kim Weaver provided valuable technical advice for development andreview of the design. Herminio Avila supplied his superior CAD skills ingenerating the board layout. Kurt Zrubek spent many hours tracking down andordering components. Hung Ta did an excellent job assembling the prototypeboard, and making necessary changes as the design evolved.
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ABSTRACT
The Optical Array Grey Probe manufactured by Particle MeasuringSystems of Boulder, CO can be used for the study of cloud water droplets andice particles. The Grey Probe captures a 2-dimensional grey scale image ofparticles passing through its sampling volume. It was desired to fly the GreyProbes on the NCAR Research Aviation Facility aircraft, but a way was neededto interface the probe to the Aircraft Data Systems. An intelligent VMEbusinterface board has been developed by the RAF Instrumentation Group toprovide this interface for two Grey Probes.
One of the Grey Probes operated on the RAF sailplane has beenmodified to make analog charge measurements of a particle as it passesthrough the probe. The interface was therefore designed to sample and digitizethese charge measurements as well as collect the image data from the probe.
This document describes the design and operation of the VMEbus GreyProbe Interface. Schematic diagrams, DSP source code listings, andProgrammable Logic Device source code listings are included.
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1. INTRODUCTION
The NCAR/RAF VME Grey Scale interface provides a highperformance, intelligent interface to a VME bus based data collection systemfor up to two Particle Measuring Systems (PMS) 2D Optical Array GreyProbes. The interface may be configured under software control for both theGA1 and GA2 model probes. The interface is built to the VME bus 6U formfactor.
The interface also provides charge and splash analog inputs. Theseallow sampling of probes which have been modified, according to an NCARdesign, to make particle charge measurements.
The card is easily interfaced to a VME system via a dual-port memory.The sampling of the probes is controlled by the host processor by writing todefined control structures in the dual-port memory. An Analog Devices ADSP-2101 Digital Signal Processor on the interface collects data from the probes,computes particle statistics, and places data into defined buffers in the dual-portmemory. The host VME processor reads the data from the dual-port memoryacross the VME bus. The interface may also be software configured togenerate a VME bus interrupt when a buffer of data has been acquired.
2. GENERAL CIRCUIT DESCRIPTION
Figure 2.1 shows a block diagram of the Grey Scale interface.Appendix A contains a circuit diagram for the interface. Bus transceiversprovide buffering of the VME address, data, interrupt, DTACK* and WRITE*lines. Address decoding, and the VME data transfer bus interface are providedby an Advanced Micro Devices MACH210 programmable logic device (PLD).Another MACH210 PLD provides programmable VME bus interrupt capability.
Figure 2.1 VME Grey Scale Interface Block Diagram.
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An 8K x 16 dual port memory is used to hold grey scale image and charge data blocksuntil they are read by the host processor. Control structures are also defined in the dual-portmemory, through which the host processor may control the sampling of the probes. Accessto the dual-port memory by the host VME processor and the on card DSP is controlledthrough hardware semaphores provided by the dual-port memory chips.
The heart of the interface is an Analog Devices ADSP-2101 integer DSP. The DSPruns at a clock rate of 12.5 Mhz. It features 2K words of 24 bit internal program memory,and 1K words of 16 bit internal data memory. 2K words of 24 bit external program memoryare also provided on the card. The ADSP-2101 is capable of single clock instruction cycles.Two highly configurable serial ports are also provided. These serial ports are used to acquiredata from the grey scale probes.
Upon reset, the ADSP-2101 boots from a 16K x 8 EPROM. The sampling programis loaded from EPROM into internal and external program memory. The sampling programthen begins execution. The ADSP-2101 communicates with the rest of the interface via local14 bit address and 16 bit data buses. Local address decoding is provided by a MACH210PLD. The dual-port memory and other interface devices are accessed by the DSP across thelocal bus with 1 wait state.
A programmable true air speed clock is provided by an Analog Devices AD7245A 12-bit D/A converter, a Burr-Brown VFC110 voltage-to-frequency converter, and a 74HC4046phase-locked loop.
Particle charge sampling is provided by an Analog Devices AD7874 4 channel, 12 bit,100 Khz A/D converter. This A/D features 4 sample-and-holds. When a convst* signal isissued, the sample-and-holds acquire the analog signals. The A/D converter converts eachof the 4 signals and stores the results in an internal FIFO. An interrupt request is then issuedto the DSP, which reads the data from the FIFO across the local data bus. The A/D convertsat a 100 Khz rate. With interrupt latency the 4 charge channels may be sampled at up to a20 Khz rate.
Charge analog signal conditioning is provided by Burr-Brown INA117 instrumentationamplifiers, and Frequency Devices D70L6 6-pole Butterworth low-pass anti-aliasing filters.The -3db corer frequency of the filters is set at 2500 Hz.
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3. PROBE DATA UNLOADING
The ADSP-2101 provides two flexible serial ports (SPORTs). These ports along witha MACH210 PLD are used to control and unload data from the Grey Scale probes. Theprobes are connected to the interface via two 25 pin D microminiature connectors. Theseconnectors are mounted on the interface faceplate, and are labeled Probe 1 and Probe 2.Figure 3.1 shows the pin connections for these connectors.
Figure 3.1 Probe Connector Diagram.
Appendix B shows timing diagrams for the probe data unloading signals.signals to and from each probe are as follows:
The
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12
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Probe Control (PCTLx). A 16 bit control word is sent to the probe during the End-Of-Particle period.
End-Of-Particle (EOPx). This signal is asserted when the interface has detected theend of a particle in an image. This signal resets the probe for acquisition of another particle.
Unload (UNLDx). This signal causes the probe to move one 16 byte slice from itsmemory to its shift registers. This prepares the slice to be serially shifted down the data linesto the interface.
Bit Shift (BSHFTx). This signal clocks the probe shift registers and causes the datato be serially transmitted to the interface. The Bit Shift signal also clocks the probe controlbyte sent from the interface to the probe.
True Air Speed Clock (TASx). This signal is used by the probe to control the timingof the image slices while acquiring a particle image.
Full (FULLx). This signal is asserted by the probe to indicate that its memory bufferis full, and a particle image has been acquired.
Data (DATAx). The serial data sent from the probe to the interface. Data aretransmitted in 16 byte slices.
The probe control word is generated by writing the word to the SPORT. The SPORTDT line is connected directly to the PCTL line driver.
The EOP signal is generated by the SPORT TFS line. The TFS line is programmedto be asserted continuously during a write operation. Thus while the probe control word isbeing sent to the probe, the TFS line is asserted, and an EOP signal is generated.
The Unload signal is generated from the SPORT RFS line through the ProbeUnloading PLD. The RFS line is programmed in the DSP to be asserted every 64 bits read.The RFS signal is sent to the PLD, which passes every other RFS pulse through as the UNLDsignal. Thus an UNLD is generated at the end of each 128 bit slice read. Upon receiptof the UNLD signal, the Grey Probe loads its output shift registers with the next slice ofimage data. It should also be noted that UNLD is asserted at the rising edge of SCLK, andthe SPORT latches data on the falling edge of SCLK This 1/2 clock period allows time forthe probe to latch a data slice into its shift registers, and drive the data line with the valueof the first bit of the slice.
The Bitshift clock is generated from the SCLK signal of the SPORT. The SCLKsignal is sent to the Probe Unloading PLD where it is inverted and sent out as the Bitshiftclock. SCLK runs at 2.0833 Mhz.
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The True Air Speed clock is created when the AD7245A D/A produces a O-10V outputcorresponding to a 12-bit word written to it by the DSP across the local bus. The D/A O-10Voutput drives the VFC110 input, which produces a corresponding 0-3 Mhz output. TheVFC110 output feeds the 74HC4046 which multiplies the frequency by 4 to produce a 0-12Mhz tasbase signal. This tasbase signal is then divided by programmable dividersincorporated into the probe control MACH210 PLD to produce separate TAS clocks for eachprobe. The tasbase signal is divided by 2, 4, 8, or 16, according to the probe opticalresolution. The tasbase dividers also provide the phase-locked loop with the tasbase divided-by-4 comparator signal.
The Full signals from the probes are read by the DSP through the Probe UnloadingPLD. The Probe 0 Full line is read on DO, and the Probe 1 Full signal is read on D1 whenRDFULL is asserted by the DSP. A DSP interrupt request is generated on the rising edgeof the Full line from either probe.
Data are read directly from the probe by the SPORT. The probe shifts a bit of dataon the rising edge of each BSHFT cycle, and the SPORT reads the bit on the falling edge ofeach BSHFT cycle. During an UNLD pulse, BSHFT is suppressed. This allows the first bitof a slice to be read prior to the second bit being shifted out.
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4. PARTICLE TIMING AND STATISTICS
The global control struct, described in the VME Bus Interface section below, includesfields for initializing the interface time. The DSP keeps an internal real-time clock in hours,minutes, seconds and milliseconds. The DSP also keeps counters which count the numberof seconds and microseconds that have elapsed since the last power on or software reset. Themicrosecond counter has a resolution of 2 microseconds. In addition to particle timing, theDSP computes various statistics for each particle. These include particle length, width. Thestatistics are stored in the particle image header.
A probe is enabled to acquire a particle by the assertion of the End-Of-Particle (EOP)signal. When the DSP enables a probe to acquire a particle by asserting the EOP signal, theparticle header structure is stamped with the current second and microsecond counts. Whena particle is acquired by the probe, indicated by the Full line being asserted, the particleheader is again stamped with the current second and microsecond counts, as well as thecurrent hour, minute, second, and millisecond time. The difference between probe enabledand particle acquired counter values precisely measures the probe 'On' time prior to acquiringa particle. The counter values may be used for calculating inter-particle times and particledensities. The number of particles detected by the probe while not enabled is also stored ineach particle header. The real-time clock time-stamp of each particle allows grey scale datato be correlated to other sampled data being taken by the system.
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5. CHARGE SAMPLING
The Grey Scale interface provides charge and splash analog input channels, to samplecharge data from probes which have been modified to make charge measurements. TheAD7874 operates in a continuous sampling mode, taking charge measurements at a ratedependent on the true air speed and the desired charge sample spacing. The probe controlstructures provide fields for programming the desired charge sample spacing. When a particleimage is acquired by the probe, 32 samples of charge and splash data are stored in the dual-port memory data buffer following the particle's image data.
The AD7874 convst* signal is generated by a programmable divider incorporated intothe address decoder PLD. The convst* divider is a 10 bit down counter which divides thetasbase signal. The upper 8 bits of the counter are programmable. The counter isprogrammed by the DSP to provide the desired charge sample spacing as a particle movesthrough the charge detection rings. At 120 m/s true air speed, a charge sample spacing of.6 cm may be achieved. At 50 m/s, the charge sample spacing may be as low as .25 cm.
The DSP maintains a circular buffer of 64 charge measurements for each analogchannel. When a particle is detected in a probe by the FULL line of the probe beingasserted, the current position of the circular buffer is noted. The DSP maintains a computednumber of samples that will have been taken from when the particle was centered in thecharge ring to when the FULL line was asserted. Enough additional samples are then taken,such that a 32 sample window is acquired with the window center corresponding to theparticle being centered in the charge ring. These 32 samples of charge and splash data arestored following the particle's image data.
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6. VME Bus INTERFACE
The Grey Scale interface is programmed by the bus interface PLD to appear on theVME bus at a base address of 0x600000 or 0x610000 of the A24:D16 address space. JumperH1 determines which address is used. If H1 is installed the base address is 0x600000. If H1is removed, the base address is 0x610000.
Following is a memory map of the interface as seen from the VMEbus. Theseaddresses should not be confused with those listed in the vmegrey.h file listed in AppendixD. Those addresses are for the dual-port memory as seen by the DSP.
base + 0x0000base + 0x0040base + 0x0060base + 0x0100 to OxlFFFbase + 0x2000 to Ox3FFFbase + 0x4000 to Ox400Fbase + 0x8000base + 0x8002base + OxC000
probe 0 control structprobe 1 control structglobal control structprobe 0 data bufferprobe 1 data bufferdual-port semaphoresBIM vector registerBIM control registersoftware reset
The probe control structures are defined as follows:struct GreyPctl { // individual probe control struct
long id; // probe id, "Gl", "G2"short type; // 0 = none, 1 = GA1, 2 = GA2short resolution; // resolution (microns), 25,50,100,200short chg_spc; // charge spacing (mm), 0 = noneshort chgloc; // charge ring distance from beam (mm)short control; // control byte to send to the probeshort spare;
}
struct GreyGctl {short full[2];short hour;short minute;short sec;short settime;short tasshort go;
// global control struct// buffer full flags// set interface hour// set interface minute// set interface second// set time flag// current true air speed (m/s)// control structures initialized flag
13
The control structures are 'zeroed' out by the DSP shortly after a reset. VME businterrupts are also disabled by a reset. The host VME processor initiates sampling of one orboth probes. This is done by first programming the desired interrupt level and vector into theBIM. Next the host processor fills in the probe control structs, and sets the interface time andinitial true air speed in the global control struct. The host processor then sets the go flag inthe global control struct. Once a probe control struct has been properly initialized and thego flag has been set, the DSP will begin to monitor that probe for data.
When the data buffer has been filled, the DSP will set the full flag in the globalcontrol struct. If interrupts have been enabled, an interrupt will be issued to the hostprocessor. The host responds by reading the data from the buffer, and clearing the full flag.
At 1 second intervals, the host processor writes the current true air speed into theglobal control struct.
Before the host processor can access the dual-port memory control structures, it mustfirst acquire a semaphore by writing a zero to the first semaphore address. The hostprocessor then reads the semaphore. If the semaphore returns a zero, the DSP has releasedthe memory. The host processor may then read from or write to the control structures. Thesemaphore is then released by writing a 1 to the semaphore. This allows the DSP to gainaccess to the structures.
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APPENDIX A
Schematic Diagrams
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l ___l_____ JVP 11/15/3 AIRCRAFT DATA SYSTEI 2
VNE GREY SCALE INTERFAC[vowI D ImmD Dcl o il. Im I mm""
.... ~~~~~~~~
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I
APPENDIX B
Timing Diagrams
21
DATA SLICE UNLOAI
SCLK _
FULL -I
RFS -__
) TIMING
... _ _ / V . ... _ L YLV KL* * - * -
... r * - \
UNLD
BSBFT I E 2B E E9 l Ei
DATA B B1 B2 B3 B 5 B6 B B8 B9 Bl0 B
*. .* E*6- - * * *
* * * B62 B63 B64 B65 * * * B126 B127 BO Bl B2
EOP TIMING
SCULKL I
RFS-C
ULD -
BSBFT - -L--
DATA B126 B127
TFS /EOP
I E
k)ltJ
-
I \~~~~~~~~~~~~~~~
---
PCTL
~~L~~-L~~L~L~~L~~U1
BO B IB2 B3 B4 BS B6 IB
I
Appendix C
Programmable Logic Device Source Listings
25
I
;PALASM Design Description
;-------------------------------- - Declaration Segment ------------TITLE VME Grey Scale Bus Interrupter.PATTERN 0001REVISION AAUTHOR Jerry V. PelkCOMPANY NCAR, Research Aviation FacilityDATE 09/27/93
CHIP _vgbim MACH210
;----- ---------------------- PIN Declarations ----------PIN 35 CLK1 comb ;input, clockPIN 18 /RESET comb ;input, chip resetPIN 32 CS comb ;input, chip selectPIN 31, 14 LIRQ[1..0] comb ;input, interrupt reqsPIN 33, 13, 11 A[3..1] comb ;input, address linesPIN 42, 3, 43, 27, 26, 25, 24, 2 D[7..0] comb ;i/o, data linesPIN 10 /WRITE comb ;input, read/writePIN 36 /AS comb ;input, data strobePIN 9 /DSO comb ;input, data strobe 0PIN 8 /IACK comb ;input, interrupt ackPIN 5 /IACKIN comb ;input, iack daisy chainPIN 4 /IACKOUT comb ;output, iack daisy chainPIN 20, 21, 30, 29, 28, 40, 41 /IRQ[7..1] comb ;output, interrupt reqPIN 19 INTAE comb ;output, int ack enableNODE 47 INTACK comb ;ack this interuptNODE 61, 29, 59, 13, 7, 25, 19, 63 VECTOR[7..0] reg ;vector registerNODE 31, 53, 15, 9, 27, 23, 11 CTRL[6..0] reg ;control registerNODE 41 DTRST comb ;data lines tri-state node
;Define the vector and control register select strings.STRING WV 'CS * /a[3] * /a[2] * /a[1] * write' ;write vec regSTRING RV 'CS * /a[3] * /a[2] * /a[1] * /write' ;read vector regSTRING WC 'CS * /a[3] * /a[2] * a[1] * write' ;write ctl regSTRING RC 'CS * /a[3] * /a[2] * a[1] * /write' ;read ctl reg
;--------------------------------- Boolean Equation Segment ------EQUATIONS
;Define the vector register equations.vector[7..0].clkf = clklvector[7..0].setf = gndvector[7..0].rstf = resetif (WV) then begin
vector[7..0] = d[7..0]endelse begin
vector[7..0] = vector[7..0]end
;Define the control register equations.;ctrl[2..0] contains the interrupt level.;ctrl[4..3] contain the interrupt enable bits.;ctrl[6..5] contain the interrupt pending bits.
27
;An interrupt is cleared by writing a 0 into ctrl[6..5].
ctrl[6..0].clkf = clklctrl[6..0].setf = gndctrl[6..0].rstf = resetif (WC) thenbegin
ctrl[4..0] = d[4..0]ctrl[6..5] = d[6..5] + lirq[1..0] * ctrl[4..3]
endelsebegin
ctrl[4..0] = ctrl[4..0]ctrl[6..5] = ctrl[6..5] + lirq[1..0] * ctrl[4..3]
end
;Define the interrupt request output lines.case (ctrl[2..0])begin
0: beginirq[7..1] = gnd
end1: begin
irq[7..2] = gndirq[1] = ctrl[6] + ctrl[5]
end2: begin
irq[7..3,1] = gndirq[2] = ctrl[6] + ctrl[5]
end3: begin
irq[7..4,2..1] =irq[3] = ctrl[6]
end4: begin
irq[7..5,3..1] =irq[4] = ctrl[6]
gnd+ ctrl[5]
gnd+ ctrl[5]
end5: begin
irq[7..6,4..1] = gndirq[5] = ctrl[6] + ctrl[5]
end6: begin
irq[7,5..1] = gndirq[6] = ctrl[6] + ctrl[5]
end7: begin
irq[6..1] = gndirq[7] = ctrl[6] + ctrl[5]
endend
;Define the interrupt acknowledge enable equation.intack = iack * as * (ctrl[6] + ctrl[5]) *
(ctrl[2] :*: a[3]) * (ctrl[1] :*: a[2]) * (ctrl[0] :*: a[1])intae = iackin * intack * dsO ;put the vector on the bus
28
;Define the data lines output equations.dtrst = intae + RC + RVd[7..0].trst = dtrstif (intae + RV) then begin ;interrupt ack or vector read
d[7..1] = vector[7..1]d[0] = ctrl[6] ;which interrupt
endelse begin ;read control register
d[6..0] = ctrl[6..0]d[7] = gnd
end
;Define the iackout equation.iackout = iackin * /intack * as
29
;PALASM Design Description
;--------------------------------- Declaration Segment ------------TITLE VME Grey Scale VME Bus Interface.PATTERN 0001REVISION AAUTHOR Jerry V. PelkCOMPANY NCAR, Research Aviation FacilityDATE 10/19/93
CHIP _vgbus MACH210
;-------------------------------- PIN Declarations ---------------PIN 35 CLK comb ;input, clockPIN 25 /SYSRST comb ;input, bus resetPIN 42, 41, 40, 39, 38, 37, 36, 29, 30, 32 A[23..14] comb ;input,address linesPIN 31, 19, 18, 17, 16 AM[5..3,1..0] comb ;input, address modifiersPIN 15 /AS comb ;input, address strobePIN 13 /DSO comb ;input, data strobe 0PIN 26 /IACK comb ;input, interrupt ackPIN 14 /LWORD comb ;input, long word accessPIN 27 /PORST comb ;input, power on resetPIN 33 /WRITE comb ;input, read/writePIN 28 BD_NUM comb ;input, board number, 0 or 1PIN 10 INTAE comb ;input, interrupt ack inputPIN 20 /DTACK reg ;output, data transfer ackPIN 24 /RESET comb ;output, board resetPIN 43 /DPOE comb ; output, dual-port ram output enablePIN 2 /DPCE comb ;output, dual-port ram chip enablePIN 21 /DPSEM comb ;output, dual-port semaphorePIN 3 /VME ENAB comb ;output, bus tranceiver enablePIN 4 BIM comb ;output, bus interrupter enableNODE 17 BDSEL comb ;board selectedNODE 3 SWRST comb ;software resetNODE 49 WE comb ;write enable qualifierNODE 65 DSHFT reg ;dtack delay register
; Set the board base address at Ox6y0000, where y is the board number; 0 or 1. Respond to address modifier codes of 0x39 or 0x3D.
STRING VGBASE 'AS * /LWORD * /IACK *AM[5] * AM[4] * AM[3] * /AM[1] * AM[0] */A[23] * A[22] * A[21] * /A[20] * /A[19] * /A[18] * /A[17]*(A[16] :*: BDNUM)'
;---------------------------------- Boolean Equation Segment ------
EQUATIONS
;Define the board address equations.bd_sel = VGBASEvme enab = bd_sel + intae ; tranceiver enabdpce = bd sel * /a[15] * /a[14] * we ; base+OxO000dpsem = bdsel * /a[15] * a[14] ; base+0x4000bim = bdsel * a[15] * /a[14] * we ; base+0x8000swrst = bd sel * a[15] * a[14] ; base+OxC000
30
;Define the board reset equations.reset = swrst + sysrst + porst
;Define the dual-port ram output enable equation.dpoe = /write
;Define the shift register and dtack equations.;dtack is delayed one clock period from the time the board is selected;and dsO is asserted, or from the beginning of an interrupt ack;interval.dshft.clkf = clkdshft.rstf = porstdshft.setf = gnddshft = bdsel + intae
dtack.clkf = clkdtack.rstf = porstdtack.setf = gnddtack = (bd_sel + intae) * (dshft + dtack)
;Define the write enable qualifier.we = (write * dsO * bd_sel * /dtack) + /write
31
;PALASM Design Description
;--- ------------- ------------ Declaration Segment -----------TITLE VME Grey Scale Adress Decoder and Charge Conversion StartControlPATTERN 0001REVISION AAUTHOR Jerry V. PelkCOMPANY NCAR, Research Aviation FacilityDATE 10/04/93
CHIP _vgdecod MACH210;-------------------------------- PIN Declarations --------PIN 20 AO COMB ; address linesPIN 19 Al COMB ;PIN 16 A2 COMB ;PIN 15 A3 COMB ;PIN 11 A12 COMB ;PIN 33 A13 COMB ;PIN 14 /RD COMB ; readPIN 3 /WR COMB ; writePIN 32 /DMS COMB ; data memory selectPIN 4 /PMS COMB ; program memory selectPIN 30 /EXTPM COMB ; external program memory selPIN 43 /DPEN COMB ; dual-port enablePIN 42 /DPSEM COMB ; dual-port semaphore selPIN 26 /RDCHG COMB ; read charge dataPIN 28 RDFULL COMB ; read full lines requestsPIN 29, 27 LIRQ[1..0] COMB ; interrupt requestsPIN 31 /SETTAS COMB ; set true air speedPIN 24 PRGTASO COMB ; program tas #1 dividerPIN 25 PRGTAS1 COMB ; program tas #2 dividerNODE 39 PRGCHG COMB ; program charge divider
;Charge sampling divider pins and nodes.PIN 10 /RESET COMB ; gen system resetPIN 5, 6, 7, 8, 9, 21, 18, 17 D[7..0] REG ; data linesPIN 35 CLK1 COMB ; chip clockPIN 13 TASBASE COMB ; charge divider tas inputNODE 58, 56, 55, 54, 53, 51, 13, 17 CDIV[9..2] REG ;charge div regNODE 12, 9, 6, 3, 30, 27, 24, 18, 14, 65 CCNT[9..0] REG ;charge ctrPIN 2 /CONVST REG ; charge divider output
STRING DWAITO 'DMS * (/A13 + A13 * /A12)' ;0 wait state memSTRING DWAIT1 'DMS * A13 * A12' ;1 wait state mem
----------------------------------- Boolean Equation Segment ------EQUATIONS
extpm = pmsdpen = DWAITO * /a13 ;dp mem enabledpsem = DWAITO * a13 ;semaphore mem spacerdchg = DWAIT1 * /a3 * /a2 * /al * /aO * rd ;DWAIT1 + #h001rdfull = DWAIT1 * /a3 * /a2 * /al * aO * rd ;DWAIT1 + #h002lirq[0] = DWAIT1 * /a3 * /a2 * al * /aO * wr ;DWAIT1 + #h000lirq[1] = DWAIT1 * /a3 * /a2 * al * aO * wr ;DWAIT1 + #h003
32
settas = DWAIT1prgtasO = DWAIT1prgtasl = DWAIT1prgchg = DWAIT1
* /a3 ** /a3 ** /a3 ** /a3 *
a2 *a2 *a2 *a2 *
/al */al *al *al *
/aO * wraO * wr
/aO * wraO * wr
;DWAIT1 + #h004;DWAIT1 + #h005;DWAIT1 + #h006;DWAIT1 + #h007
;Load the charge divider register.cdiv[9..2].clkf = clklcdiv[9..2].setf = gndcdiv[9..2].rstf = resetif (prgchg) thenbegin
cdiv[9..2] = d[7..0]endelsebegin
cdiv[9..2] = cdiv[9..2]end
;Charge divider equations. The charge divider is a down counter that;counts down from the value in cdiv.ccnt[9..0].clkf = tasbaseccnt[9..0].setf = gndccnt[9..0].rstf = reset
if (ccnt[9..0] = 0) thenbegin
ccnt[9..2] = cdiv[9..2]ccnt[l] = vccccnt[0] = vcc
endelsebegin
ccnt[9] =
ccnt[8] =
ccnt[7] =
ccnt[6] =
ccnt[5] =
ccnt[4] =ccnt[3] =ccnt[2] =ccnt[l]=ccnt[0] =
end
ccnt[9]:+:/(ccnt[8]+ccnt[7]+ccnt[6]+ccnt[5]+c [4]+ccnt[3]+ccnt[2]+ccnt[1]+ccnt[0])ccnt[8]:+:/(ccnt[7]+ccnt[6]+ccnt[5]+ccnt[4]+ccnt[3]+ccnt[2]+ccnt[1]+ccnt[0])ccnt[7]:+:/(ccnt[6]+ccnt[5]+ccnt[4]+ccnt[3]+ccnt[2]+ccnt[l]+ccnt[0])ccnt[6]:+:/(ccnt[5]+ccnt[4]+ccnt[3]+ccnt[2]+ccnt[1]+ccnt[O])ccnt[5] :+: /(ccnt[4] + ccnt[3] + ccnt[2] + ccnt[l] +ccnt[O])ccnt[4] :+: /(ccnt[3] + ccnt[2] + ccnt[l] + ccnt[O])ccnt[3] :+: /(ccnt[2] + ccnt[l] + ccnt[O])ccnt[2] :+: /(ccnt[l] + ccnt[O])ccnt[l] :+: /ccnt[O]/ccnt[0]
;A charge conversion start is generated when ccnt reaches 0.convst.clkf = tasbaseconvst.setf = gndconvst.rstf = resetif (ccnt[9..0] = 0) thenbegin
33
convst = vccendelsebegin
convst = gndend
34
;PALASM Design Description
;--------------------------------- Declaration Segment ------------TITLE VME Grey Scale Probe Unloading Control and TAS controlPATTERN 0001REVISION AAUTHOR Jerry V. PelkCOMPANY NCAR, Research Aviation FacilityDATE 11/03/93
CHIP vgprobe MACH210
; --------------------------- PIN Declarations ---------------PIN 10 /RESET comb ; inputPIN 40 RDFULL comb ; inputPIN 35 CLK1 comb ; inputPIN 25, 43, 24 D[2..0] comb ; I/OPIN 42 /DIRQ2 comb ; outputPIN 32 /CHGIRQ comb ; input
;Probe 0 pins and nodes.PIN 39 SCLKO comb ; inputPIN 41 RFSO comb ; inputPIN 38 TFSO comb ; inputPIN 33 FULLO comb ; inputPIN 3 UNLDO comb ; outputPIN 2 BSHFTO comb ; outputNODE 9, 7, 5, 14, 13 CNTO[4..0] reg ;NODE 54 RFSHO reg ;NODE 43 RFSLO reg ;NODE 31 FULLO_CUR reg ;NODE 30 FULLO_PREV reg ;NODE 49 FULLO_INT comb ;
;Probe 1 pins and nodes.PIN 18 SCLK1 comb ; inputPIN 11 RFS1 comb ; inputPIN 17 TFS1 comb ; inputPIN 19 FULL1 comb ; inputPIN 20 UNLD1 comb ; outputPIN 21 BSHFT1 comb ; outputNODE 25, 23, 21, 28, 26 CNT1[4..0] reg ;NODE 53 RFSH1 reg ;NODE 56 RFSL1 reg ;NODE 32 FULL1_CUR reg ;NODE 6 FULL1_PREV reg ;NODE 65 FULL1_INT comb ;
;TAS divider pins and nodes.PIN 13 TASBASE comb ; inputNODE 39, 37, 35, 15 TCNT[3..0] reg ;PIN 36 PRGTASO comb ; inputNODE 10, 17 TDIVO[1..0] reg ;PIN 27 TASO comb ; outputPIN 37 PRGTAS1 comb ; inputNODE 12, 51 TDIV1[1..0] reg ;
35
PIN 28 TAS1 comb ; outputPIN 26 TASPLL comb ; output
Boolean Equation Segment ------;---EQUATIONSEQUATIONS
;Edge detector detects a falling rfs edge.;Detect a high rfs level.;Probe 0rfslO.clkf = clklrfslO.setf = gndrfslO.rstf = resetrfslO = rfs0
rfsh0.clkf = clklrfsh0.setf = gndrfshO.rstf = resetrfsh0 = rfslO
;Probe 1rfsll.clkf = clklrfsll.setf = gndrfsll.rstf = resetrfsll = rfsl
rfshl.clkf = clklrfshl.setf = gndrfshl.rstf = resetrfshl = rfsll
;Data are read from;pulse is generated;pulses.
the probe in blocks of 8 16 byte slices. An rfsevery 64 clocks. cnt0 and cntl count the rfs
;Divide by 17 counter equations. If a falling edge of rfs has been;detected, increment the counter. The counters are reset to 0 by a;tfs/eop signal. rfs is divided by 17 because the dsp generates an rfs;pulse at the start of each block read, and also at the end. This;means 17 rfs pulses are generated for each block read.;Probe 0cnt0[4..0].clkf = clklcnt0[4..0].setf = gndcnt0[4..0].rstf = reset
if (/tfsO) thenbegin
if (rfshO * /rfslO) thenbegin
cnt0[4] = /cnt0[4] * cnt0[3] * cnt0[2] * cnt0[l] * cnt0[0]cnt0[3] = cnt0[3] :+: (cnt0[2] * cnt0[l] * cntO[0])cnt0[2] = cnt0[2] :+: (cntO[l] * cnt0[0])cnt0[l] = cnt0[l] :+: cnt0[0]cnt[0O] = /cnt0[0] * /cnt0[4]
endelsebegin
36
cnt0[4..0]end
= cnt0[4..0]
endelsebegin
cnt0[4..0] = 0end
;Probe 1cntl[4..0].clkf = clklcntl[4..0].setf = gndcntl[4..0].rstf = reset
if (/tfsl) thenbegin
if (rfshl * /rfsll) thenbegin
cntl[4] = /cntl[4] * cntl[3] * cntl[2] * cntl[l] * cntl[0]cntl[3] = cntl[3] :+: (cntl[2] * cntl[l] * cntl[0])cntl[2] = cntl[2] :+: (cntl[l] * cntl[0])cntl[l] = cntl[l] :+: cntl[0]cntl[O] = /cntl[O] * /cntl[4]
endelsebegin
cntl[4..0] = cntl[4..0]end
endelsebegin
cntl[4..0] = 0end
;Unload is generated from every other rfs pulse.;The first unload of block read is not generated until the 2nd rfs.;This prevents the slice loaded into the probe shift registers;by the last unload of the previous block from being lost. It also;allows the overload count to be read from the probe, prior to;unloading the first slice of a particle.;Unload is only asserted during the second half of the sclk cycle.unld0 = rfs0 * /sclk0 * (cnt0[4] + cnt0[3] + cnt0[2] + cnt0[l]) *
/cnt0[0]unldl = rfsl * /sclkl * (cntl[4] + cntl[3] + cntl[2] + cntl[l]) *
/cntl[0]
;Bitshift is enabled by the first rfs, but is delayed until the end of;the rfs pulse. This avoids shifting away the first bit of data;before it is read. Bitshift is disabled when the 9th rfs occurs at;the end of a block read. During a tfs/eop bitshift is enabled and is;the same as sclk. This is to shift the probe control word.;Bitshift is the complement of sclk.;Bitshift is inhibited during an unload.bshft0 = /sclk0*(/unld0*(cnt0[4]+cnt0[3]+cnt0[2]+cnt0[1]+
cnt0[0])+tfs0)bshftl = /sclkl*(/unldl*(cntl[4]+cntl[3]+cntl[2]+cntl[1]+
cntl[0])+tfsl)
37
;FullO, fulll and chgirq are put onto the dO..d2 lines and are enabled;by rdfull.d[2..0].trst = rdfulld[O] = fullOd[l] = fullld[2] = chgirq
;Define the interrupt request sources edge detectors.fullO cur.clkf = clklfull0_cur.setf = gndfullOcur.rstf = resetfullOcur = fullO
full0_prev.clkf = clklfull0_prev.setf = gndfull0_prev.rstf = resetfull0_prev = full0_cur
full0_int ((fullO_cur * /fullO_prev) + full0_int) * /rdfull
fulll cur.clkf = clklfulll_cur.setf = gndfulll cur.rstf = resetfulll cur = fulll
fulll_prev.clkf = clklfulll_prev.setf = gndfulll_prev.rstf = resetfulll_prev = fulll_cur
fulll_int = ((fulllcur * /fulll_prev) + fulllint) * /rdfull
;Define the multiplexed DSP interrupt request output.dirq2 = full0_int + full0_int + chgirq
;Load the TAS divider registers.tdiv0[l..0].clkf = clkltdiv0[l..0].setf = gndtdiv0[l..O].rstf = resetif (prgtasO) thenbegin
tdiv0[l..0] = d[l..0]endelsebegin
tdivO[1..0] = tdivO[l..0]end
tdivl[l..0].clkf = clkltdivl[l..0].setf = gndtdivl[l..0].rstf = resetif (prgtasl) thenbegin
tdivl[l..0] = d[l..0]endelse
38
begintdivl[1..0] = tdivl[1..0]
end
;TAS divider equations. TAS divisions of 2, 4, and 8 are available.tcnt[3..0].clkf = tasbasetcnt[3..0].setf = gndtcnt[3..0].rstf = resettcnt[3] = tcnt[3] :+: (tcnt[2] * tcnt[l] * tcnt[0])tcnt[2] = tcnt[2] :+: (tcnt[l] * tcnt[0])tcnt[l] = tcnt[l] :+: tcnt[0]tcnt[0] = /tcnt[0]
;Select the TAS output based on the tas divider registers.case (tdiv0[1..0])begin
0: begin tasO = tcnt[0] end1: begin tasO = tcnt[l] end2: begin tasO = tcnt[2] end3: begin tasO = tcnt[3] end
end
case (tdivl[l..0])begin
0: begin tasl = tcnt[0] end1: begin tasl = tcnt[l] end2: begin tasl = tcnt[2] end3: begin tasl = tcnt[3] end
end
taspll = tcnt[l]
39
I
APPENDIX D
ADSP2101 Source Code Listings
41
I
/* vmegrey.hDefines for the VME Grey Scale Interface.
*/
#ifndef VMEGREY_H#define VMEGREY_H
#define TRUE#define FALSE
10
/* Note absolute addressesaddresses. */
#define#define#define#define#define#define#define#define#define#define#define#define#define#define#define
GREY DPR BASEGBL_CTLPRB 0 CTLPRB_1 CTLGBL_BUFOGBL BUF1DPR SEMRDCHGRDFULLLIRQOLIRQ1SETTASPRGTAS OPRGTAS 1PRGCHG
#define RDFULL PRB0 MASK#define RDFULLPRB1 MASK#define RDFULL CHG MASK#define PRGCHGCNTS_PERMMcharge res */
#define#def ine#define#define#define#define#define#define#define#define#define#define#define#define#define#define#define#define#define#define#define
GREY BUF LENGREYBUF FULL IDXGREY DPR SIZEGREY EOP DELAYGREY MIN SLICEGREY MAX SLICEGREY NUM PROBESGREY BITS PER PIXGREY PIX PER WORDGREYPIX PER SLICEGREYFIRST PIXPERGREYWORDS PER SLICGREY LEAST PIX MASKGREY MOST PIX MASKSP BUF LENCHG_BUF LENCHG NUM SAMPSCHGPOSMASKCHGNEGMASCHGSIGN_MASKGREYMAXTAS
are 16 bit word addresses, not byte
0x00000x00000x00200x00300x00800x10800x20000x30000x30010x30020x30030x30040x30050x30060x3007
dp ram dsp base addr */global ctl struct adr */probe 0 ctl struct adr */probe 1 ctl struct adr */probeO global data bufferprobel global data bufferdp ram semaphore */read charge data */read probe full bits */interrupt request 0 */interrupt request 1 */set true air speed */program tas 0 */program tas 1 */program charge divider */
0x01 /* probe 0 full bit mask */0x02 /* probe 2 full bit mask */0x04 /* charge data avail bit mask */
20 /* charge divider counts per mm of
OxOF80 /* dual-port buf len (3968),(ints)*/2856 /* buf is full if index exceeds */8192 /* size of the dp memory (ints) */150 /* eop delay loop count */
8 /* min num of slices per particle */128 /* max num of slices per particle */2 /* number of probes per interface */2 /* bits per pixel */8 /* pixels per 16 bit word */
64 /* pixels per 16 byte slice */BIT 4 /* pixs per bit of pix mask*/E 8 /* 16 bit words per slice */
0x0003 /* least significant pixel mask */OxCOOO /* most significant pixel mask */
64 /* sport circ buf len (ints) */128 /* charge data circ buf len(ints) */64 /* total chg samps per part */
OxOFFF /* set charge positive mask */OxF000 /* set charge negative mask */0x0800 /* charge negative sign bit mask */
150 /* maximum tas (m/sec) */
43
GREYTAS DACNTG1G2
GNONEGA1GA2PROBE0PROBE1
4095 /* maximum tas d/a count */0x4731 /* ascii code for "Gi" */0x4732 /* ascii code for "G2" */
01201
TCOUNT_MAX 49999 /* init tcount value, 100 msec ints*/TSCALE 2US 24 /* init tscale value, 2 usec/count*/TCOUNT PERMSEC 500 /* # counts per msec */TCOUNTSHFT_PER_USEC 1 /* #bits to shift to compute usec */
/* Probe resolution#define RES_25#define RES-50#define RES_100#define RES_200#define TAS-DIV 25#define TAS-DIV 50#define TASDIV_100#define TASDIV_200
and tas divider definitions. */2550
100200
0123
/* Macros. */#define prgtasO *(int*)PRGTASO#define prgtasl *(int*)PRGTAS1#define prgchg *(int*)PRGCHG#define rdcharge *(int*)RDCHG#define rdfull *(int*)RDFULL#define settas *(int*)SETTAS#define lirq(probe) *(int*)(LIRQO + probe) = 1#define get sem() for (*(int*)DPRSEM = 0; *(int*)DPRSEM & 0x01;*(int*)DPRSEM = 0)#define rel sem() *(int*)DPR SEM = 1/* Swap words of a long int. Compiler does arithmetic left shifts. */#define swap_words(x) (x << 16) + ((x >> 16) & 0x0000ffff)
/* Define the Probe and Global Control Structs. */typedef struct { /* Probe control struct */
short id; /* probe id, 'G1', 'G2' */short id fill; /* null bytes of the id string */short type; /* 0 = none, 1 = GA1, 2 = GA2 */short res; /* resolution(microns),25 50 100 200 */short chg_spc; /* charge spacing (mm), 0 = none */short chg_loc; /* charge ring dist from beam (mm) */short control; /* control byte to send to the probe */short spare;
} GreyPctl;
typedef struct { /*short full[GREY_NUM_PROBES];short hour; /*short minute; /*short sec;
global control struct *//* buffer full lengths
set interface hour */current minute */current second */
44
#define#define#define
#define#define#define#define#define
#define#define#define#define
*/
short settime; /* set time flag */short tas; /* current true air speed (m/s) */short go; /* control structs initialized */
} GreyGctl;
/* Pms 2d grey scale particle structures. Each particle is recordedas a GreyParticle header, followed by the image data. The imagedata consists of slice_count GreySlice structures.
typedef struct {short id;short idfill;short hour;short minute;short sec;short msec;long ena_sec;long ena_usec;long acq_sec;long acq_usec;short tas;short width;short length;short probe_ctl;short ovldcnt;short slice_cnt;short chg_len;short sparel;short spare2;short spare3;
} GreyParticle;
/* An image slice isbytes. */
/*/*/*/*/*/*/*/*/*/*/*/*/*/*/*/*/*
probe id, 'G1', 'G2' */null bytes of the id string */particle time stamp, hour */time stamp, minute */time stamp, second */time stamp, millisecond */probe enabled second count */probe enable usec count */particle acquired second count *,particle acquired usec count */true air speed, m/sec */particle max width in pixels */particle max length in pixels */probe control word */# particles while in overload */# slices in the image data */# 16-bit charge samples */
defined by an array of GREY_BYTESPERSLICE
typedef struct {unsigned short segment [GREY_WORDS_PER_SLICE];
} GreySlice;
#endif
45
/* vmegrey.c
ADSP2101 code for the VME Grey Scale interface.NCAR/RAFJerry V. Pelk
#include#include#include#include#include
<adsp2101.h><signal.h><string.h>"cdef2101.h""vmegrey.h"
/* Reserve registers for#pragma reserved 12
/* Program functions. */void get_image_data ();int process_image ();int process_slice ();int processcharge ();void build_pix_mask ();void init_particle ();void stampparticle ();void send_eop ();void set_tas ();void sport0_isr ();void sportlisr ();void dirq2_isr ();void timerisr ();void initisrs ();extern void initchargeextern void init_mem ();extern void init_sportsextern void inittas ();extern void check_time (extern void enable sportexternexternextern
int read first_pivoid update_dual_void waitvme ();
the serial port autobuffering. */
(int);
();
);_rx ();x ();port ();
/* get image data *//* process image data *//* process an image slice *//* check charge sampling status *//* build the pixel mask *//* initialize particle header *//* time stamp particle *//* send an eop to a probe *//* set true air speed */
/* initialize isrs *//* init charge sampling *//* init system memory *//* init serial ports */
/* initalize treu air speed divider *//* check for time set *//* enable sport to receive data *//* read first valid pixel *//* update dp buffer control vars */
/* wait for vme host initialization */
/* Circular data buffers. */int circ sp_bufO[SP_BUF_LEN];int circ sp_bufl[SPBUF LEN];int circ chg_buf[GREY_NUM_PROBES] [ CHG_BUF_LEN];
/* Global variables. */int gidx[GREY_NUM_PROBES]; /* current gbuf0 index */int gstart[GREY NUM_PROBES]; /* cur gbuf particle starting idx */int sp_full[GREY NUMPROBES]; /* sport local buffer full flags */int eop[GREY_NUM PROBES]; /* end of particle flags */int sportenabled[GREY_NUM PROBES]; /* serial port rx enabled flags */GreySlice pix_mask[GREY_NUM_PROBES]; /* unused pixels mask */int control; /* control word */long tas; /* current tas, long to prevent ovf */int *ptrl; /* needs to be global for inline
46
code*/int *ptr2;code*/
/* needs to be global for inline
/* Time variables. */int new_sec;int hour;int minute;int sec;long usec;long seccnt;long acq_sec[GREYNUM PROBES];long acq_usec[GREY NUM_PROBES];int acquired[GREYNUM_PROBES];
/* new second flag *//* current hour *//* current minute *//* current second *//* current microsecond *//* seconds since startup *//* particle acquired second *//* particle acquired microsecond *//* particle acquired flag */
/* Dual-port memory variables. */GreyGctl *gctl; /* control struct */GreyPctl *pctl[GREYNUM_PROBES]; /* probe control structs */GreyParticle *part[GREYNUM_PROBES]; /* current probe particle headers*/int *gbuf[GREY_NUM_PROBES]; /* data buffers */
/* Charge sampling buffers and control variables. */int chg_start[GREY NUM PROBES]; /* charge starting index */int chg_end[GREY NUM PROBES]; /* charge ending index */int chg_idx[GREYNUM PROBES]; /* current charge sample index */int chg_offset[GREY NUMPROBES]; /* charge offset delay index */int chg_full[GREY.NUM_PROBES]; /* charge buffer full flag */
main (){static int full;static int probe;
initmem ();probe = PROBE0;
/* init system memory */
/* Wait for the vme host to initialize the control structs. */wait_vme();
initsports ();init_isrs ();
/* Initialize the probes. */init_tas (PROBEO);inittas (PROBE1);init charge(PROBEO);init_charge(PROBE1);settas = 500;
while (TRUE) {
if (newsec) {set_tas ();check_time();new sec = FALSE;
/* main loop */
/* set tas once per second *//* check for time set */
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}
/* If the dual-port buffer is not full, and data is available from aprobe, then process the data. */if (pctl[probe]->type != GNONE) {
/* Get the buffer full flag. */get_sem();full = gctl->full[probe];rel_sem();
/* If the dual port buffer is full, don't do anything. */if (Ifull) {
if (eop[probe]) {init_particle (probe);send eop (probe);eop[probe] = FALSE;
}/* If image data is available from the probe, go read the data. */
if (((probe == PROBEO) && (rdfull & RDFULL PRBO MASK)) |((probe == PROBE1) && (rdfull & RDFULLPRB1_MASK))) {
get_image_data (probe);
/* Process the image data. If an eop is detected, wait for the chargedata. */
if (eop[probe] = process_image (probe)) {while (Iprocess_charge (probe));updatedual_port (probe);
}spfull[probe] = FALSE;
}}
}/* Toggle probes. */
if (probe == PROBEO)probe = PROBE1;
elseprobe = PROBEO;
}}/********************************************************************/
void getimagedata (int probe)
/* Gets an image data block from a probe. */{int temp[4];
enablesport_rx (probe); /* enable the sport */#pragma inline
dm(ptrl_) = I2;dm(ptr2_) = 12;
#pragma inline
/* Occasionally the sport isr cannot shut the sport off before the
48
first few words are overwritten. Once the first 4 words have beenreceived, they are saved, and then restored when the readcompletes.
while ((int)ptr2 < (int)(ptrl + 4))#pragma inline
dm(ptr2_) = 12;#pragma inline
}
temp[0] = *ptrl;temp[l] = *(ptrl + 1);temp[2] = *(ptrl + 2);temp[3] = *(ptrl + 3);
while (Isp_full[probe]);
*ptrl = temp[0];*(ptrl + 1) = temp[l];*(ptrl + 2) = temp[2];*(ptrl + 3) = temp[3];
{ /* wait for first 4 words */
/* save the first 4 words */
/* wait for completion */
/* restore first 4 words */
int process*** **image int probe)******** **************it process image (data blocks read from a probe)
/* Processes image data blocks read from a probe. */{
int startidx;int sp_idx;int nullslice;int firstpix;int *sp_buf;
/* local buffer starting index *//* local buffer current index *//* end of particle flag */
if (probe == PROBEO)sp_buf = sp_bufO;
elsesp_buf = sp_bufl;
/* If this is the start of a new particle, compute the slice mask andfill in the particle header.
*/if (Ipart[probe]->slicecnt) {
stamp_particle (probe, *(sp_buf + 1));first_pix = readfirst_pix (probe, *sp_buf);build_pix_mask (probe, first_pix);startidx = GREY WORDS PER_SLICE;
}elsestartidx = 0;
for (sp_idx = startidx, nullslice = FALSE;(sp_idx < SP BUFLEN) && lnull slice;sp_idx += GREY_WORDSPER_SLICE) {
part [ probe ] ->slicecnt++;if ((Iprocessslice (probe, sp_buf + sp_idx) &&
49
(part[probe]->slice_cnt >= GREY_MIN_SLICE)) ||(part[probe]->slice_cnt >= GREY_MAX_SLICE)) {null slice = TRUE;
}}memcpy((const void*)gbuf[probe] + gidx[probe], (void*)spbuf +
start_idx, (sizet)(sp_idx - start_idx));gidx[probe] += sp_idx - start_idx;
return nullslice;}
int processslice (int probe, int *src)
/* Processes a slice of data. Return FALSE if the slice is empty. */
{int j;int k;int t;int first_pix = -1;int last_pix = -1;int pix_cnt = 0;
first_pix = 0;last_pix = -1;pix_cnt = 0;
for (j = 0; j < GREY_WORDS_PER_SLICE; j++) {
/* The GA1 probe data is positive true logic, convert to negative truelogic to be compatible with the other 2d probes. The GA1 also onlyshifts out the minimum number of needed bits per slice. Apply thepixel mask to convert the unshifted bits to ones.
*/if (pctl[probe]->type == GA1)
*(src + j) = -*(src + j) | pix_mask[probe].segment[j];
/* Compute the particle width in this slice. */if (t = -*(src + j)) {
for (k = 0; k < GREY_PIX_PER_WORD; k++, t<<= GREY_BITS_PER_PIX){pix_cnt++;if (t & GREY_MOST_PIX_MASK) {
if (Ifirstpix)first_pix = pix_cnt;
last_pix = pixcnt;
}}
}
/* Update the particle header statistics. */if (first_pix) {part[probe]->length++;if ((k = lastpix - first_pix + 1) > part[probe]->width)part[probe]->width = k;
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}return firstpix;
}/********************************************************************/
int process_charge (int probe)
/* Checks for charge data collection completion. Moves charge data tothe dual-port buffer. Returns TRUE if the charge data iscompleted, FALSE otherwise.
*/
{int j;int k;
/* If charge sampling is not enabled, just return TRUE. */if (lchg_offset[probe])
return TRUE;
/* If charge sampling has completed, move the charge data to the dpbuffer. */
if (chg_full[probe]) {for (k = 0, j = chg_start[probe]; k < CHG_NUM_SAMPS; k++, j++) {
if (j >= CHG_BUF_LEN)j = 0;
/* If the charge is negative, set the upper 4 bits, otherwise clearthem. */
if (chg_buf[probe][j] & CHGSIGNMASK)*(gbuf[probe] + gidx[probe]++) = chg_buf[probe][j] ICHGNEGMASK;
else*(gbuf[probe] + gidx[probe]++) = chg_buf[probe][j] &CHGPOS MASK;
}part[probe]->chglen = CHG_NUM_SAMPS;
}else
return FALSE; /* still waiting for charge data */
return TRUE;}/ *********************************************************/
void init particle (int probe)
/* Initializes a particle's header. */
{int j;long cur_usec;
memset ((void*)part[probe], 0, (sizet)sizeof(GreyParticle));
/* Stamp the probe enable time. */cur usec = usec + ((TCOUNT_MAX - Tcount_Reg) <<
TCOUNT_SHFTPER_USEC);
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part[probe]->enausec = swap_words(curusec); /*swap words of long*/part[probe]->ena_sec = swap_words(sec_cnt);acquired[probe] = FALSE;
}
void stampparticle (int probe, int ovldcnt)
/* Stamps the particle header information. */{part[probe]->id = pctl[probe]->id;part[probe]->tas = tas;part[probe]->probe_ctl = pctl[probe]->control;part[probe]->acqusec = swapwords(acq_usec[probe]); /* swap long */part[probe]->acq_sec = swap_words(acq_sec[probe]);part[probe]->hour = hour;part[probe]->minute = minute;part[probe]->sec = sec;part[probe]->msec = usec / 1000;
/* Overload count in upper 8 bits. Compiler does arithmetic leftshifts. */
part[probe]->ovld_cnt = (-ovldcnt >> 8) & 0x00ff;}/********************************************************************/
void buildpixmask (int probe, int firstpix)
int maskidx;int first_idx;int bitidx;
for (maskidx = 0; maskidx < sizeof (GreySlice); mask idx++)pix_mask[probe].segment[mask_idx] = 0;
for (mask idx = GREY_WORDSPER_SLICE - 1, first_idx = 0;(mask_idx >= 0) && (first_idx < first_pix); mask_idx--) {
for (bitidx = 0; (bit_idx < GREY_PIX_PERWORD) &&(first_idx < firstpix); bit idx++, first idx++) {pixmask[probe].segment[mask_idx] <<= GREYBITSPERPIX;pix_mask[probe].segment[maskidx] |= GREY_LEASTPIX MASK;
}}
}/********************************************************************/
void send_eop (int probe){
int j;
get_sem( );control = pctl[probe]->control;rel_sem();
if (probe == PROBE0) {
52
SportOCtrlReg I= ISCLK;Sys_Ctrl_Reg |= SPORTO_EN;
#pragma inlineTXO = dm(control_);
#pragma inlinefor (j = 0; j < 150; j++);SportO Ctrl_Reg &= -ISCLK;SysCtrl_Reg &= -SPORTOEN;
}
else {Sportl_Ctrl_Reg |= ISCLK;Sys_Ctrl_Reg |= SPORT1_EN;
#pragma inlineTX1 = dm(control_);
#pragma inlinefor (j = 0; j < 150; j++);SportlCtrl_Reg &= -ISCLK;Sys_Ctrl_Reg &= -SPORT1_EN;
}
sport_enabled [ probe] = FALSE;
/* enable internal serial clock *//* enable the sport */
/* wait for control word to be sent *//* shut off the serial clock *//* disable the sport */
/* enable internal serial clock *//* enable the sport */
/* wait for control word to be sent *//* shut off the serial clock *//* disable the sport */
} }
/**********************************************************************/
void set_tas ()
/* Writes the true air speed count to the tas generator. */{
get_sem();tas = (long)gctl->tas;rel_sem();
settas = (int)((tas * GREY_TAS_DACNT) / GREY_MAX_TAS);}
void sport0_isr ()
/* Sport 0 interrupt service routine. Called when a buffer has beenfilled. */
SportO CtrlReg &= -(IRFS + ISCLK);Sys_Ctrl_Reg &= -SPORTOEN;SportOAutobuf_Ctrl = 0x00;sp_full[PROBEO] = TRUE;sport_enabled[PROBEO] = FALSE;
/*disab intern rfs and ser clk*//* disable the sport *//* disable receive autobuf *//* set sport buffer full flag */
}
void sportl_isr ()
/* Sport 1 interrupt service routine. Called when a buffer has beenfilled. */
SportlCtrl_Reg &= -(IRFS + ISCLK); /*disab intern rfs and ser clk*/
53
{
{
Sys_Ctrl_Reg &= -SPORT1_EN; /* disable the sport */SportlAutobuf_Ctrl = 0x00; /* disable receive autobuf */sp_full[PROBE1] = TRUE; /* set sport buf full flag */sport enabled[PROBE1] = FALSE;
}
void dirq2_isr ()
/* External interrupt 2 service routine. Called when a probe firstbecomes full or when charge data is available. */
{int rd_full;int cur_cnt;int j;
/* Read the probe and charge full status word. */rd_full = rdfull;
/* Read the current timer count. */cur_cnt = Tcount_Reg;
/* Read the charge data */if (rd_full & RDFULLCHG MASK) {
for (j = 0; j < GREY_NUM PROBES; j++) {chg_buf[j][chg_idx[j]++] = rdcharge;chg_buf[j][chg_idx[j]++] = rdcharge;
/* Check for chg_idx wraparound and for charge completion. */if (chg_idx[j] >= CHG_BUF_LEN)
chg_idx[j] = 0;if (chg_idx[j] == chg_end[j])
chg_full[j] = TRUE;}
}
/* If this is the start of a new particle, stamp the acquistioncounters. */
if ((rd full & RDFULL_PRBO_MASK) && !acquired[PROBEO]) { /* prb 0 */
acq_usec[PROBE0] = usec + ((TCOUNT MAX - cur cnt) <<TCOUNT_SHFTPER_USEC);
acq_sec[PROBEO] = sec_cnt;acquired[PROBEO] = TRUE;
/* Calculate the charge buffer start index from the current sampleindex. */if ((chgstart[PROBEO] = chg_idx[PROBEO] - chg_offset[PROBE0])< 0)
chg_start[PROBEO] += CHG_BUFLEN;if ((chg_end[PROBEO] = chg_start[PROBEO] + CHG_NUMSAMPS) >=
CHG_BUF LEN)chg_end[PROBEO] -= CHG_BUF LEN;
chg_full[PROBEO] = FALSE;}
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if ((rd_full & RDFULL_PRB1_MASK) && lacquired[PROBE1]) { /* prb 1 */
acq_usec[PROBE1] = usec + ((TCOUNT_MAX - curcnt) <<TCOUNTSHFT PERUSEC);
acq_sec[PROBE1] = seccnt;acquired[PROBE1] = TRUE;
/* Calculate the charge buffer start index from the current sampleindex. */1if ((chg_start[PROBE1] = chg_idx[PROBE1] - chgoffset[PROBEl])< 0)
chg_start[PROBE1] += CHG BUF LEN;if ((chg_end[PROBE1] = chgstart[PROBEl] + CHGNUM SAMPS) >=
CHG BUF LEN)chg_end[PROBE1] -= CHGBUF LEN;
chg_full[PROBE1] = FALSE;}
}
void timerisr ()
/* Timer interrupt service routine. Called every 100 msec. */
if ((usec += (long)100000) >= (long)1000000) {new_sec = TRUE;sec_cnt++;usec = 0;if (++sec >= 60) {
sec = 0;if (++minute >= 60) {minute = 0;if (++hour >= 24)hour = 0;
}}
}
void init/isrs **void initisrs ()
/* Initializes the interrupt service routines, and enables interrupts.*/{/* Attach isrs. */interrupt (SIGSPORTORECV, sport0 isr);interrupt (SIGINTO, sportlisr);interrupt (SIGTIMER, timerisr);interrupt (SIGINT2, dirq2_isr);
/* Program the timer counter to decrement every 2 usec (25 clocks),and interrupt every 100 msec. */
Tscale_Reg = TSCALE_2US;Tperiod_Reg = TCOUNTMAX;TcountReg = TCOUNT_MAX;
55
#pragma inline/* interrupt nesting, edge sensitivity for irq2 */
ICNTL = H#00;/* enable sportO & sportl recv, timer, and irq2 ints */
IMASK = H#2B;ENA TIMER;
#pragma inline}
56
/* extpm.c
ADSP2101 module contains routines for the vme grey scale interfacewhich are only run on startup, or which execute infrequently.
*/
#include <string.h>#include "cdef2101.h"#include "vmegrey.h"
void init_charge (int);void initmem ();void init_sports ();void init tas ();void check time ();void enable_sport_rx ();int read_first_pix ();void update_dualport ();void wait_vme ();
externexternexternexternexternexternextern
intintintintintintint
/*/*/*
/*/*/*/*/*/*-
circ sp_bufO[SP_BUFLEN];circ sp_bufl[SP_BUFLEN];gidx[GREY NUMPROBES];gstart[GREY_NUM_PROBES];sp_full[GREYNUMPROBES ]eop[GREY_NUM_PROBES];sportenabled[GREY_NUM_Pl
/* Dual-port memory variables. */extern GreyGctl *gctl;extern GreyPctl *pctl[GREY NUM PROBIextern GreyParticle *part[GREY NUM_]extern int *gbuf[GREY_NUM_PROBES];
/* Time variables. */extern int newsec;extern int hour;extern int minute;extern int sec;extern long usec;extern long seccnt;extern int acquired[GREY_NUM_PROBES
initialize charge sampling */init system memory */init serial ports */initalize treu air speed divider */check for time set */enable sport to receive data */read first valid pixel */update dp buffer control vars */wait for vme host initialization */
/* current gbuf0 index *//* cur part start idx */
; /* sport local buf full flags *//* end of particle flags */
ROBES]; /* serial port rx enab */
/* control struct */ES]; /* probe control structs */PROBES]; /* cur probe part hdrs*/
/* data buffers */
/* new second flag *//* current hour *//* current minute *//* current second *//* current microsecond *//* seconds since startup */
]; /* particle acquired flag */
/* Charge sampling buffers and control variables. */extern int circ chgbuf[GREY NUMPROBES][CHGBUFLEN];extern int chgstart[GREY NUM PROBES]; /* charge starting index */extern int chg_end[GREY NUM PROBES]; /* charge ending index */extern int chgidx[GREY NUM PROBES]; /* current charge index */extern int chgoffset[GREYNUMPROBES]; /* charge offset index */extern int chg_full[GREY_NUM_PROBES]; /* charge buf full flag */
void it charge t pr**********************obe)***************
void init_charge (int probe)
57
/* Initialize the charge sampling for a probe. */{
if (Ipctl[probe]->chg_spc)return;
/* Compute the charge tas divider value. The tasbase signal is a 0-12Mhz signal corresponding to a tas of 0-150 m/s. The charge tasdivider is a 10 bit down counter. The upper 8 bits areprogrammable. tasbase is divided by 4 * the prgchg count programmedinto the charge divider here. The charge sample timing is the samefor both probes. */
prgchg = pctl[probe]->chg_spc * PRGCHG_CNTS_PERMM;
/* Compute the charge buffer index offset based upon the distance fromthe probe laser beam to the center of the charge ring, and thecharge sample resolution. The multiplication by 2 is to accountfor the index offset for both the charge and splash samples. */
chg_offset[probe] = (pctl[probe]->chg_loc * 2) /pctl[probe]->chg_spc;
}/***************************************************************************/
void initmem ()
/* Initialize the system memory. */
int j;
Dm_WaitReg = DWAITO_1 + DWAIT1_1 + DWAIT2_1 + DWAIT3_1;SysCtrlReg &= PWAIT MASK; /* zero wait states for ext pm */rdfull = 3;
/* Zero the dual-port memory. */get_sem();memset ((void*).GREY_DPR_BASE, 0, (size_t)GREY_DPR_SIZE);rel_sem();
gctl = (GreyGctl*)GBL CTL;pctl[0] = (GreyPctl*)PRB 0 CTL;pctl[l] = (GreyPctl*)PRB1__CTL;gbuf[0] = (int*)GBL_BUFO;gbuf[1] = (int*)GBL_BUF1;
for (j = 0; j < GREY_NUMPROBES; j++) {part[j] = (GreyParticle*)gbuf[j];gidx[j] = sizeof(GreyParticle);gstart[j] = 0;sp_full[j] = FALSE;sportenabled[j] = FALSE;eop[j] = TRUE; /* send an initial eop */chg_start[j] = 0;chg_end[j] = 0;chg_idx[j] = 0;chgoffset[j] = 0;
58
chg_full[j] = FALSE;acquired[j] = FALSE;
newsec = FALSE; /* zero time variables */hour = 0;minute = 0;sec = 0;usec = 0;sec_cnt = 0;
}/********************************************************************/
void init_sports ()
/* Initialize the serial ports. */{/* Program the serial clock rate for approximately 2 Mhz. */SportO_Sclkdiv = 2;Sportl_Sclkdiv = 2;
/* Require tfs and no rfs,normal receive framing mode, alternate transmit framing mode,generate rfs and tfs internally16 bit word length.
*/Sport OCtrlReg = TFSR + TFSW + ITFS + SLEN_16;Sportl_Ctrl_Reg = TFSR + TFSW + ITFS + SLEN_16;
/* Program rfs to be issued every 64 bits. */SportORfsdiv = 63;SportlRfsdiv = 63;
Sys_Ctrl_Reg I= SPORT1_CFG; /* config sportl 1 as serial port */}/****************************************************************************/
void check_time ()
/* Checks for a time set. */{
get_sem();if (gctl->set_time) {
hour = gctl->hour;minute = gctl->minute;sec = gctl->sec;gctl->set_time = FALSE;
}relsem();
}/**********************************************************************
void init_tas (int probe)
/* Program the tas divider registers. */{
59
int *progtas;
if (probe == PROBEO)progtas = (int*)PRGTASO;
elseprogtas = (int*)PRGTAS1;
if (pctl[probe]->res == RES_50)*progtas = TASDIV_50;
else if (pctl[probe]->res == RES_100)*progtas = TAS DIV_100;
else if (pctl[probe]->res == RES_200)*progtas = TAS_DIV_200;
else*progtas = TAS_DIV_25;
}} ********************************************************************/
void enable_sport_rx (int probe)
/* Enables sport to read a block of 8 sixteen byte image slices. */{
if (probe == PROBEO) {#pragma inline /* Set up autobuffering. */
12 = ^sp_bufO_;M1 = 1;L2 = %spbuf0_;
#pragma inline
SportO_Autobuf_Ctrl = 0x25; /* enable receiveautobuffering */
SportO_Ctrl_Reg 1= IRFS + ISCLK; /* enab intern rfs and ser clk*/Sys_Ctrl_Reg |= SPORTO_EN; /* enable the sport */
}
else {#pragma inline /* Set up autobuffering. */
12 = ^sp_bufl_;M1 = 1;L2 = %sp_bufl_;
#pragma inline
Sportl Autobuf_Ctrl = 0x25; /* enable receiveautobuffering */
Sportl Ctrl_Reg |= IRFS + ISCLK; /* enab intern rfs and ser clk*/Sys_CtrlReg |= SPORT1_EN; /* enable the sport */
}
sport_enabled[probe] = TRUE;
}/********************************************************************/
int read_first pix (int probe, int first_pix)
/* Calculates the first valid pixel from the first pixel bit pattern.This value is only valid for the GA1 probes. The GA2 probes do not
60
mask unused pixels.
{int j;
if (pctl[probe]->type 1= GA1)return 0;
for (j = 0; (j < GREY_PIX_PER_SLICE) && (first_pix & 0x8000);j += GREY_FIRSTPIXPER_BIT, firstpix <<= 1);
return j;}
void update_dual port (int probe)
/* Checks if the dual-port buffer for the specified probe is full.Updates particle pointer and index.
*/
{
/* If the dp buffer is full, mark the buffer full by writing thelength into the global control struct, and reset the dp bufferindex. */
if (gidx[probe] > GREY_BUF_FULL_IDX) {get_sem();gctl->full[probe] = gidx[probe];rel_sem();gidx[probe] = 0;lirq(probe); /* generate vme interrupt */
}
/* Update the particle pointer and buffer index. */part[probe] = (GreyParticle*)(gbuf[probe] + gidx[probe]);gidx[probe] += sizeof (GreyParticle);
}
void wait_vme ()
/* Wait for the host vme processor to init the control structs. */{
int j;static int start;
start = FALSE;while (Istart) {
get_sem();start = gctl->go;rel_sem();for (j = 0; j < 100; j++);
}} ***************************************************************/
61