Op-Amp Design Lab

Tyler Anderson

EE 210H

10/26/13

Task 1 Basic Non-Inverting Amplifier Design Objective

The purpose of Task 1 is to attenuate a mono audio signal with maximum amplitude of 20 Vpp down to a 4 Vpp amplitude. A load resistor will be attached; however, the attenuation is independent of the load resistor. The input signal is modeled as: 10 sin(2pi*440t) V

Schematic

Theory of Operation

This circuit uses a non-inverting op-amp to attenuate an AC Signal. The signal is inputted at the V+ terminal, and a voltage divider is used to reduce the signal to the desired amount. R2 and R3 are both set equal to 1kohm to simplify the calculations of the circuit. The signal is than outputted as 1/5 of the input signal.

Derivations and Analysis

The gain for this non-inverting op-amp is:

Notice that R5 is not involved in the above equation, thus it does not affect voltage gain

The following steps were taken to choose resistor values:

1) We want Vout/Vin = 1/5 2) We arbitrarily choose R2=R3=1k 3) (1+(R2/R3)) = 2 4) We now know that (R1/(R1+R4)) must equal 1/10 to satisfy the equation 5) Thus, we choose resistor values of R1=1k and R4 = 9k

Note: During the actual experiment multiples for the resistor values were chosen to accommodate available lab resistors

Experimental Results:

Theoretical Results:

Actual Results:

% error = (4.4v-4v)/(4v) = 10% error

Conclusions:

During the actual experiment, our design produced a slightly higher attenuation then desired. This was most likely due to the fact that the actual resistors we used were slightly different then the modeled resistors, and that each resistor has a 5% tolerance. Choosing resistors

originally that were actual nominal resistors found in lab would have improved our results. This design would most likely be used for an engineer who was looking to reduce an input voltage without inverting it before it went to the next element in the series.

Task 2 Weighted Summing Amplifier Design Objective

The purpose of Task 2 is to produce a balanced and inverted sum of a stereo audio signal with unbalanced left and right channels. The left channel has a maximum output of 500 mVpp and the right channel has a maximum output of 200 mVpp. An output of 16 Vpp is desired. The amplification of each signal must be different to compensate for unbalanced signal amplitudes. The two channels are modeled as:

o Right channel: 0.1 sin(2440t) V o Left channel: 0.25 sin(23520t) V

Schematic

Theory of Operation

This design acts as a weighted summing amplifier circuit. The stereo audio signal acts as 2 unequal AC voltages. The left and right voltages are amplified than added respectively. The output is than the balanced sum of the two input voltages. The node V1 in the above circuit contains both the flow of current in from both the right and left channel, allowing KCL to be formulated and solved for Vout.

Derivations and Analysis

The output voltage formula for this respective circuit is:

Parameters

o Vout = -8V o V3 = .1V o V4 = .25 V

The following steps were taken to choose resistor values:

1) Principle of Superposition is applied in this problem 2) We wanted (-R2/R1)V3 = 4 3) We wanted (-R2/R3)V4 = 4 4) Since we know V3 and V4, this is a system of 2 equations with 3 unknowns 5) R2 is arbitrarily chosen to be 4 6) The system is then reduced to 2 equations with 2 unknowns 7) Solving via substitution, we get R1=.1 k-ohms and R3=.25 k-ohms

Note: During the actual experiment multiples for the resistor values were chosen to accommodate available lab resistors

Experimental Results:

Theoretical Results:

Actual Results:

Inputs:

Outputs:

% error = |15.5-15.6|/(15.6) = .6% error

Conclusions:

Compared to our Mulitsim model, our actual experimental voltage outputs were almost identical to our predicted values. However, compared to the value the problem statement asked us to find (16Vpp), both these values were slightly lower. This was due to the fact that only a selective number of resistors are available, and we assume this is the closest we could get to the desired 16 Vpp without exceeding it. This model would be used by an engineering who is looking to mix and amplify to unbalanced channel so they are seen as one input voltage by the next part of the circuit.

Task 3 Two Channel Mixer with Balanced Inputs Design Objective

The purpose of Task 3 is to produce a desired range of voltages from two balanced stereo signal inputs. Furthermore, it is necessary to mix both channels into a single inverted output while independently varying the gain of the two channels. Both stereo signals have the same

amplitude of 500 mVpp and the output voltages must range between .4Vpp and 16Vpp. The two channels are modeled as:

o Right channel: 0.25 sin(2440t) V o Left channel: 0.25 sin(23520t) V

Schematic

Theory of Operation

This circuit acts as a weighted summing amplifier except there is a catch: Both of the input voltages must be independently changed to produce a desired range of output voltages. In order to accomplish that, two potentiometers are placed in the circuit, one for each stereo input. When the potentiometer is set to a minimum, the voltage gain is a maximum because the potentiometer value is on the bottom half of the gain equation, thus inversely proportional to voltage gain. Since both voltage inputs and potentiometers are equal, resistors R3 and R1 are equal to allow both voltage sums to be equal. The op-amp then adds and mixes the two channels to produce the output voltage.

Derivations and Analysis

The output voltage formula for this respective circuit is:

Parameters

o Vout = -(.4Vpp to 16 Vpp) o V1 =.25 Vpp o V2 = .25 Vpp o R3pot = R4pot = 20 k-ohms

The following steps were taken to choose resistor values:

1) Two separate equations were made for both the maximum and minimum Vout. 2) At minimum gain, both potentiometers were set to 20 k-ohms and Vout was set to

.4Vpp 3) At maximum gain, both potentiometers were set to 0 k-ohms and Vout was set to

16Vpp 4) This created a system of 2 linear equations with 3 unknowns. 5) We assumed that R1=R3 to produce two equal and balanced stereo inputs 6) This created a system of 2 linear equations with 2 unknowns

V2 Vout R2

R3 + R4POT

+ R1 + R5pot - = R2 - V1

7) This system was solved to get R1=R3=.5k and R2=8k

Experimental Results:

Theoretical Results:

Maximum Gain Oscilloscope Capture

Minimum Gain Oscilloscope Capture

Conclusions:

An actual experiment was not conducted for this lab. While doing our preparations for this lab, we assumed that both inputs did not need to be independently varied; rather we varied the overall input seen by the inverting node of the op-amp by putting a potentiometer on the negative feedback line. This however, was an incorrect assumption due to the fact the problem statement clarified that both the right and left channels should be independently varied, thus both requiring a potentiometer. This circuit could possibly be used in an electronic device where a user can change the volume of both his/her left and right speaker.

Task 4 Level Shifting Amplifier Design Objective

The purpose of Task 4 is to add a necessary DC offset voltage to produce output voltages in a desired range. The input signal is a mono audio signal that is the output of a microphone. The microphone output drives an audio amplifier that can only handle positive voltages in the range

0V to 10V. The voltage swing of the microphone is 600mVpp and the only voltage source available to use as the DC offset is a +/- 15 V used to power the op amp IC.

Schematic

Theory of Operation

This design acts as a level shifting amplifier. On the inverting side, and AC voltage is applied to the op-amp that uses the generic (-R2/R1) gain equation. This inverting op-amp will amplify not only the positive waveforms of the AC Voltage, but also the negative. Thus, a DC offset voltage is added at the non-inverting input of the op-amp to shift the voltage swing so that it is in the range of 0V to 10 V. The gain produces an output of 10Vpp, and the DC offset adds +5V of voltage to shift the values into the desired range. The DC offset voltage is modified to the desired voltage be means of voltage division since only a 15 V source can be used.

Derivations and Analysis

The output voltage for the above circuit is:

Parameters

o Vout = 10Vpp (0v-10v range) o Vin = 600 mVpp o V2 = 15 V

The following steps were taken to choose resistor values:

1) Superposition was used to analyze this circuit 2) Setting V2 to 0, we know that (-R2/R1)(600mVpp)=(10Vpp) 3) R1 was arbitrarily chosen as 1k, thus just leaving a an equation with one variable 4) Solving the equation, R2 was chosen to be 16.66 k to produce a gain of 10Vpp 5) Setting Vin to 0, we know that (R4/(R3+R4))(1+R2/R1) (15) = 5 V 6) R2 and R1 are known from the previous equation 7) R4 is arbitrarily chosen as 1k 8) The equation is then solved for R3, which equals 52k

Note: During the actual experiment

Experimental Results:

Theoretical Results:

Actual Results:

% error: |9.80-9.99|/9.99 = 2% error

Conclusions:

As with previous tasks, our actual voltage output was slightly less than our predicted voltage output due to the values of resistors that were available in lab. If I had to do this lab again, I would definitely do a better job or preparing my calculations to include resistors that were actually available. Trying to calculate new resistor values during the actual lab time cost us a lot of time, and most likely cost us our ability to complete tasks 3 and 5 in lab. This circuit would be used by an engineer that needed a AC Voltage amplified, but the amplified voltage could not be in the negative range.

Task 5 Variable Level Shifting Amplifier Design Objective

The purpose of task 5 is to remove a range of DC offsets that is between 2 and 5 V from an AC input signal. The AC input signal is from an electric condenser microphone with a signal range of 200 mVpp and an unknown DC offset. The signal needs to be inverted, amplified, and the DC offset needs to be removed. This circuit needs to be adjusted so that any value in between 2 Vdc and 5 Vdc can be cancelled. Only a 15 V DC voltage source can be used as a cancellation device for the DC offset produced from the electrical condenser microphone.

Schematic

Theory of Operation

This design acts as a variable level-shifting amplifier. At the inverting node, an AC voltage and DC offset are both amplified. At the non-inverting node, a DC voltage is amplified. The AC Voltage from the function generator does not get cancelled, but the DC offset at the inverting node is cancelled by the DC offset at the non-inverting node. However, the DC offset is not just one single value, but a range of values. Thus at the non-inverting node a potentiometer is added to customize the amount of DC voltage that is entering the non-inverting node so that it can cancel any DC offset at the inverting node within the range of 2 V to 5 V.

Derivations and Analysis

The formula for output voltage is:

Note: In this particular problem the function generator was outputting a 400 mVpp as opposed to the specified 200 mVpp along with doubling the inputted DC offset. We assumed this was due to a slight difference between Mulitisims function generator and the function generator used in class. All equations below are solved using the 400 mVpp AC voltage delivered by the Multisim function generator.

Parameters

o Vin = 400 mVpp o Vout =20 Vpp o B = 2-5 VDC o V1 = 15 V

The following steps were taken to choose resistor values:

1) The principles of superposition are applied to get designated resistor values 2) Setting V1 = 0, we get the equation (-R2/R1)(400mVpp + (2-5)VDC) = 20Vpp 3) R1 is arbitrarily chosen as 1k, thus giving us a value of R2 = 50k 4) Setting Vin = 0, we get (R4/(R3+R4+Rpot))(1+R2/R2)(15) = Vout 5) For VDC = 5V, Vout = Vout(B) = 250 because (50/1)(5 VDC) = 250V 6) For VDC = 2V, Vout = Vout(B) = 100 because (50/1)(2 VDC) = 100V

Vin Vout R2

+ R1 - = R4 R2 R1

R3 1 + Rpot +R4 + V1 + B

7) For VDC = 5V, the potentiometer is set at 0 to ensure maximum gain 8) For VDC = 2V, the potentiometer is set at 20k to ensure minimum gain 9) This sets up a system of 2 equations with 2 variables (R3 and R4) 10) R3 is solved to be 4.61k, and R4 is solved to be 8.7 k.

Experimental Results:

Theoretical Results:

VDC = 2V

VDC = 5V

Actual Results:

This experiment was not performed in lab.

Conclusion:

We were not able to solve the final task in lab due to the complications we had coming up with equations to solve for R3 and R4. It wasnt until several days after the lab where we were able to come up with correct resistor values in Multisim. Part of the reason we had trouble coming up with equations was due to the function generator in Multisim. For some reason, it produced output DC and AC voltages that were double the desired voltages we inputted. For this reason, the resistor values we originally solved for did not work in our circuit in lab. Next time, I will be sure to do a more adequate job of understanding source properties in Multisim. This circuit would be designed by someone who would like to remove of variety of DC offsets from an AC voltage source.

Post-Lab Questions 1) A variable gain amplifier would require a 20k potentiometer in series with R4, thus changing the

output voltage equation to (R1/(R4+R1+Rpot))(1+R2/R3)Vin = Vout. R2, R3, and Vin would stay constant with the previous values obtained in task 1. I would have two separate equations to solve for R1 and R4, one for the minimum gain (where Rpot would = 20 k and Vout = 8Vpp) and one for the maximum gain (where Rpot would = 0k and Vout =16Vpp). The resulting values would be R1= 16k and R4=4k.

2) If we didnt want to inverse the balanced signal, we would need to sum the signals at the non-

inverting node. However, the voltage output equation would then change to Vout= (1+R2/R4)(V4R1 + V3R3)/ (R3+R1), where a similar algorithm that was used in Task 2 would be used to solve for resistor values.

3) If the voltage range was a desired 0Vpp to 16Vpp, one option would be to add a potentiometer with an extremely high resistance (if one was available) to both the left and the right signal inputs. The maximum gain equation would remain the same since the resistance of the potentiometers would be zero, but the minimum gain would equal close to zero if the resistance of the potentiometer approached zero due to the formula

4) If a variable signal amplification were desired, a potentiometer in series with R1 would be necessary to control the output signal. With a new potentiometer, the gain (R2/R1) would change, thus causing us to change resistor values R4 and R3. The original equation in equation 5 would be used to solve for the maximum gain of the op-amp:

In order to solve for the minimum gain for the entire circuit, this equation would be used:

The principle of superposition would be used to breakdown both of these equations in a similar manner to problem 5, and would allow us to solve for R3 and R4 values.

5) If the DC offset could be positive or negative, that would cause major complications to the circuit built in task 5. A positive DC offset would be attacked using the same algorithm originally used in task 5. However if a negative DC offset were used, a positive DC voltage source would have to be directly connected to the inverting node of the amplifier. This would act as a weighted summing amplifier that would just cancel out both DC offsets. On the line with the positive DC voltage source and extremely high resistant potentiometer would be placed that would cause the DC offset to reduce close to zero when the signal source produced a positive DC offset At the non-inverting node an extremely high-resistance potentiometer would be placed that would cause the DC voltage seen by the non-inverting node to approach zero if a negative DC offset voltage accompanied the signal source.