orchestrating packaging technologies for an extra … packaging technologies for an extra sensory...

Orchestrating Packaging

Technologies for an Extra Sensory

World

Jean-Marc Yannou

Christophe Zinck

Eddie Cheng

Vincent K. Liao

Alex Chan

Nicole Tien

[email protected]

ASE Group

mailto:[email protected]

© ASE Group. All rights reserved.

Keywords throughout this presentation

1

Supply chain

System-in-a-Package

Design, Manufacturing, Packaging and test

MEMS & Sensors

Integration

The “Internet of Things”

Development kit

Standardization

Motion

Environmental

sensors


Outline

1. The IoT: perspectives

2. Hardware integration challenges

3. Proposing a building block development kit approach

4. Low cost and small size with SiP and advanced MEMS packaging

2

© ASE Group. All rights reserved. 3

1- The “Internet of Things”: perspectivesThe next big thing in the industry?

Courtesy of Cisco


AerospaceThousands Units

MainframeMillions Units

PC (PM)350M+ Units

Cell Phone (PP)1.8B+ Units

Smart

Computing

(PMP)10B+ Units

Internet of

Things (IOT)

(PMMP)100B+ Units

Exponential

Connectivity &

Big Data

1970s 1980s 1990s 2000s 2010s

Long Tail

We are here

Volume Paradigm: 10X in 10Y, accelerating

2020s

4


IoT is a not a market, it’s a tech trend

Courtesy of Beecham Research


ASE Group’s IoT & MEMS/sensors vision

The IoT might well be the next big thing in the electronics industry with trillions of components per year, but it won’t happen everywhere nor at the same time

Each IoT module will carry at least one MEMS and/or sensor

For this to happen the following conditions must be fulfilled:

1. Sound business case on each segment

2. business model alignment / standardization on each

market segment

3. Communication protocol standardization

4.Cost/performance/size optimization of the module

hardware

6


2. Hardware integration challenges

7


Manufacturing IoT modules by the billions

8

Connectivity IC with

integrated

antennaPower management IC

Battery and energy

scavenging

Micro-controller

Sensor(s)

Autonomous Cost Effective Miniature Plug & play


What is an SiP Module?

SiP module is a package that contains an electronic

system or sub-system and is miniaturized through IC

assembly technologies.

Miniaturized

Module Package

Electronic System

Functionality

IC Assembly Technology


Manufacturing IoT modules by the billions

Not a single player can do it all: partnership needed for fast and cost effective “plug and play” design and manufacture

Multi-partner SiP has always been an issue because of the so-called “known good die”liability issue,but it has theability to make itsmall and costeffective

Multiple SiPs per IoT module will be needed in the first place, for RF and for sensors

10


SiP vs Soc vs ModuleSiP value mapping

11

In many cases, systems are made of a weighted mix of SoC, SiP and SoB


3. Proposing a building block development kit approach

12


4- Low cost and small size with SiP and advanced MEMS packaging

15


Encapsulation• Exposed Molding• Irregular Molding• Selective Molding• Double Side Molding

Interconnection• Wire Bond• Flip Chip• Laser Drilling

IPD

AFE EPS

Memory

APU / MPUMEMS

* SESUB is a trademark or registered trademark of TDK Corporation.

All other trademarks not owned by ASE that appear in this document are the

property of their respective owners, who may or may not be affiliated with,

connected to, or sponsored by ASE.

1

2

Wafer Level Packaging• Bumping• Fan-Out, Fan-In• TSV, TGV• IPD

3

Embedded Technology• a-EASI• SESUB (Partner w/ TDK)

4Stacking• Die Stacking• 2.5D, 3D (Partner w/ Inotera)• PoP, PiP

5

System Assembly• HD-SMT• Flex & Mechanical

Assembly

6

Shielding / Antenna• Conformal Shielding• Compartment Shielding• AoP (Stamping Antenna)• AoP (Lamination Antenna)

7

Enabling Technologies

ASE Confidential 25


SiP technologies - Double Sided Module - Introduction

• Advantage :

• Larger design space and no underfill required to fix substrate interposer (SI)

• Design Flexibility: FC, WB/Stacking on Bottom Side

• Additional package level shielding implement flexibility , eg. conformal shielding …….

Mold Underfill (MUF)

Conventional Double Sided Module Advanced Structure

Side View

Substrate

SI SI

Top/Bottom View

UndefillSubstrate Interposer

SI SI

Substrate

Side View - Type I

SI SI

Substrate

Mold Underfill(MUF)

SolderBall

SolderBall

Side View - Type II

Conformal Shielding (Option)

17


6.5 mm

6.5 mm

18

SiP Technologies - Antenna on Package (AoP)- Provide 40 meter communication range for wearable application

Component and Metal Stamped Antenna Pick & Place

Over Mold or Exposed Mold

BLE

Chip

Stamped Antenna

Antenna

Feed In

Point

Stamped Antenna


SiP Technologies - ASE EMI Shielding

Substrate

Side View

Conformal Metal Coating Compartment Molding

Conformal ShieldingDual Band WiFi/BT Module

Compartment ShieldingLGA-type WWAN Module

Molding Compound

Metal Coating

Metal

TrenchCu

SUS

SUS19

Laser Trench Type Metal Frame Type


MEMS & Sensors are key enablers for IoT

Application requirements

footprint and height reduction

Ultra low power & connectivity

New needs → waterproof solutions

rise / emergence of novel sensor clusters (barometer, hygrometry, gas, etc…)

Intelligence – sensor hubs and/or sensor fusion with data treatment and autonomous behaviors

Packaging challenges

Contradiction: Need to sense the environment but not all the environment. The package is a protection against the environment!

The package is a functional filter: it selects what should be let in from what is kept outside

How to reduce cost and still keep the package specificity? standardization versus diversity

Similarly to SiP: Tool box approach


Packaging technologies & BOM selections are key performance differentiators

Inertial Environmental

Cost effective

consumer

Low stress

Ultra low stress

Best form factor

MEMS (G or A)

ASIC

Cap

Magnetometer

MEMS

ASIC

MEMS (Accelero or /and Gyro)

Cap

sensor die

LF or LGA

ASIC

ASIC


Optical and Proximity SensorsA

LS, G

est

ure

se

nso

rs,

RG

B s

en

sors

UV

se

nso

rs

Clear compression molding with epoxy based mold (LGA or

DFN/QFN)

Sensor die

Clear liquid compression molding with silicone based mold – currently not

available at ASE(LGA or DFN/QFN)

UV ASICUV ASIC

Cavity mold + cavity filling with silicone gel

UV ASIC

Plastic Lid (walls) + silicone gel coating

(LGA or DFN/QFN)

Sensor die

Cavity mold & epoxy fill

PALS

–IR

/PR

OX

LED ASIC + photodiode

LGA with CL mold & Plastic Lid - HVM LGA with CL mold

VCSEL

ASIC + photodiode

sensor die

3D WLP cavity wafer molding

IC

3DWLP – sensor stacked on the ASIC (w or wo glass)

Sensor die

Sensor

3DWLP TSV-last w or wo glass

bio

sen

sor

com

bo

s

LED photodiode

IC

LEDASIC + photodiode

Sensor

LGA cavity with additional sensor

SESUB open cavity with CL mold

LED photodiodeSensor

IC

SESUB open cavity & clear epoxy filling & sensor

LEDphotodiode

IC

Hybrid optical LGA (molded or filled)

LED

photodiodeIC

Cavity OLGA for 1 window

LEDASIC + photodiode

Sensor

Cavity OLGA with glass or thin film cover

New HVM 2016 2017

HVM readiness

2018Mature

Note: ** ASE/TDK Joint Venture Trademark


WL-SiP drivers and expected benefitsKey benefits:

• Low noise

• High sensitivity

• Low power

• Small footprint

• Thinner profile

• Cost efficiency

• Optimized sensing

(optical, pressure,

etc…) or emitting

area (LED)

• Thermal dissipation

enhancement (RF

CMOS PA)

• QFN / LGA platform

• TSV + WLCSP platform

SensorSensor

• Perfect match to: Faced-up sensing, Faced-down routing

Environment Sensor ALS/CIS/Xray/IRIMU, RF


3DWLP with TSV-last benefits

Open Cavity LGAMold LGA Cavity DFNODFN

PKGWLPFootprint

25%

70%

74%

30%

50%

77%

Open Cavity LGAMold LGA Cavity DFNODFN

Height

2 dice solution


Die attach (MEMS or ASIC) to wafer (MEMS or ASIC):

WB (tape attach), Au wires

FC attach MR or TCB, solder or Cu pillar, NCP, CUF, MUF

Receiving wafer w or w/o carrier

Molded wafer after die to wafer attachment

Wafer Level Molding:

Wafer scale molding after either FC or WB (compression molding) – CUF & MUF

Wafer to wafer bonding (device capping):

Top wafer: Si, Glass, active die wafer (dev)

Bottom wafer: Si

Bonding technology: polymer, glass frit

On going (dev): metal bonding (solder, eutectic)

thin film capping, wafer scale plastic lid (under survey)

TSV-last manufacturing capability• Temporary or permanent wafer bonding• DRIE of TSV last• Via isolation & Cu fill• Passivation and RDL

MEMS

MEMS

Cap

ASE 3DWLP

available

Development

WB FC

W2W capping

TF capping

ASE 3DWLP tool box• Passivation, RDl & UBM

• Ball Attach• Laser marking• Dicing


Application : Body motion and physiological sign sensing in Wearable

Services Provided: Module design and manufacturing, system-level testing & firmware co-qualification

Technologies Leveraged : –Embedded Die Substrate

–Clear compound molding with micro-structure enhancement

Benefit : –84 % module XY size reduction

–Better optical signal interference isolation

–Less parasitic resistance & capacitance

Sensor – Optical HRM

PD LED

AFE MCU

Passive LED

Now : Discrete on PCBA Module Size : 15.0 x 15.0 x 1.7 mm

Now : Integrated Sensor Module Size : 7.7 x 4.6 x 0.9 mm

ASE Confidential


Smart bike demonstrator

29

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