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TIME BASE

CONTENTS

INTRODUCTION

GENERATION OF THE TDA 8855H COMMAND SIGNALS

DRIVER STAGE

LINE POWER AND THT

EW STAGE

FORMAT CORRECTION

FRAME SCANNING

TIME BASE SAFETY

CENTRE DE

FORMATION TECHNIQUE

41

41

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42

CENTRE DE

FORMATION TECHNIQUE

42

CENTRE DE

FORMATION TECHNIQUE

DIVISEUR

H/V

BASE DE

TEMPS

TRAME

SEPARATEUR

DE SYNCHRO

TRAME

SEPARATEUR

SYNCHRO

COMMUTATEUR

VIDEO

COMPARATEUR

DE PHASE N1

VCO

CONTROLE

COMPARATEUR

DE PHASE N2

MISE EN FORME

SORTIE LIGNE

GEOMETRIE

EST/OUEST

DECODEUR

BUS I2C

21

DECODEUR

PAL/NTSC

SECAM

51

62

63

64

3

17 18

56

57

DEMODULATIONIMAGE

1

2

IF

VIDEOAV2

AV3

TRAPPESON

16

24

VIDEO AV1

SW

IR01P

SCL

SDA

VERSTL 42

TL41

BREATHING

VERS L4AMPLITRAME IF01

VERS DRIVERLIGNE TL31

CV21

CV22

RV17QC014,43 MHZ

58

CV20

SECURITE

GENERATEURSAND CASTLE

8 V

RV19

RV16

CV27

RL18DV19

DL19

1

6

LL05

VCC: 8 V

53 59

IV01TDA8855H

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NOTES :

CENTRE DE

FORMATION TECHNIQUE

43

INTRODUCTION

Time base commands are generated by the video processor IV01: TDA 8855HThe latter is supplied with power from the 8 V voltage at pin 53.This voltage is available in "ON" mode.The 12C BUS is present on pins 17 and 18.

GENERATION OF THE LINE COMMAND

A VCO and divider assembly managed by the 4.43 MHZ quartz (pin 51)

supplies a signal at line frequency.A first phase comparator, on receiving the video signal line synchronisation,locks the divider.A second phase comparator ensures static phasing. It receives line returnpulses from pin 1 of transformer THT LL05 on pin 57.The line signal, after a formatting stage, is present at pin 56 of IV01 and is thensent to the line power transistor TL54 via the driver stage.

43

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44

44

CENTRE DEFORMATION TECHNIQUE

UTIMER

IV01

RV16100R

56

HOUT

HDRIVE

RL392k2

RL31

3k3

RL32

1k

RL332k2

RL341k8

RL354R7

RL36

2R2

CL391n

CL3182p

CL32470

CL364n7

CL3710

CL38220

TL31BC847B

TL33MPS750

DL32

DL33

LL31

TL32BC337-40

RL3722R TL34LL32

DL31

UDRIVER

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DRIVER STAGE

The line transistor is controlled by the intermediary of a driver transformeroperating in forward mode. Its primary is permanently crossed by a positive ornegative current.For this purpose, the base of the primary LL32 relies on positive voltage fromthe charge of capacitor CL38 linked to the cyclical ratio of the line command.The transistor driver TL 31 switched by this signal controls the push-pullTL 32/TL 33.Diodes DL32/DL 33 intervene in the case of a short-circuit between thecollector/transmitter of transistor TL 32 to render the TV set safe by stopping

scanning. From this time TL 33 conducts permanently and causes rapiddestruction of RL35.

NOTES :

CENTRE DE

FORMATION TECHNIQUE

45

45

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46

46

CENTRE DEFORMATION TECHNIQUE

TL034

DL14

HTR1

HTR2

+USYS

LL22

DL22

DL21 CL21

CL22

DH

DL13

3

4

2

7

CL15CL14

LL13

RL046 ZL13

CL13

8

RL03

RL07

LL05

LL26

RL25 RL24

CL24

CL25

DL24

DL26

RL261k

E/W

9

10

CL42

COMMUTATION

FORMAT

4/3-16/9

EHT

G2

G3

RL01

a

RL06

CL08

+8V

RL47

RL45RL46

BREATHING

EHT 2

RL09

CL094,7

BCL

DL095,1V

+U

SYS

+UDRIV

FORMAT

RL58

RL02

RL59

CL59

TL02

TL59

CL12

VSUPPLY

6ZL14

CL16

TL14

RL15 DL12

+5VON

5VDST

5VP

5

1

6

RL18DL19

+H

VERS DL19

VERS BCL

ZL11 RL11DL11CL16

RL12

VRETRACE

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LINE POWER AND THT

The LL05 primary supplied by the + USYS voltage is associated with the linepower transistor TL34 and the diode modulator DL21, DL22, CL21, CL22.These switching components also channel current from the horizontal deviatorconnected in serial with the capacitor of "S " CL24 and the linearity inductancecoil LL26.Two circuits are assembled in parallel on the capacitor "S". The first is adamping circuit to suppress oscillations which appear during rapid changes inbeam current. The second on the 16/9 rack only, allows by adding a capacitorswitched by a thyristor, adjusting line amplitude during changes of format.

On the LL05 secondaries the following are located:- pin 2 and 7 a pulse for heating the image tube filament.- pin 4 rectified by DL13 filtered by CL13 "V SUPPLY" voltage.- pin 3 rectified by DL14 filtered by CL14 and stabilised by TL14 from the

5 Vmp with a voltage of 5V ON.- pin 1 a positive line return pulse to obtain service signals.- pin 5 rectified by DL11 filtered by CL16 a "V RETRACE" voltage to supply the

frame amplifier during return.- pin 8 the image of the instantaneous beam current "BREATHING", "bcl","EHT 2".

NOTES :

CENTRE DE

FORMATION TECHNIQUE

47

47

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48

48

CENTRE DEFORMATION TECHNIQUE

RL44

-

+GENERATEURDE PARABOLE

E/W

GENERATEUR

DE RAMPEVERTICALE

8V

LL05

RL47

RL46

8

DL425,1V

CV25

3

62

CL48

RL41

EW BACK

EW DRIVE

CL42

LL22

DL21

DL22

CL211

CL22

IV01

RL45

+USYS

RL01

RL06

RL07

BREATHING

RL40

TL41

TL42RL42

8V

CL41 RL43RV20

CL25

RL48

RL49

DL48

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EW STAGE

The integrated circuit IV01 integrates the E/W parabola generatorsynchronised by the vertical ramp generator.The various adjustments are by the intermediary of service mode and arerouted by the 12C bus.An amplifier integrated in IV01 supplies in the form of a parabolic current at pin62 an E/W command, which is applied at two transistors TL 41 and TL 42assembled in darlington. It extract energy from the modulator through theinductance coil LL22.From the EHT2 voltage image of the beam current and through DL48, RL48,

RL49, CL48, automatic correction of width is made depending on the tube rate.

NOTES :

CENTRE DE

FORMATION TECHNIQUE

49

49

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50

50

CENTRE DEFORMATION TECHNIQUE

DL425,1V

CL48

RL41

EW DRIVERL44 CL42

LL22

DL22 CL22

RL40

TL41

TL42RL42

8V

RL43

RV20

RL48

RL49

DL48

EHT 2

TL034

+USYS

DL21 CL21

DH

LL26

RL25 RL24

CL24

CL25

DL24

TL 51

RL261k

9

10

CL41

CL51

DL

25

DL51

CL52

RL

51

RL52

TL52

CL53

RL54

CL

55

RL55

RL56

TL55

RL57

P SWITCHVENANT

BROCHE 41DE IR01

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FORMAT CORRECTION

On the 16/9 rack it is possible to switch via the intermediary of TL55, TL52,TL51 controlled by the IR01 p, a second capacitor "S" CL51 in parallel onCL24.The effect is to reduce line amplitude and supply correct linearity in centred4/3 mode.

NOTES :

CENTRE DE

FORMATION TECHNIQUE

51

51

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52

CENTRE DE

FORMATION TECHNIQUE

52CENTRE DEFORMATION TECHNIQUE

PLL

LOGIQUE HLOGIQUE V

BUS

I2C

GENERATEUR DE

RAMPE VERTICALE

IV01 TDA8855H

RV

25CV

26

63

64

45 3 -

+

-

-

+

A

B

3

+

+-

+

6

7

4

9

-+

5

RF04

RF05

RF06

RF07

DF01

RF08

CF08

V

RETRACE

V

SUPPLY

SECURITE

8

V

GUARD

BREATHING

1

2

IF01

TDA8351

TRAME

DEV

CF10

RF

02

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NOTES :

CENTRE DE

FORMATION TECHNIQUE

53

53

FRAME SCANNING

Two circuits are involved in frame scanning.IV01 (TDA8855H) generates the frame saw toothIF01 (TDA8351) amplifies this signal and supplies the signal to the framedeviator

The video processor IV01 incorporates a vertical ramp generator which usesthe capacitor CV26 (pin 5) and the resistor RV25 (pin 4).The amplitude of this ramp is adjusted versus the BREATHING informationapplied at pin 3 (automatic height correction).

Linearity and amplitude correction is also supplied by IV01. They can beadjusted by bus 12C in the framework of service mode. A correct border isensured by internal continuous voltage adjusted at bus 12C.A saw tooth signal is available at pin 64 combined with a continuouscomponent on pin 63 to control the amplifier circuit IF01.The circuit TDA 8351 receives the previous commands at pins 1 and 2.The voltages V SUPPLY and V RETRACE supply this circuit.The output pin 5 supplies current to the deviator. In series with the latter, theresistors RF04, RF05, RF06 develop at their terminals, an image of the currentfor the counter reaction.To avoid burning the image tube in the event of frame failure, we monitorsatisfactory operation of the frame time base by the GUARD data which will beat high status. In the case of a frame failure, absence of this data indicates tothe video processor IV01 (pin 34) a defect, and the latter cuts the three RGBchannels by rendering the circuit safe after two start-up attempts (failurecode 27).

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54

54

CENTRE DE

FORMATION TECHNIQUE

8 V

TL71

DL75

RL75

SECURITE

VERS BROCHE

58 DE IV01

8 V

RL77 DL77

CL72

RL74TL72

CL71

RL77

RL73

RL72

RL71RL70

DL73

DL74

DL72

DL71

BCL

5 VON

V SUPPLY

V RETRACE

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TIME BASE SAFETY

The safety circuit detects short circuits in scanning or line voltages andrunaway of the beam current.The frame deviator signal supplies a voltage which polarises the zener DL71and saturates the transistor TL71 imposing a low level on the SAFETY line.The following defects force a high level on the SAFETY line, which applied atpin 58 of IV01 cuts off line scanning.

- Frame defect by DL71.- Defect in the V SUPPLY voltage by DL72.- Defect in the 5V On voltage by DL73.

- Runaway of the beam current.

NOTES :

CENTRE DE

FORMATION TECHNIQUE

55

55

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56

56

CENTRE DE

FORMATION TECHNIQUE