pg1 - title page - analog devices...pg1 - title page pg4 - uart, microsd, adc, eeprom pg7 - nav...

PG1 - TITLE PAGE

PG4 - UART, MICROSD, ADC, EEPROM

PG7 - NAV SWITCH, RTC, OLED, IMUPG8 - POWER OVER ETHERNET

PG11 - BATTERY CHARGING CIRCUITPG12 - POWER SWITCH, PUSH BUTTON CONTROLLER

PG14 - 3V3 AND 1V8 SWITCHING REGULATORPG13 - POWER SOURCE SELECTION

PG10 - LI-ION BATTERY SWITCHING REGULATOR

PG5 - MISCELLANEOUS (JTAG, FAN)

PG3 - AUDIO : CODEC, ACCESSORY DETECTION AND CONNECTOR

PORTABLE RADIO REFERENCE DESIGN

PG15 - 12V0 SWITCHING REGULATOR

PG6 - GPS

D

B

MAY-2017

SEP-2018

INITIAL RELEASE

NOV-2016

C. CARBUNARU

N. WILSON

AS PER ECR -070759

C N. WILSONAS PER ECR -067256

SEP-2016

A

SEP-2016

SEP-2016

SEP-2016

SEP-2016 N. WILSON

AS PER ECR -065704

PG9 - EXTERNAL SUPPLY

PG2 - SOM CONNECTORS, RF CARD CONNECTOR, I2C ADDRESS TABLE

23 NOVEMBER 2018

REV E

SEP-2016

1 15

CR-1 : @\02_039799A_LIB\.\02_039799A_TOP\(SCH_1):PAGE1

<User Define><User Define><User Define>

: Pitch-pitch StyleVendor StylePACKAGE : N/A-lead N/A N/A-family

: N/AProduct(s): N/AHW TYPE : Customer Evaluation Z

no_template

ECodeID1:1

02_042967TBD

N/A

R. MACDONALD

N/A

M. JOSE

G. CELEDONIO

N. WILSON

N/A

R. AMARILLE

N/A

N/A

REV

2REVISIONS

1

OWNED OR CONTROLLED BY ANALOG DEVICES.THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTSPURPOSE DETRIMENTAL TO THE INTERESTS OF ANALOG DEVICES. JP#USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER

8

CONNECTORFUNCTIONCODE DEVICE

2

2

6JUMPER TABLE

4

7

5

A

3

DATE APPROVED

D

B

DESCRIPTION

34

OFFON

5

57

OEM PART# HANDLER

6

C

B

8

SOCKET OEMBK/BD SPEC.P.O SPEC.

A

1

RELAY CONTROL CHART

3 14

C

NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR IN PART, ORTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IT IS

CHECKER

DESIGNER

PTD ENGINEER

TEST ENGINEER

DECIMALS

X.XXX +-0.005X.XX +-0.010

MASTER PROJECT TEMPLATE

TOLERANCES

+-1/32FRACTIONS

+-2SIZE

DDDD

SCHEMATIC

DRAWING NO.

SCALE CODE ID NO.SHEET OF

REV.

DA A

ENV C

L GSE

ODATE

ANGLES

UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN INCHES

TESTER TEMPLATE

TEMPLATE ENGINEER

HARDWARE SERVICES

HARDWARE SYSTEMS

COMPONENT ENGINEER

TEST PROCESS

HARDWARE RELEASE

* SEE ASSEMBLY INSTRUCTIONS

CONTROL

D

ADCADM1166 0X68

0X20I2C ADDRESS

0X640X69

BATTERY CHARGERAUDIO SWITCH

ADCEEPROM

DEVICERF BOARD

REAL TIME CLOCKCOULOMB COUNTER 10

30X3AAUDIO

44

0X2F0X14

SOM DEVICES

11

50X50

3PAGE

ADDITIONAL CONNECTOR

I2C ADDRESS0X??

30X3B

PWR_ENABLE

VCCO_33_34

PS_MIO14_500_JX4

VCCO_12

AD9361+ZYNQ MODULE CONNECTORS

VCCO_12PS_MIO15_500_JX4

VCCO_33_34

VCCO_13 VCCO_13

VCCO_13

2 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

61083-101400LF

61083-101400LF61083-101400LF

61083-101400LF61083-101400LF61083-101400LF

61083-101400LF 61083-101400LF

JX2 JX4JX1

JX1 JX1 JX3 JX4

JX3 JX4

JX3

JX3JX1 JX2

JX4JX2 JX2

AUD_MCLK

+1V8

AUD_BCLK

GPS_RXD1_1V8

IMU_DIN

SCL

GPS_FORCE_ON

NAV_SWITCH_S1

NAV_SWITCH_S3

SWITCH_LED_GMIC_PRESENT_N

RF_GPIO1_BANK34

ADP5061_IO2

RF_GPIO3_BANK34RF_GPIO5_BANK34

USB_OTG_NUSB_OTG_P

GPS_STANDBY

CFG_DONE

OLED_SCL

ADP5061_IO1

IMU_RST_N IMU_SCLK

SOM2C_KILL_N_1V8

+5V

ETH0_MD2_NETH0_MD1_P ETH0_MD2_P

AUD_SDATA_OUT ETH0_PHY_LED1+3V3

AUD_SDATA_IN SD1_B_CLK

ETH0_PHY_LED0

IMU_DR

SD1_B_CDNSD1_B_DAT2SD1_B_DAT0

+5V

JTAG_TDIJTAG_TMS

OLED_/RES

OLED_CS#

JTAG_TDOJTAG_TCK

NAV_SWITCH_S2NAV_SWITCH_A

TIMER_INTSWITCH_LED_B

SWITCH_LED_R

USB_OTG_ID

IMU_DOUT

+5V ETH0_MD4_N

ETH0_MD1_N

NAV_SWITCH_S4USB_OTG_SW_EN

GPS_RESET

ETH0_MD3_NETH0_MD3_P

SD1_B_DAT3SD1_B_DAT1SD1_B_CMD

IMU_SYNC

IMU_CS_N

TS3A227_INT_N

GPS_PPS

AUD_LRCLK

OLED_D/COLED_SDI

+5VAD9361_CLK

GPS_TXD1_1V8

SOM_TXD

AD9361_AUXADC

PSS_VALID1_N

C2SOM_KILL_N

RF_GPIO4_BANK34

RF_GPIO0_BANK34

PSS_VALID2_NPSS_VALID3_N

SOM_RXD

+5V

+3V3

+1V8 +1V8 +1V8

RF_GPIO2_BANK34

NAV_SWITCH_B

NAV_SWITCH_S5

ADP5061_IO3SDA

AD9361_AUXDAC2AD9361_AUXDAC1

AD9361_GPO3

PG_MODULE

AD9361_GPO0AD9361_GPO2

AD9361_GPO_VDD

AD9361_GPO1

+5VVCCIO_EN

+3V3

CC_AL USB_VBUS_OTG

ETH0_MD4_P

ADP1614_EN92

68

76

64

7072

82

66

54

100989694

9088

84

8078

74

62605856

52

86

61

7371

51

55

99979593918987858381797775

69676563

5957

53

58

64

68

100989694929088868482807876747270

66

6260

5452

56

2325

13

7

1921

29

17

5

43

49

11

4745

413937353331

27

15

9

31

3230

16

20

5048

18

28

44

38

12

46

4240

36

262422

14

10

642

34

8

24

48

86

50

38

46444240

363432302826

22201816141210

42

34

44

32

46

4042

28

50

26

48

3836

30

24222018161412108642

5860

76

6462

78

100

80

74

84

52

66

98

68

82

96

72

56

9492908886

54

70

60

70

52

78

5456

10098969492908886848280

767472

68666462

58

23

47

43

7

41

37

49

45

39

35333129

25

2119171513119

531

27

6159

9795

8987

73

6563

53

67

51

81

77

6971

75

79

99

9391

8583

5557

71

57

51

9997959391898785838179777573

696765636159

5553

97

91

99

63

6967

71

79

61

9593

8987

8381

75

5957555351

85

77

73

65

27

47

37

43

29

45

39

25

49

41

353331

2321191715131197531

4345

1311

75

15

29

3

39

23

4947

41

37353331

2725

211917

9

1

16

4

14

30

44

50

46

3634

24

48

424038

32

2826

222018

121086

2

GNDGND

PINSPARE

GNDGNDGNDGNDGNDGND

D

THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.

IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,

OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS

THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS

AC

IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.

2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE

OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.

EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

0 1 1 1 0 1 0

AVAILABLE ON MOST PAIRS OF EARBUDS

THE ACCESSORY DETECTION IC IS MULTIPURPOSE. IT ALLOWS

IT ALSO PROVIDES ACCESS TO THE BUTTONS (VOLUME UP, DOWN ETC)

STANDARD OF TRRS AUDIO JACK (OMTP, CTIA, AHJ)

FOR THE DETECTION OF INSERTION AND REMOVAL EVENTS FOR ANY

INFORMATION REGARDING TRRS STANDARDS CAN BE FOUND AT:https://en.wikipedia.org/wiki/Phone_connector_(audio)

50 OHMS TRACE

0X3A

60MA @ 3V3

VIH_MIN = 1.20V

0 1 1 1 0 1 1

VDD = 3.30V

40UA @ 3V3

SCL, SDAVDD = 3.30V

VIL_MAX = 0.40V

0X3B

VIL_MAX = 1.32VVIH_MIN = 2.145V

DET_TRIGGER_N

AUDIO CODEC & AUDIO DETECTION ACCESSORY

3 15

CR-6 : @\02_039799A_LIB\.\02_039799A_TOP\(SCH_1):PAGE6

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

0.1UF

0.1UF

0.1UF 0.1UF

0.1UF

34.8

K

34.8

K

330K

34.8

K

1K

1K

49.9

10UF

4VAC/5.5VDC

4VAC/5.5VDC

4VAC/5.5VDC

4VAC/5.5VDC

4VAC/5.5VDC

C0805L

10UF

10UF 10UF

10UF

2K

47UFADAU1761BCPZ

47UF

15

U.FL-R-SMT-1(01)

4.7K

TS3A227ERVAR

0.047UF

SJ-43515TS-SMT-TR

1515

4.7K

15

180NH

BSS138TA

10UF

C81

C80

C3 C6

C51

R116

R7

R123

R8

R67

R68

R70

V13

V11

V12

V10

V9

C7

C1

C2 C4

C5

C189

C188

R154

ANTENN

R115

U5

Q11

R157

R156R155

C74

P5

U3

L12

R105

C102

R74

MIC_BIAS

AUD_LRCLKAUD_BCLK

AUD_SDATA_IN

TIP

RING2SLEEVE

+3V3 RING1

+3V3AUD_CM

+1V8

TS3A227_INT_N

DET_TRIGGER_N

RING2

+1V8

RING2

+3V3

SCL

MICPSDASCL

+3V3

AUD_CM

SDAAUD_SDATA_OUT

MIC_BIAS

AUD_MCLK

TIP

SLEEVE

SLEEVE

MIC_PRESENT_N

RING1

TIP

+3V3

+3V3MICP

2

21

121

2121

16

2119

531

PAD1311

15

23

1

5

24

16

27

1720

28

1

18

4

8 23

3

4

6

14

7

14

26

25

1210

8

9

3032

3

2

29

13

1110

9 22

PAD

721

3

52

15

12

14

6 GND

GND GND

GND

G

S

D

GND

GND

PAD

MIC_PRESENT_N DET_TRIGGER_NTIP

INT_

N

RING2

GND

A

SLEEVE

SCL

SLEE

VE_S

ENSE

RING

2_SE

NSE

MICP

GND

_SEN

SE

VDD

SDA

GND

GND

GND

GNDGND

GNDGND

GND GND

GND GND

GND

GND

GND

GND

GND

PAD

SCL/CCLK

SDA/COUT

ADDR1/CDATALRCLK/GPIO3

BCLK/GPIO2

DAC_SDATA/GPIO0

ADC_SDATA/GPIO1

DGND

DVDD

OUT

MONOOUTLHP

RHP

LOUTPLOUTN

ROUTNROUTPRAUX

RINNRINPLINNLINP

AGND

AVDD

CM

LAUX

MICBIAS

JACKDET/MICIN

ADDR0/CLATCH_N

MCLK

IOVD

D

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

FRUUSB OTG EEPROM

2MA @ 3V3

0 1 0 1 1 1 10X2F

MICRO SD CARD

1 0 1 0 A2 A1 A00X50

1.565VRATIO0.130

1.53VRATIO0.306

1.53V0.306RATIO

0.5

0.306RATIO1.53V

2 A TRACE90 OHMS DIFFERENTIALTHESE SIGNALS SHOULD

BE 90 OHM DIFFERENTIALTHESE SIGNALS SHOULD

PUSH PUSH

RATIO1.65V

1.53VRATIO0.306

VOLTAGE MONITORING

4 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

CHASSIS

CHASSIS

0.1UF

0.1UF0.1UF

10K 10K

DNI10K 10K

DNI

10K 10K

DNI10K

DNI10K

3K

20K

3K

6.8K

3K 3K

6.8K

4.02K

4.02K

3K

6.8K6.8K

20K

1K

AT24C32E-SSHM

5VDC 5VDC5VDC 5VDC

4.7K

12VD

C

12VD

C

12VD

C

12VD

C

12VD

C

12VD

C

12VD

C

C0805L

10UF 10UF

4.7UF

47589-0001

0.75A

ADP198ACBZ-11

90OHMS AT 100MEGHZ

47309-3751

AD7291BCPZ

4.7K

2.2UF 2.2UFDNI

100UF

C128

C114 C156

R166 R168

R165 R167

R203 R206

R202 R205

R2

R1

R191

R190

R6 R98

R97

R195

R194

R103

R99R5

R71

R4

C12

D10

R24

V4V1 V2 V3 V5 V6 V7

C13

C155

P19

U14

L11V17V16V14 V15D9

F1

M1

U7

U6R31

C142 C112C94

+5V_EXT

VMON_+5V_EXT

+5V +3V3

VMON_+5V_POE

+5V_BATT

VMON_+3V3_PCB

+3V3

+3V3

SD1_B_CDNSD1_B_DAT1

VMON_12V_RFCARDVMON_+5V_POE

VMON_+5V_BATTVMON_+5V_EXT

USB_OTG_PUSB_OTG_N

SCL

+5V_POE

USB_OTG_ID

+5V

VMON_+5V_PCBVMON_+3V3_PCB+1V8

+3V3

USB_VBUS_OTG

USB_OTG_SW_EN

+1V8 +3V3

SD1_B_CMDSD1_B_DAT3SD1_B_DAT2

SD1_B_CLK

SD1_B_DAT0

VMON_+5V_BATT

VMON_+5V_PCBVMON_12V_RFCARDSDA

+12V

+3V3

+3V3

SDASCL

6A

10

18

21

4

987

5

3

A1B1

1

B23

2

CC

A

A2

4

G4G3

G18

G2

765

321

4

8

PAD 69

7

14

12

15

11

54321

2019

16

17

13

8

567

4

321

GND

VCCWP

GND

A2A1A0

SCLSDA

PAD GND1GND

VDD VREF

SDA

ALERT

DCAP

SCLAS1AS0

VIN7VIN6VIN5VIN4VIN3VIN2VIN1VIN0

VDRIVE

PD_N/RST_N

GNDGND

DETPOL

DAT1DAT0VSSCLKVDDCMDCD/DAT3DATA2

PINSSHIELD

GND

GND

GND

GND

GNDGNDGND

GNDGNDGNDGNDGNDGNDGND

GNDGNDGNDGND

GND

GND GNDGND

GND

GND GND

GND GND

GNDGND GND

GND GND

GND GND

ENGND

VOUTVIN

GNDGND

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

FAN

FAN CONNECTOR PN

MC25060V1-000U-A99SUNON PN

0510650200

CABLE PN

61082-041402LF

MATING CONNECTOR

RF CARD CONNECTOR

FFSD-05-D-04.00-01-N

JTAG

5 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

61083-041402LF

3220-10-0100-00

10K

BSS138TA

1K

53253-0270

P10

P3P3

P7

R73

Q14

R170

DS7

CFG_DONE

+5V+3V3

SCL

+12VRF_GPIO2_BANK34RF_GPIO1_BANK34RF_GPIO0_BANK34+1V8

AD9361_AUXDAC2AD9361_AUXDAC1AD9361_AUXADC

AD9361_GPO3AD9361_GPO2AD9361_GPO1AD9361_GPO0

+12VRF_GPIO5_BANK34RF_GPIO4_BANK34RF_GPIO3_BANK34

+1V8

AD9361_GPO_VDDSDA

AD9361_CLK

+5V+3V3

JTAG_TCKJTAG_TMS

+1V8JTAG_TDIJTAG_TDO

SOM_RXDSOM_TXD +5V

2

16

12

38

3432

2422

14

10864

36

26

20

2830

40

1817

33

3735

23

1513119

531

7

31

25

21

2729

39

19

1

53

79

2

10

468

2

1

3

C

A

21

GND GND

GND

GND

GND

G

S

D

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

LEVEL TRANSLATOR

150MA MAX

GPS

MIO15_500MIO14_500

REFERENCED TO VCCA

A TO B WHEN T_RX_N = 1B TO A WHEN T_RX_N = 0

50 OHMS TRACE50 OHMS TRACE

3.3V BIAS FOR ACTIVE ANTENNA

6 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

1UF

DNI

1UF

DNI

0.1UF

0.1UF

0.1UF

10UF(C0805_0603_TH200LD25)

U.FL-R-SMT-1(01)U.FL-R-SMT-1(01)

10

47NH

FXL2TD245L10X

0

10K

L76-M33

SI2333DDS-T1-GE3

E025693

C36 C37

C60

C56

C58

C57

GPSPPS

GPS_IN

R58

Q3

R66

U17

L4

M2

R113

Q17

GPS_RXD1_3V3

GPS_RXD1_1V8

+3V3

+1V8+3V3

GPS_TXD1_3V3

GPS_RXD1_3V3GPS_TXD1_1V8

GPS_TXD1_3V3

VCC_RF

GPS_STANDBY

GPS_ANTON

+3V3

GPS_RESETGPS_ANTONGPS_PPS

GPS_FORCE_ON

VCC_RF

2

1

353

11

16 15 7 10 112

3

1

2

4

3

132

14 8

18

6

10

9

8

7

5

4

3

2

1

6

17

1

9

2

GND

OUT

GND

IN

GND GND

FORCE_ONRE

SERV

EDRE

SERV

EDNC

VCC_

RF

ANTON

GND

RF_IN

GND

RESET

VCC

NCV_

BCKP

STANDBY

1PPS

RXD1TXD1

GND

GND

GND

GNDGND

GND

GND

GND

VCCB

B0

B1

OE_N

T/R1GND

T/R0

A1

A0

VCCA

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

SWITCH PN : TSWB-3N-CB222CABLE PN : FFSD-05-D-04.00-01-N

REAL TIME CLOCKI2C ADDRESS TRANSLATOR

CABLE PN : FFSD-05-D-04.00-01-NIMU PN : ADIS16460

CONNECTOR PN : 52745-2033OLED PN : NHD-1.69-160128UGC3-AN

CABLE PN : 0152660209 : 76.20 MMCABLE PN : 0150200207 : 50.80 MM

CABLE PN : 0152660211 : 101.6 MM

+1V8 ACCESSORYIMU

NAV_SWITCH_S1NAV_SWITCH_S2NAV_SWITCH_S3NAV_SWITCH_S4NAV_SWITCH_S5

NAV_SWITCH_BNAV_SWITCH_A

55MA MAX

OLED+3V3 ACCESSORYNAV SWITCH

OUTPUT ADDRESS = 0X68 = 110 1000TRANSLATION BYE = 000 0001INPUT ADDRESS = 0X69 = 110 1001

7 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

4.7K4.7K

102K

976K

0.1U

F

0.1UF

0.1UF

0.1UF

4.7K

4.7K

4.7K

10UF

10UF

10UF

52745-2033

3220-10-0100-00

BSS138TA

SN74AHC1G32DCKTG4

DS3232MZ+

3220-10-0100-00

LTC4316IDD#PBF

SN74AHC1G32DCKTG4

R144R143

R122

R121

C187

C72

C185C113

R159

R17

R15

C132C186

C73

P11 P6

P8

Q4

U23

U23

U4

P11

U21

+5V

NAV_SWITCH_S3IMU_SYNCIMU_DOUTNAV_SWITCH_B

NAV_SWITCH_A

NAV_SWITCH_S5NAV_SWITCH_S4

NAV_SWITCH_S1

+1V8

+3V3 OLED_CS#OLED_/RES

OLED_SDI

+3V3

OLED_D/C

SWITCH PIN 1

INT_N

+1V8

TIMER_INT INT_N

+3V3

SDA+3V3

+3V3 +3V3

NAV_SWITCH_S2

+3V3

OLED_SCL

IMU_DINIMU_RST_NIMU_CS_N

IMU_DRIMU_SCLK

SCL_RTCSDA_RTCSCL

V_ALWAYS_ONSCL_RTCSDA_RTC

V_ALWAYS_ON

9

1

53

7 8

2

64

10 9

1

753

10

46

2

17

13121110

1516

G2G1

201918

14

987654

21

3

3

5

421

7

5

8 13

6 4

2

8

VCCGND

G

S D

GND

GND

GND

GND

EPAD

SCLIN SCLOUT

SDAOUTSDAIN

READYENABLE

VCC

XORLXORH

GND

GND

GND

GND

SCLSDAVBAT

GNDRST_N

INT_N/SQW

VCC32KHZ

GND

GND

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

POWER OVER ETHERNETREQUIRES TYPE 2 PSE (POWER SOURCING EQUIPMENT)

10.3A

8 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

0

100K

100K

14K

383K

10K

20

27.4K3K

0

100

38.3

K

0

CHASSIS

LTC4269IDKD-1#PBF

2200PF

10UF

22PF

MMBT5401

PA2369NLT

10

2.2U

F

0.03

3

0.001UF

160NH

2200PF

DNI

CDSOT236-0504C

FDS2582

22PF

150

1500

PF

15

120OHMDNI

12K

18K

FDS8880

47

3300

PF

PE-68386NL0.01

UF

1.21

K

100K

5.1

30.9

CDSOT236-0504C

B0540W-7-F

BAS21LT1G

47UF

0.001UF

10UH

330UF DNI

0.1U

F

0.1UF

0.1UF

0.1UF

0.1UF

22UFDNI

SMAJ

58A

0.1U

F

22UF

1UF

1UF

1UF

0.03

3UF

33PF

0826-1X1T-GH-F

100UF

100UF22UF

R47

R137

R36

R26

R25

R46

R39

R38R37

R42

R43

R34

R110

+5V_POE GND

Q6

U1

C11

Q22

D3

M3

E3

C22

T2

D17

D16

L3

C143

C9

D12

D13

Q5

R11

R45

D8

R32

R33

R35

R111

R112

C29

C17

D2

Q7Q10

R40

C26

T1

C18

L2

D6

D1

R44

R28

D11

C28

C25

C131

C10C53

C15

C21

C20

C24

C23

C30 C31

D14 C8

R109

D4C35

C19

C27

C33

C16

C14

C34

C32

D5 D7

ETH0_MD1_P

+1V8

ETH0_MD3_P

ETH0_MD2_N

VC1

+1V8

+3V3

+3V3

VC4

VC2VC1

VC3

LTC4269_UVLO

VC3

LTC4269_T2P_N

VPORTP

ETH0_MD4_NETH0_MD4_P

ETH0_MD3_N

ETH0_MD2_P

ETH0_PHY_LED0

LTC4269_UVLO

ETH0_PHY_LED1

+5V_POE

VC4VC2

ETH0_MD1_N

NP

7

63

PN

31

241029

3

C

1618

32

10

14

16

9

13

4

56

9

17

20

21

2

3

5

6

2

3

1

4

6

1

4

1 3

17

18

19

SH1SH2

12

6

1

7

11

104

53

28

15

21

3 46

5

21

46

5

C

A

1

1

5 6 7 8

1

2

14112327 15 12 22 2 28

2

2

1

2

13PA

D 8 2526

3

30

7

20

13

1

PN

A

19

3

9

EPAD

VPORTP

NC

PWRGD_NPWRGD

NCVNEG

VNEG

NC

PG

PGDL

Y

RCM

PCC

MP

SENSE+

SENSE-UVLO

VCM

P

FB

OSC

SFST

SYNC

ENDL

YTO

N

VCC

SG

NCNC

VPORTNVPORTN

NC

RCLASS

T2P_

N

SHDN

S

G

D

GND

GND

GND

GND

4X75 OHMS

RJ45

1000pF 2kV

100V4 X 22nF

1CT:1CT

1CT:1CT

1CT:1CT

1CT:1CT

TRP4-

TRP4+

TRP3-

TRP3+

TRP2-

TRP2+

TRP1-

TRP1+

VC4VC3VC2VC1

SHIELD SHIELD

TRCT1

TRD4-

TRD1+

TRD2+TRD1-

TRD2-TRD3+

TRD4+TRD3-

TRCT4

TRCT2

TRCT3

DGND

S

G D

DGND

DGND

DGND

DGND

DGNDDGND

DGND

DGND

GND

GND

DGND GND

GND

GND

GND

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

PLACE CLOSE TO PIN

RFBB

RFBT

PLACE NEAR PIN 2

PLACE CLOSE TO PIN

5.5MM OD

GENERATING 5V FROM EXTERNAL SOURCE8V-24V25W

2.0MM IDDC BARREL JACK

9 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

820PF

3.6K

0.01UF

1UF

100PF

KLDX-0202-A-LT

0.0061.0UH

BSC042NE7NS3GATMA1

2.2UF

BSC042NE7NS3GATMA1

2.2UF

220UF

0.009

BSZ123N08NS3G

33UF2.2UF

22UF

2.2UF

10UF10UF

2.2UF33UF

0.006

2.2

LTC3899EUHF#PBF

BSZ123N08NS3G

4.7UF

1000PF

100UF

4.7UH

DNI

2.2UF 10UF

1000PF

1000PF

15K

1500PF

10UF

68.1K

357K

00

0

DNI

0

00

00

0DNI

0

10KDNI

DNI

10K

10K

DNI

0

100

0

100

0

0.1UF

0.1UF0.1UF

0.1UF

0.1UF

0.1UF

C43

R50

C44

C42

GND_4+V_EXT

C125

C154

C121

+5V_EXT

C115

L10

C161

C104C98 C105 C129R78

Q18

Q19

R52

R22

U2

Q8

Q9

P4

C96

C159

C160C135

C50

C92

C49

C48

R51

C124

C126

R53L1

C162

R49

R48

R133R134

R138

R135

R90R86

R92R88

R132

R77

R41

R12

R18

R65

R57

R55

R56

R54

C110

C39C38

C40

C111

C97

C41

LTC3899_INTVCC

+V_EXTERNAL

LTC3899_BST_1

LTC3899_FB_1

LTC3899_ITH_1

LTC3899_VBIAS

LTC3899_FB_1LTC3899_ITH_3

LTC3899_ITH_1LTC3899_BG_3

LTC3899_BG_1LTC3899_TG_1

LTC3899_VBIAS

LTC3899_BST_3

LTC3899_BG_3

+V_EXTERNAL

LTC3899_SENSE_1_N

LTC3899_VBIAS

LTC3899_BST_1

LTC3899_BG_1

LTC3899_SW_1 +5V_EXT

LTC3899_ITH_3

LTC3899_VBIAS

LTC3899_SENSE_3_P

LTC3899_VBIAS

LTC3899_SW_1

LTC3899_INTVCC

LTC3899_TG_3

LTC3899_SENSE_3_P

LTC3899_SENSE_3_N

LTC3899_SW_3

LTC3899_VBIAS

LTC3899_SENSE_1_P

+5V_EXT

LTC3899_SENSE_1_P

LTC3899_SENSE_3_N LTC3899_INTVCC

LTC3899_TG_1

+5V_EXT

LTC3899_SW_3LTC3899_BST_3

LTC3899_TG_3LTC3899_SENSE_1_N

67

P5 N

7

5

1

22 24823

19

3461436

1733

27

18

32

28

31

3

54

1213

3837

11109

2

71535

PAD

116

26

20

30

25

21

29

321 8

765

321 8

765

2

NP

321 8

32

8

6

13

PN

GND

GND

GND

GND GND GND

GND

GND

GND

GNDGND

GND

GND GNDGND GNDGNDGND

GND

GND

S

G D

S

G D

GND

GNDGND

GND

GND

GND

GND

GND

GND

GND

SENSE1-SENSE1+

VFB1

ITH1

VPRG3TRACK/SS1

TG1SW1BOOST1

BG1

SW3

TG3

BOOST3

BG3

VBIA

S

EXTV

CCDR

VCC

BG2BOOST2SW2

TG2

TRACK/SS2

DRVSET

ITH2

VFB2

SENSE2+SENSE2-

RUN3RUN2RUN1

INTV

CC

ITH3

VFB3

SENSE3-SENSE3+

SS3

PLLIN/MODE

FREQ

S

G D

S

G D

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

5A MAX

1 1 0 0 1 0 0

FSW = 600KHZ

0X64

| POE | EXT | SYSTEM | BATTERY | BATTERY | POWER || | | STATE | SWITCHER | CHARGER | SOURCE |

| OFF | ON | OFF | OFF | ON | EXT || OFF | ON | ON | ON | ON | EXT || ON | OFF | OFF | OFF | ON | POE || ON | OFF | ON | ON | ON | POE || OFF | OFF | ON | ON | OFF | BATTERY || OFF | OFF | OFF | OFF | OFF | NONE |---------------------------------------------------------

TSS = 2048 = 3.4MS0.6MHZ

| ON | ON | ON | ON | ON | POE |

I2C LVL TRANSLATOR GENERATING 5V FROM V_BATT

51065-0300BATTERY CONNECTOR

10 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

680PF0.018UF

220UF220UF22UF

13.3K

220UF

DMG6968U-7

TCA9517DGKR

1UF 1UF

1UF

0.1UF 0.1UF

DNI

ADP1621ARMZLTC1981ES5#PBF

CSD16323Q3

0.0150.015

1UH1UH

34.8K

2.43K

4.7K

DNI4.7K

DNI

10K

0

0

0

22UF

MBRB30H60CTT4G

412

0.015

0.1UF

0.02

10UF

4.7K

41.2K

220UF

LTC2942IDCB#PBF

53254-0370

C68C52

C67 C91C69

+5V_BATT GND_3

+V_BATT

C93C103C1

82

C147

C184

C174

C183

U24

D26Q21

U22 A1

R128

L6

R127

Q15

R79

R106

R152

R150

R80

R129

R131

R81

R84

R104

R126

C70

L7

C71

U9

R142

C107

R141

R145

BATPLG

+5V_BATT_COMP

SCL_VBATTSDA_VBATT

+V_BATT

SCLSDA

SDA_VBATTSDA

+3V3

+V_BATT

+5V_BATT_FREQ

+5V_BATT_CS

+5V_BATT_CS +5V_BATT_GATE

+5V_BATT_COMP

+5V_BATT

SCL_VBATTCC_AL

V_ALWAYS_ON

SDA_VBATT

+3V3

+5V_BATT_FB+5V_BATT_FREQ

+5V_BATT_FB

SCL SCL_VBATT

+V_BATT

SYSTEM_ENABLE

BATT_THERM

5

NPP

5

3

PAD

423

6

3

1

2

N

7

8

2

1

6

4

41

3

5

3 4

4

6 2

5 7

1

108

3

9

5

7

16

8

2

4

PN

1

23

1

GNDGND

GND

S

G D

IN

CS

PIN

GATE

PGND

FREQFB

COMP

GND

SDSN

GND

GND

GND

PAD

SENSE-AL_N/CCSDA SCL

GNDSENSE+

GND GND

GND

VCCB

SCLBSDAB

ENGND

SDAASCLA

VCCA

GND

SG

D

GND

GND

VCCGATESHDN_N

GNDGDR

GND

GND

GND

GND GNDGND

GND

GND

GND

GND

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

0X140 0 0 0 1 0 0

LOW = 100MAHIGH = 500MA

VINH_MIN = 1.2VVINH_MIN = 1.2VVINH_MIN = 1.2V

DIG_IO2 = ENABLE

HIGH = CHARGING ENABLED

HIGH = LDO/CHARGER DISABLED

ILIM = (500 / RLIM)3.93A = (500 / 125)

DIODE OR

PLACE ONE CAP NEAR OUT 2PLACE ONE CAP NEAR OUT 1

LOW = CHARGING DISABLED

LOW = NORMAL OPERATION

DIG_IO3 = ENABLE CHARGING

BATTERY CHARGING IC

DIG_IO1 = SETS CURRENT LIMIT

CLOCK OSCILLATOR = 3MHZ

LI-ION BATTERY CHARGING

2.00A = (500 / 250)

11 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

0.01UF

10UF

250

250

10UF

LTC4415EMSE#PBF

DNI

ADP5061ACBZ-4

47UF

22UF

10UF

DNI1K

10K

10K

100K

2K

23.2K

DNI

0DNI

0

0

DNI

10K

10UF

C90

DS1

C148

R125

R124

C151

C152

U16

U11

C99

C101SYS_EN

C146

R130

R13

R10

R117

R118

R119

R29

R93

R94

R9

ADP5061_IO1

+V_BATTSDASCL

LTC4415_EN2_N

BATTERY CHARGER INPUT VOLTAGE

+V_BATT

ADP5061_IO3

ADP5061_IO2

BATTERY CHARGER INPUT VOLTAGEADP5061_SYS_EN

LTC4415_EN1

BATT_THERM

LTC4415_EN1

+5V_EXT

+5V_POE

+5V_POE

LTC4415_EN2_N

BATTERY CHARGER INPUT VOLTAGE

B1

C A

B4B2

10

4

5

3

6

12

78

15

9

14

11

PAD

C2

C4

E3

E1

D3

B3

A4A3

C3

E2

C1

E4

D4D1

A1A2

D2

12

1316

GND

GND

GND

GND

GND

GND

GND

PAD

OUT2OUT2

STAT2_NWARN2_N

WARN1_NSTAT1_N

OUT1OUT1

IN2IN2

EN2_N

CLIM2

CLIM1

EN1IN1IN1

GND

GND

GND

CBP

BAT_SNS

VIN1 ISO_S1

ISO_B1

DIG_IO1

VIN2 ISO_S2

ISO_B2

DIG_IO2

VIN3 ISO_S3

ISO_B3

DIG_IO3THR

AGND

SCLSDA

SYS_ENILED

GND

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

SWITCH PIN 2BLUE ANODE

GREEN ANODECOMMON CATHODE

ON / OFF PUSH BUTTON CONTROLLER CIRCUIT

THIS CREATES A VOLTAGE RAIL WHICH IS ALWAYS ON.

VON_MAX = 0.76V TO 0.84V

2.75V TO 3.78V

FFSD-03-S-02.00-01

PV0H240SS-331SWITCH PN

RED ANODESWITCH PIN 1

CONNECTOR FOR PUSH BUTTON SWITCH

HIGH SIDE SWITCHES FOR RED, GREEN AND BLUE LEDS

CABLE PN

POWER SWITCH AND PUSH BUTTON CONTROLLER

3 SECONDS5.2 SECONDS PER UF

12 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

0.1UF

1UF 1UF

FXL2TD245L10X

0.1UF

182K

470

0.001UF1UF

140K

1MEG

330

330

330

1MEG

0

0.1UF

FTSH-103-01-F-D

ADP190ACBZ

ADP190ACBZ

TPS22933ARSER

10UF

LTC2955IDDB-1#PBF

ADP190ACBZ

0.56UF

R96

C168

C133

C167

C179

R83

R19

R120

C84

C169

R114

R14

R21

R16

R153

C166

C178

U18

U19

U20

P9

U27

U8

U13

C83

V_ALWAYS_ONSOM2C_KILL_N_5V0

C2SOM_KILL_N

V_ALWAYS_ON

+V_BATT+5V_EXT

+3V3SOM2C_KILL_N_5V0

V_ALWAYS_ON

LTC2955_ON

V_ALWAYS_ON

SWITCH_LED_G

+1V8

SOM2C_KILL_N_1V8

+3V3

GREEN ANODE

+3V3

SWITCH_LED_B

RED ANODE

SWITCH PIN 1

BLUE ANODE

V_ALWAYS_ON

+5V_POE

+1V8

SYSTEM_ENABLE

V_ALWAYS_ON

+1V8

LTC2955_ON

SWITCH_LED_R

6

9

4

21

2

4

321

54

6

7

86

1

3

4

5

9

10

3

53

8

5

1

6

7

2

710

8

PAD

GND

GND

GND

VCCB

B0

B1

OE_N

T/R1GND

T/R0

A1

A0

VCCA

GND

GND

ENGND

VOUTVIN

ENGND

VOUTVIN

GND

GND

ENGND

VOUTVIN

GND

GND

GND GND GND

LOUTVOUT

CAPEN

GND

DC_INUSBBAT

GNDGND

PAD

ON

KILL_NTMR

SEL

GND

PB_NVIN

ENPGD

INT_N

GND

GND GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

EN THRSH V = 1.4V

POWER SOURCE SELECTION

PIN 2 TO PIN 7/8 OF Q24, Q25,Q1 TRY TO PLACE THESE ACROSS THE

5A

BEFORE YOU CAN TURN THE SYSTEM ON A SECOND TIME.WHERE YOU HAVE TO WAIT FOR THE VOLTAGE TO DISSIPATE

ON SHUTDOWN. IT REMOVES A BROWN OUT ISSUETHIS TRANSISTOR HELPS TO DISCHARGE +5V_PCB

13 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

0.1UF

4.53K

0.1UF

0.1UF

16.9K

5.49K

DNI

SI4931DY-T1-E3

SI4931DY-T1-E34.53K4.53K

0.1UF0.1UF0.1UF0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0

1MEG 1MEG1MEG

5.49K5.49K

24.3K

16.9K16.9K

24.3K 24.3K

DNI

330U

F

330U

F

100UF

330U

F

330U

F

330U

F

100UF

0

100UF 100UF

SI4931DY-T1-E3

SI4931DY-T1-E3

100UF

DNI

100UF 100UF

DNI

0

0

DNI

SI2329DS-T1-GE3

33

LTC4417HGN#PBF

1UF 1UF 1UF

SI4931DY-T1-E3

100UF

SI4931DY-T1-E3

C141

R59

C140

R64R61

R62

C46

R63

C150C138C134

C139C158

C157

C47

C153

C45

R69

R101 R102R100

R89R87

R95

R60

R107 R108

R91

C175

C95

C64C100 C181

R149R148R147

C66 C106

Q25Q25

Q24 Q24

Q1

C171 C172 C177C176

C149

R151

Q2

U10

C163 C164 C165

Q1

C65

+5V GND_6

UV1

+5V_POE +5V_EXT +5V_BATT

UV3

PSS_VALID2_N

+5V_BATT

+5V

+5V_POE +5V_EXT

OV2

VS2

GATE3

GATE2

GATE2

GATE1VS1

GATE1

+5V_BATT

OV1

UV3

OV2

+5V_POE

GATE3

OV3SYSTEM_ENABLE

UV1 GATE1

+1V8

PSS_VALID3_N

PSS_VALID1_N

+5V

+5V_EXT

OV3

GATE2

+5V

GATE3+5V_EXTUV2

OV1

UV2

VS3

SYSTEM_ENABLE

+5V_BATT

VS1VS2VS3

+5V_POE

NP

NP

NP

NP

161820

NP

32

11

356

4 2

78

1

356

78

2

1

3

4

56

78

1

10227

12

236

9

244

21

5

1

8

1

3

2

1719

4

15

14

13

2

D

SG

D

SG

D

SG

D

SG

GND

D

SG

D

SG

GND GND GND

GND GND GND

GND

V1

V2

V3

VS1

G1

VS2

G2

VS3

G3

VOUT

CAS

GND

VALID3_NVALID2_NVALID1_N

OV3UV3

OV2UV2

OV1UV1

HYSSHDN_NEN

GND

GND

GND

GND GND GND

GND GND GND

GND

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

+3V3_PCB +1V8_PCB---->

POWER SEQUENCEPG_MODULE

|---->

VCCIO_EN

+5V_PCB+5V_EXT

3A3A

+5V_BATT /\---->/|||| /|/|

/||

VIN_HDR |||

CH2_TSS = (0.6*10NF)/(3.5UA)= 1.7MS

CH1_TSS = (0.6*82NF)/(3.5UA)= 14MS

+5V_POE

FSW = 500KHZ

14 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

82PF

30.1K820PF

C0805L

ADP2323ACPZ

121K

SI2304DDS-T1-GE3

0.1UFDNI

61.9

K

10UFC0805LC0805L

DNI

C0805L

10UF

DNI4.75K

0.1UF 0.1UF

DNI

0.1UF0.01

UF

33PF

SI2304DDS-T1-GE3

C0805LC0805L

47UF

0.06

8UF

100K

2.2UH

17.4

K34

.8K

13.7

K

1

4.75KDNI

3.3UH

10UF

10UF

DNI

10UF

10UF DNI

10UF

10UF

DNI

10UFC0805L

C0805L

C0805L

00

1UF

1UF

47UF 47UF

220PF

R30

R23C54

R27

C55

GND_2+1V8

Q16

C170

C137

U15

C87

C89

C88

C76 C78 C173

C63

+3V3 GND_1

L5

C62

R75

R76

R85

R3

Q13

C59

C117

L9

R866

R218 R220

C75

C136

C86

C144

C145

R215R221

C82

C85

C77 C79

C61

+1V8

+5V

+1V8_EN

SS2

+3V3_EN

+3V3_FB +1V8_FB

INTVCCVDRV

INTVCCSS1

+3V3_FB

DL2

INTVCC

+3V3_EN

PG_MODULEPG_MODULE

+3V3_COMP+1V8_COMP

DL1

+5V+1V8_FB

DL2

DL1

SW2 VDRVVCCIO_EN

SW2SW1

+1V8

SS1

+3V3

+1V8_EN+3V3VDRV

INTVCC

SS2

+3V3

BST2BST1

BST2

SW1

BST1

INTVCC

+1V8_COMP

+3V3_COMP

11

26

12

10

214

2

1

3

29

13

2

21

3

NP

20

3

17162524

30

6151427

81

75 9

32

PAD

28

1922

31

1823

GNDGND

GND

GND

GND

GND

GND

GND

GND

GND

GND

PGOOD2PGOOD1

EP

FB1

COMP1

SS1

TRK1

EN1

PVIN1

SW1

BST1 DL1

PGND

VDRV

DL2BST2

SW2

PVIN2

EN2

TRK2

SS2

COMP2

FB2MODE

RT

INTVCC

GND

SYNC

SCFG

GND

GNDGNDGND GND GND GND

GND GNDGNDGNDGND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

700MA

GENERATING 12V FOR RF CARD

VINH_MIN = 1.2V

TSS = 10NF * 1.23V = 2.2MS

FSW = 650KHZ

5.5UA

15 15

<DESIGN_VIEW>


1:1

E02_042967

N. WILSON

10PF

0.01UF

110NH

47UF

1UF

1UF 10UF10UF

4.7UH

ADP1614ACPZ

0.018UF

0

5.23K

0

0DNI

19.1K

165K

C120

C119

GND_5

L13

+12V

C122

C123

C118 C130C127

D27L8

U12

C116

R82

R20

R139

R140

R136

R72

+5V +12V

ADP1614_EN

12V_FB

12V_FB

A C

8

76

10

PAD54

2

3

1

9

GND

GND

GND

GND

PAD

SSCLRES/FREQ

VINSWSW

GNDGND

EN

FBCOMP

GND

GND

GND

GND

GND GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

pg1 - title page - analog devices...pg1 - title page pg4 - uart, microsd, adc, eeprom pg7 - nav...

Documents