pll100
TRANSCRIPT
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GROUP 4 PLL100-PLL0208/05/2014 1
University Of Technical
Education HCM City
ELECTRONIC COMUNICATION
PRACTICE
Subject:
Instructor : Dang Phuoc Hai TrangGroup : 4
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CHAPTER 1
PLL 100
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II. IC 565:- Frequency range:
0.001 Hz to 500 KHz.
- Voltage range: 6 Vto 12 V.
- Input level required
for tracking: 10mV
(rms) to 3V peak-to-
peak
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II. IC 565:
1 1
1.2( )
4
OUTf Hz
R C
12
3
2(2. )(3.6)(10 )( )
LC
ff
C
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PLL100
III. PROCEDURE:
2. Connect sine wave signal formexternal function generator at input
terminals. Connect CRO Channel-1
at input terminals. Keep amplitude at
10Vpp.
1. Connect Digital frequency counter
at the VCO O/P connector.
3. Connect CRO Channel-2 at VCO
output. Trigger CRO by channel-1.
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III. PROCEDURE:4. Now vary frequency of input
sinewave generator from 8KHz to 16
KHz. 9KHz 10KHz
11,5KHz
12KHz
13KHz
14KHz
15KHz
16KHz
http://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/9.JPGhttp://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/16.jpghttp://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/15.jpghttp://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/14.jpghttp://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/13.jpghttp://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/12.jpghttp://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/11.5khz.jpghttp://e/Bai%20vo/Bai%20hoc/DTTT/TT%20DTTT/Ttdttt/PLL%20100/10.jpg -
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III. PROCEDURE:5. Note down the instant frequency
when input and output signalslocked.This will be 12 KHz. Now vary
input frequency signal on both side of
12 KHz. The signals remain locked for
some range. Then signals becomeunlock. Note down these
frequencies.The difference between
these frequencies is capture range.
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III. PROCEDURE:
6. Also note that once signals arelocked, both signals remain locked
for some range. This is lock range.
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CHAPTER 2
PLL 02
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I. INTRODUCTION:This board has been designed with a view to
provide practical and experimental knowledge of
Frequency Synthesizer.
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I. INTRODUCTION:Phase/frequency
detector outputs
a signal that isproportional to
the difference
between the
frequency/phase
of two input
periodic signals.
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The low-pass
filter is use to
reduce the phasenoise and
enhance the
spectral purity of
the output.
I. INTRODUCTION:
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The voltage-
controlled
oscillator takesthe filtered
output of the
PFD and
generates anoutput frequency
which is
controlled by the
applied voltage.
I. INTRODUCTION:
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I. INTRODUCTION:
The dividerscales the output
frequency by a
factor of N.
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II. IC 4046 & 4017:IC 4046:
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IC 4017:
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III. PROCEDURE:1. Connect output of pulse generator
at input terminals.
2. Connect CRO Channel-1 at inputterminals. Also connect frequency
counter at these terminals.3. Connect CRO Channel-2 at output
terminals. Also connect another frequency
counter at these terminals.
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III. PROCEDURE:4. Connect 1KHz output of Pulse
generator to input of synthesizer
circuit by jumper link. Connectconnector wire between Keep
1KHz-9KHz socket to X1 position.
5. Observe input and output
waveforms on CRO. Also observe
input and output frequencies on
frequency counters.
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III. PROCEDURE:6. Both input and output frequencies
will be 1KHz frequency.
7. Now change position of jumper linto X2 position. The output
frequency will be double of input
frequency.
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III. PROCEDURE:8. Similarly observe other multiple
frequencies at output from 1KHz to
9KHz by changing jumper link switchposition to X3 to X9 positions.
- X3
- X4
- X5- X6
- X7
- X8
- X9
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