prototype environment for controller programming in the ... · controllers according to the iec...

UDC 004.41

Prototype environment for controllerprogramming in the lEe 61131-3 51 language 1

Dariusz Rzorica, Jan Sadolewski, and Bartosz Trybus

Rzeszow University of Technology, Division of Informatics and Control,ul. Wincentego Pola 2, 35-959 Rzeszow, Poland

{drzonca, js, btrybus}@prz-rzeszow.pl

Abstract. A prototype compiler of the ST language (Structured Text), itsoperation and internal structure is presented. The compiler is a principalpart of CPDev engineering environment for programming industrialcontrollers according to IEC 61131-3 standard. The CPDev is underdevelopment at Rzeszow University of Technology. The compilergenerates an universal executable code as final result. The code can beinterpreted on different platforms by target-specific virtual machines.Sample platforms include AVR, ARM, MCS-51, PC.

1. Introduction

The main goal of the IEC 61131-3 standard introduced in 1998 was toincrease quality of programmable controllers software [5]. By defining specialprogramming languages and procedures it frees designers from using generalpurpose languages like C, focusing instead on implementation of controlalgorithms.

This paper describes a prototype environment for programming industrialcontrollers according to the IEC 61131-3 standard. The environment, calledCPDev (Control Program Developer), is built around the Microsoft .NETFramework [8] using C# language. Its main component is the compiler whichtransforms programs written in ST, one of five IEC 61131-3 languages [5], toan universal executable code. ST is a high level language, similarly to Pascal,Ada and C. Among the other IEC languages, ST seems the most flexible, so itwas chosen as the base for CPDev. Specification of the executable code hasbeen prepared in such a way, that the resulting code can be executed ondifferent target platforms, so small microcontrollers or larger microprocessors,via target-specific virtual machines. Therefore the code is called universal.The machines operate as interpreters of this code. Generally speaking, theapproach resembles the concept of Java virtual machines designed forimplementation on different platforms [6]. The CPDev basic machine is writtenin industry standard C for easy adaptation for various C compilers.

1 This research has been supported by MNiSzW under the grant R02 058 03

Dariusz Rzorica, JanSadolewski, and Bartosz Trybus

2. lEe 61131-3 standard and ST language

The IEC 61131-3 standard defines five programming languages - LD, IL,F8D, ST and SFC. Instruction List IL and Structured Text ST are textlanguages, Ladder Diagram LD, Functional Block Diagram F8D andSequential Function Chart SFC are graphical. LD and IL are fairly simple, soappropriate mainly for small applications. F8D, ST and SFC arerecommended for medium- and large scale projects. John's and Tiegelkamp'sbook [12] is a good source to learn IEC programming. According to [9],familiarity with the languages by engineering staff looks as follows: LD 90%,F8D 60%, IL 35%, ST 30%, SFC 15%. Computer and control engineers withexperience in structural programming usually prefer ST.

Common components of the five languages are names (identifiers), datatypes, constants and variables. Twenty elementary data types of IEC 611313, together with memory sizes and ranges in the CPDev environment, areshown in Tab. 1. In practice BOOL, INT, REAL and TIME are the mostcommon. Examples of corresponding constants are FALSE, 13, -4.1415 andT#lm3s. The IEC standard defines three access levels to variables, namelyLOCAL, GLOBAL and ACCESS. LOCAL variables are available in the programor function block. GLOBALS can be used in the whole project, but programs orblocks must declare them as EXTERNAL. ACCESS variables exchange databetween different systems.

Table 1. Elementary data types of IEC61131-3, their size and range in the CPDevenvironment

Data typeSINTINTDINTLINTUSINTUINTUDINTULINTREALLREAL

Memory size and range18 (-128 .. 127)28 (-32768 .. 32767)48 (_231

•• 231 -1)88 (_263

.. 263- 1)

18 (0 .. 255)28 (0 .. 65536)48 (0 .. 232

- 1)88 (0 .. 264

- 1)48 IEEE-754 format88 IEEE-754 format

Data typeTIMEDATETIME OF DAYDATE AND TIMESTRINGBOOLBYTEWORDDWORDLWORD

Memory size48484888Variable length18 (0,1)18284888

Functions, function blocks and programs are components of the IECprojects. Function blocks, designed for multiple reuse in different parts of theprogram, are essential. Typical block involves input and output variables, andemploys values from previous executions. The IEC standard defines a smallset of standard blocks, such as flip-flops, edge detectors, timers andcounters. Four of them are shown in Fig. 1.

Of the five IEC languages, ST is particularly suitable for implementation ofnonstandard or complex algorithms. Most development systems recommend

134 ComSIS Vol.4, No.2, December 2007

Prototype environment for controller programming in the IEC 61131-3 ST language

ST as a default language for defining user function blocks. Therefore it hasbeen chosen as a base language for the CPDev environment.

BOOL-i 81 SR Q1f- BOOL

BOOL-J,---IR__~

81~~_Q1--,-'-I~_

R~~

fJTUBOOL CU Q~,BOOL

BOOL R I

INT ----, PV cv- INT

R_TRIG i

BOOL ----, CLK Q !-- BOOL

I

CLKJi '

Q Dc-I--'----!_

1 cykl

cu~Jlfu'UlrLHuL

Q'~R~l rL--'cv=o~

cv [~ t,

i TON !BOOL-IN Q~BOOL

TIME --' PT ETi TIME

IN~,-

Q~~ET~~_

Fig. 1. IEC 61131-3 standard blocks: SR flip-flop, rising edge detector R_TRIG, timerTON, counter CTU

Initial part of an ST program involves declarations of variables and blockinstances written between VAR and END_ VAR keywords. The declarations arefollowed by sequence of program instructions. The instructions containexpressions which involve operators such as: bracket, function call, negation,arithmetical operators, comparison, boolean operators (in descendingpriority). Similarly as in Pascal, the symbol : = denotes assignment. Anexample for starting or stopping an engine has the following form:

engine := (start OR engine) AND NOT stop AND NOT alarm;

Four types of control instructions are available in ST:

- conditional branches: IF, CASE,- loops: FOR, WHILE, REPEAT,- brake or stop: RETURN, EXIT, END,- function block call.

Example of the last one may look as follows. After declaring Timerl: TONas an instance of the TON block (Fig. 1), one can call it by

Timerl(IN:=enginel, PT:=t#2.5s);

Output Q of the timer can be assigned to a variable in the following way

engine2:=Timerl.Q;

Alternatively, both input and output parameters may be included in a singlecall, i.e.

Timerl(IN:=enginel, PT:=t#2.5s, Q=>engine2);

ComSIS Vol. 4, No.2, December 2007 135

Dariusz Rzorica, JanSadolewski, and Bartosz Trybus

3. The CPDev environment

Engineering environments are integrated tools for development, debugging,deployment and maintenance of control software. Structure of the CPDevenvironment is shown in Fig. 2. It involves separate logical and physicallayers what simplifies programming and compiling for different hardwareplatforms.

.,

ST source code

Logicallayer

/'

Compilation

Primitive instructionlist

Universal executablecode

Targetplatfonn

-,------~-

"/--r---------

/

1/0 interfacespecification

Physicallayer

Hardware resourceconfiguration

Hardwareresourceallocation map

Targetplatfonn

Fig. 2. Structure of the CPDev development system

ST compiler is an essential part of the logical layer. It translates STprograms into the universal executable code interpreted later by a virtualmachine on the target platform. The compiler employs ST language rules,function block libraries and a set of primitive instructions implemented in thevirtual machine. Single ST instruction is translated into one or severalprimitive instructions. Logical layer is also responsible for debugginginformation, deployment, simulation and list of errors.

Hardware resource configuration at the physical layer involvesspecifications of memory, inpuUoutput interfaces and communications. Thespecifications describe memory types and areas, inputs and outputs,addresses and types of communication channels, failure indicators, etc.Hardware allocation map (Fig. 2) is a table, which assigns symbolic namesfrom the ST program to physical addresses. By using it, the compiled codecan be assembled for a particular platform to create final, universalexecutable code. Hardware platforms differ only in hardware allocation mapswhile compiled code is identical (before assigning addresses).

136 ComSIS Vol. 4, No.2, December 2007


jlit._ I5'X

(* p.czycisk START ")

('" p.rzycisk STOP o<-)

(* wyjscie o *)

(,of li-'}'jscie 1 +j

(* 'li-'yjscie "'/(* uyjscie 3

c» JBsli akt:.......-ne 'wyjscie aUTO *)

(* jesli n.i e uplynql zadany CZdS *)

(* to kontynuuJ oczez e.r z enz e(* w p.rzeciwn}'m W'Ypadkll *j

: BUOL;

: BOOL;

: BOUL;

: BDOL;

: BOOL;

: BOOL;

Licznik: INT := ,vybor <3:kt:vw.nego wyjscia *)

caee r TDIE := oczeue.ez eez e cz as zz +)

IF c eee < THEN

caae ;= c eee +

OUTO :"" !START OR aUTO) AND NOT STOP; (* stan wyjscia I1kl:l.du

('" Proqxdm zieecz - START-STOP i "w~.jJ:uJqca" JedynKa ..)

VAR_GLOBAL

STA.RT AT

STOP AT

aUTO AT

OUTi AT

OUT2 ATotrrs AT

D,OU~ PRG!

EHi1~ Globalvariables

....'R

.. STOP

"QUTO.oun"OUT2

""OUT3B~Tasl<s

1-. DEF_TASKa~Librarjes

stVI IEC_61131[±i-G (TO

~-'rt. CTU:E ('J: OS:E('J:SR

Fig. 3. User interface of the CPDev system

Three basic windows of the CPDev user interface are shown in Fig. 3 [11].They involve:

- trees of project structure, hardware configuration and program resources left part, interchangeable,program in ST language - center,

- message list - bottom.

The windows can be moved across the screen or minimized, framesadjusted and the contents scrolled. Window of the StarlStop project (Fig. 3)contains the program PRGI which consists of CTD, CTU, RS, SR functionblocks and the main task DEF_TASK. The main program involves globalvariables START, STOP to OUT3 with addresses %MXOOOO, %MXOOOI up to%MXOOOF, respectively (directly represented variables). According to IEC61131-3, the %MX prefix indicates a variable stored in memory (M) andoccupying a single bit (x), The first instruction of the program activates outputaUTO, similarly as control of the engine in Sec. 2. Next, if aUTO is on, theoutputs OUTl, OUT2 and OUT3 are activated every 2s. The PRGI program isexecuted every 200ms.

Hardware configuration tree, which would replace the project structure (leftwindow) represents hardware of the controller (inputs/outputs, communicationmodules etc.), or a group of controllers if a distributed system is designed.Program resource tree contains lists of global and system variables, linked


Dariusz Rzonca, Jan Sadolewski, and Bartosz Trybus

libraries and list of user-defined variable types (arrays, structures, etc.).TASK_CYCLE and TIME_COUNT are system variables.

In practice a typical ST program is a sequence of function block calls,where outputs from the previous block become inputs to the next one. Twolibraries are available for the user in the CPOev system, i.e.:

- IEC 61131-3 standard blocks (Sec. 2 and Fig. 1),- general purpose blocks (flip-flops, signal processing, on/off control, PIO,

set point generator, positioner, drive control, sequencer and some others).

Table 2. Programs afTON, SR and R_TRIG standard function blocks

Function block: TON

FUNCTION BLOCK TONVAR

stime: TIME;END VARVAR-INPUT

IN: BOOL;PT: TIME;

END VARVAR-OUTPUT

-Q: BOOL;ET: TIME;

END VAR

IF NOT IN THENQ := FALSE;ET := t#Oms;stime := CUR_TIME();

ELSEIF NOT Q THEN

ET : = CUR_TIME ()- stime;

IF ET >= PT THENQ := TRUE;ET := PT;

END IFEND IF

END IFEND-FUNCTION BLOCK

Function blocks: SR, R TRIG

FUNCTION BLOCK SRVAR INPUTSl~ BOOL;R: BOOL;

END VARVAR OUTPUTQ1~ BOOL;

END VARQ1 :~ Sl OR (NOT R AND

Q1) ;END FUNCTION BLOCK

FUNCTION BLOCK R TRIGVAR INPUT

CLK: BOOL;END VARVAR OUTPUT

Q:-BOOL;END VARVAR

CLKp: BOOL := FALSE;END VAR

Q : = CLK AND NOT CLKp;CLKp := CLK;END FUNCTION BLOCK

Additional blocks can be programmed by the user and stored in additionallibraries. To create a new block, one should begin with FUNCTION_BLOCKkeyword in the upper window (Fig. 3). Blocks from all linked libraries can beaccessed. Simple programs of three standard blocks are presented in Tab. 2.The flip-flop SR and edge detector R_TRIG are self-explanatory (CLKpdenotes previous value of CLK). Operation of TON has been illustrated inFig. 1. The input PT denotes preset time, while the output ET is elapsed timebeginning from activation of the input IN. ET is evaluated as the difference



between current value of the system time counter (value returned byCUR_TIMEO function) and the value stime read when rising edge at IN hasappeared.

The CPDev environment uses the XML format for libraries, programs,configurations etc. as proposed in [13].

4. ST compiler components

The 8T compiler contains three basic components, i.e. scanner, parser andcode generator (Fig. 4).

SCANNER

:>

II Collection of II identifiers !

: descriptions and i

their code(VMASM)

Fig. 4. ST compiler components

Main task of the compiler is to convert character stream into an executableformat. This is done in three steps. First, lexical analyzer (scanner) analyzesa stream of characters in the input 8T language source file and decomposesit into tokens. Category of the tokens is also determined according to Tab. 3.The tokens are stored in a list passed to the parser (Fig. 4).

Table 3. Token types recognized by the compiler

Type nameidentifierkeywordtyped constantcommentreal constantstring constant

Token examplePRG1FUNCTIONDINT#1722211(*assign outputs*)18.32'Temperature: 1

Type nameinteger constantoperatordelimiterdirectivewhite spaceinvalid character

Token example50+

(*$READ*)

\

In the second step, the parser recognizes the tokens and checks validity oftoken constructions. It ignores comments and white spaces. The parserutilizes built-in elementary data types, operators, and a set of primitiveinstructions of virtual machine. Examples of the instructions are shown inTab. 4. Derived data types [5,11], functions and function blocks stored inadditional libraries are also parsed (if needed). The parser translates thetoken list into an identifier collection and creates an intermediate mnemoniccode called VMA8M (Virtual Machine Assembler). This code uses a specialtext format for storing primitive instructions and their operands. Finally, thecode generator produces a portable executable code for the virtual machine.


Dariusz Rzorica, Jan Sadolewski, and Bartosz Trybus

Modules of the mnemonic code can be merged together and converted intothe executable format.

Table 4. Primitive instructions of the virtual machine

Function Meaning Operator Function MeaningEXPT Power ** OR Logical orNEG Negation - (unary) XOR Logical xorSUB Subtraction - (arithrn.) NOT Binary negationMUL Multiplication * SHL Shift leftDIV Division / SHR Shift rightADD Addition + (arithm.) ROL/ROR Rotate lefUrightCONCAT String concatenation + (text) JMP Unconditional jumpGT Greater > JZ

Conditional jumpsGE Greater or equal >= JNZLE Less or equal <= JR Relative jumpLT Less < JRN Conditional relativeEQ Equal JRZ jumps

NE Not equal RETURN Return from<>

a function

AND Logical and & MCD Constantinitialization

The essential components of the compiler are designed as classes in theC# language [1,3]. The parser is built according to top-down scheme withsyntax-directed translation [4]. Each unit of the ST language is encapsulatedinto an object of corresponding class (Fig. 5). The classes inherit from anabstract STIdentificator class. During compilation, identifiers arecollected into lists. The lists employ predicates for finding appropriateidentifiers and eliminate the need for hash tables (normally used whiledeveloping compilers). There is a list of global identifiers and local lists whichstore identifiers of functions, function blocks, programs, etc. Identifiers in a listare checked for uniqueness. When identical names are found compilation isstopped and error reported. If local identifier hides a global one, the compilerproduces an information.

The parser generates text sequence of primitive instructions. Eachinstruction is represented by a mnemonic followed by operand names. Codegenerator replaces mnemonics and variable names with appropriate numberidentifiers (indexes). While processing an instruction, the generator extractssome information from libraries, e.g. operand size, type and passing method.The number identifier can be interpreted as a pointer to variable or asimmediate value. Instructions for the virtual machine resulting fromcompilation are represented by instances of VMInstruction class. Theoperand list is also stored as a member of this class. By using lists ofoperands typical problems with fixed-size operand tables are avoided.


Prototype environment for controller programming in the IEC 61131-3 8T language

Fig. 5. Object representation of 8T language units

5. Compilation stages

A project in CPDev, stored in the XML format, can contain global variables,functions, function blocks, programs, task and libraries. The followingexample, illustrated by Figs. 6, 7, shows the process of compiling a project fora function block TON (see Tab. 2). First, project items are merged into a singlesource file (Fig. 6, center). This source code, with definition of TON, will beprocessed to result in the universal executable code for the virtual machine.

Project

-global

variables

-functions

-function

blocks

-programs

-tasks

-libraries

STEP 1

Source ST fileFUNCTION BLOCK TONVAA -

slime: TIME;END_VAAVAA_INPUT

IN" BOOl" PT" TIME"

~~~~~p~" ,

a"-BOOl" ET" TIME"END_VAA'" "IF NOT IN THEN

a :=FALSE;ET:= t#Oms;stime := CUR_TIMED; ELSEIF NOT a THEN

ET := CUR_TIMED-etime;

IF ET >= PT THENa:=TRUE;ET"= PT"

EJo'J"iF 'END_IFEND]UNCTION_BlOCK

Mnemonic code(VMASM)

001 NOT ?IF?800A6, IN002JZ ?IF?BOOA6, :IF?BOOA7003MCD a, #/01, #/00004MCD ET, #/04, #/00000000

comouanon>: ~~~~~~- TI~:?~~~~~007:IF7BOOA7008 NOT ?IF?800AC, Q

009JZ ?IF?BOOAC, :IF?EOOAB010CUR TIME ?FCLDOAF011SUB- ET, ?FCLOOAF,$TIME012GE ?IF?BOOB1, ET, PT013JZ ?IF?BOOB1, :IF?EOOAB014MEMCP Q,?L TRUE, #/0100015MEMCP ET, pT. #/0400016 :IF?EOOAB017RETURN

Fig. 6. Compilation process - steps 1 and 2

In the first step the scanner splits input character stream into tokens. Then,the token list is passed to the parser, which removes white spaces and



comments. The parser also checks for invalid or unknown tokens andeventually reports an error, giving the file name and position of the bad token.If there are no syntax errors, the compilation begins. In the example of Fig. 6,the token FUNCTION_BLOCK is recognized as a keyword. The next token(TON) is treated as a new identifier and stored in the global identifier list as anobject of STFunctionBlock type (Fig. 5). The declaration clauses beginningwith VAR are interpreted by the parser according to its syntactic diagram(Fig. 8) [10]. At this stage the compiler also defines memory areas for inputparameters, outputs variables, and local variables.

Mnemonic code(VMASM)

OOfNOT ?IF?BOOA6.IN002 JZ ?IF?BOOA6, :IF?BOOA7003MCD Q. #101, #/00004 MCD Er, #104, #100000000OOSCUR_TIME STIME006JMP :IF?EOOAB007:iF?BOOA7008 NOT ?iF?BOQAC, Q009JZ ?rF?BOQAC, :IF?EOQAB01OCUR_TIME ?FCLOOAF011 SUB ET, ?FCLOOAF, STIME012GE ?IF?BOOB1, ET, PT

Library configuration file(LCF)

<function name="GE" vrncode="11OS"retum="BOOL"><ergs><erg no="O"type="TIME"/><erg no="1" type="TIMEnf>

</ergs><comrnent>Check if first argument isgreater or equal than second argument</comment><!function>

Universal executable code

addt'9ss:funetion operandaddress: next operands

OOZ4:0510 DE 00002£"04 000030: 1C 02 DE000034:4E 000036:1C 15oos« 01 00003C:1C 15 DADO0040: 00190042:1C 17 00000046: 1C 00 84 00/704A:0510 1400OM£" 09000050: 1C 02 14000054: 8400

Virtual machine memorymodel

.CODE0510 DE00 04 00 ...END.DATA00001F010000 ...END

Output files

Fig. 7. Compilation process - step 3 and object dump

Compilation of the function block code section begins when next tokendoes not match any of the declaration clauses. In the example the keywordIF indicates a conditional instruction. Therefore the text up to the keywordTHEN is assumed to be a boolean expression. The result of evaluation of thisexpression is stored in an auxiliary local variable ?IF?BOOA6, so with thename preceded by quotation mark ? This mark is used for every element ofthe code which has not been explicitly given any name. The expressionbetween IF and THEN is converted into the lines 001-002 of the mnemoniccode (right box in Fig. 6). Line 001 contains primitive instruction NOT thatstores result in ?IF?BOOA6 variable. Line 002 contains conditional jump JZdependent on ?IF?BOOA6 to the label :IF?BOOA7. If NOT returns FALSE

(zero in ?IF?BOOA6), the lines 003-004 initialize the output Q with FALSE andET with T#Oms. Line 005 calls the system function CUR_TIME (current systemtime) and stores returned value in stime. Unconditional jump JMP in the line006 completes the evaluation for FALSE (from NOT). The lines 008-010

142 ComSIS Vol. 4, No.2. December 2007


contain similar code executed when NOT returns TRUE. Subtraction SUB inthe line 011 involves the variable ?FCLOOAF which now keeps the currenttime, and the initial stime. The label : IF?BOOA7 in the line 007 and: ?IF?EOOAB in 016 follow from ELSE and END_IF, respectively. RETURN atthe end causes virtual machine to finish execution of the function block.

Fig. 8. Syntactic diagram for the VAR declaration clause

In the third step the final executable code is created. The compiler links thecompiled code with all required modules (Fig. 7). The mnemonic code istranslated into binary executable by replacing:

- mnemonic function names with number identifiers (opcodes),- variable names with data area indexes,- label names with code addresses (absolute or relative).

The last step involves Library Configuration File (LCF; Fig. 7, lower left).This is an XML file with additional information required during compilationsuch as mnemonics of the primitive functions and opcodes, argument orderand types. It can also contain some target-specific information, like big- orlittle-endian byte order. Resulting universal executable code is shown in theupper right box in Fig. 7. As seen, 1009 (hex) is the opcode of the firstinstruction QT. The others follow accordingly.

6. Virtual machine

Software deployment process can be represented as in Fig. 9. The universalexecutable code is transferred to a target controller where it is executed bythe virtual machine.



Universalexecutable code

Hardware resourceallocation map

1/0 interface

Communicationinterface

Fig. 9. Software deployment process for different hardware platforms

Next cycle

Cycletime

1Fig. 10. Phases of the virtual machine cycle

As indicated before, the machine is specific for a particular microprocessorand operates as an interpreter. Code and data are stored in two differentmemory areas (similarly as in Harvard architecture processors). The virtualmachine is an automaton operating according to Fig. 10. Following IEC61131-3 standard, a task consists of programs executed successively.Universal code of the compiled program contains identifiers of primitiveinstructions and their operands (Fig. 7). While executing a program, themachine fetches successive instruction, decodes it, fetches the operands,and finally executes the instruction. The machine monitors time cycles of thetasks and alarms if timeout appears. It also triggers input/output proceduresresponsible for external variables (Fig. 10).



f-----==--,---=-::-;::c=-:--1 Universal

1110 functions II ~~~~~ II , i Platform-dependentITime & clock i ~~~~~~~~~~~~gj

Fig. 11. Virtual machine's internal structure

The virtual machine code consists of universal and platform dependentmodules (Fig. 11). The machine maintains program counter with the index tocurrently executed instruction and with base address to memory area withvariables. Together with stack emulation, this allows for multiple andconcurrent calls of functions and function blocks (which employ internalvariables). The machines provide relatively short execution times due tosimilarity of primitive instructions (Tab. 4 earlier) to assemblers of typicalmicroprocessors, as well as indexing techniques used for interpretation [10].

""/ 1-0008: 21 D2

- 01 22 00 08 2A 07 l0041: ... 1A 57 I

""y~

IInternal memory

~ Instruction select.!~~u !

i '

I I';!r Adding I

IiIII I Reference reg. ,,+

Device memoryCode segment Data segment

Fig. 12. Memory segments of the virtual machine

The virtual machine instructions and their operands are stored in the codesegment of memory (Fig.12). It is read-only memory, so none of primitiveinstructions can modify the contents. The data segment contains variablesand constant values, function blocks and programs. This segment can beaccessed directly or indirectly by special registers. Internal memory containsstacks, registers and the interpreter code. The internal memory cannot beaccessed by primitive instructions. Virtual machine is able to execute multipleinstances of programs.

Modular structure of the virtual machine simplifies implementation indifferent hardware platforms. Usually only the platform-dependent moduleshave to be rewritten or modified. Code of the universal modules remainsunchanged (the source code must be compiled for the target CPU anyway).The platform-dependent modules (Fig. 11) interface the machine to particularhardware, executing VM requests to low-level procedures. For example theTime&clock employs timer interrupt to compute task cycle and set timeoutflag. If real-time clock chip is available, it can trigger events that occur at



regular, long intervals (e.g., every Sunday midnight). I/O functions provideinterface to analog and binary inputs and outputs, and to communicationfieldbus or network. The multitasking module is optional, since it employsmultitasking mechanisms provided by host operating system. In sucharrangement, task instances use private copies of global variables to avoidconflicts (so-called process image mechanism).

The virtual machine has been written in the industry standard C language,so it can be directly adapted to different microprocessors. If limited hardwareresources are available, an XML configuration file specifies simplified versionof the machine. For example, one can limit the number of elementary datatypes or define a subset of primitive instructions to be used. Till now, themachines for AVR, MCS-51 and PC platforms have been developed. Anotherone for ARM-core based microprocessors is being considered.

a) b)

,

L~

inputs<>

outputs

Fig. 13. a) SMC controller, b) simple SMC-based system

First applications of the CPDev has already been tested in cooperation withLUMEL Zielona G6ra company. The SMC programmable controller (Fig. 13a)and appropriate firmware including special version of the virtual machine havebeen developed. The controller employs AVR ATmega 128 CPU [2]. SMCoperates as a central unit of mini-distributed system in control, measurementand monitoring applications. Usually it is equipped with SM1 - SM5input/output modules (Fig. 13b), but other devices can be connected to RS485 interface using industry standard MODBUS RTU protocol [7].

7. Summary

A compiler of IEC 61131-3 Structured Text language, basic component of theCPDev development system, has been presented in the paper. ST programsare translated into specially designed universal executable code. Targetspecific virtual machine can execute such code on a controller CPU.


Available:(current


Although more advanced environments are available from commercialmanufacturers, e.g. Step? from Siemens, Control Builder from ABB, Conceptfrom Schneider, they can handle only manufacturers' hardware. The CPDevis oriented towards small-and-medium scale manufacturers and supports, orwill support, a range of popular platforms, such as AVR, MCS-51, ARM or PC.It is being created having in mind both generality and openness, which meansthat it can be adjusted to specific needs.

8. References

1. Appel A., Palsberg J.: Modern compiler implementation in Java. Second edition.Cambridge University Press. (2002)

2. ATmega 128 Datasheet. Atmel 2007. [Online].http://www.atmel.com/dyn/resources/prod_documents/doc2467.pdfNovember 2007)

3. C# Language Specification - [Online). Available: http://msdn2.microsoft.com/enus/vcsharp/aa336809.aspx (current November 2007)

4. Cooper K., Torczon L.: Engineering a Compiler. Morgan Kaufmann, SanFrancisco. (2003)

5. IEC 61131-3 standard: Programmable Controllers - Part 3, ProgrammingLanguages. IEC. (2003)

6. Lindholm T., Yellim F.: Java Virtual Machine Specification Second Edition. JavaSoftware, Sun Microsystems Inc. (2004)

7. Modicon MODBUS Protocol Reference Guide. MODICON, Inc., IndustrialAutomation Systems, Massachusetts (1996). [Online]. Available:www.modbus.org/docs/PI_MBUS_300.pdf

8. MS .NET Framework Developer's Guide [Online). Available:http://msdn2.microsoft.com/en-USllibrary/aa720433.aspx (current November2007)

9. Pietrusewicz K.: Biggest study of Polish PLC controllers market. ControlEngineering Polska, 26-38. (February 2007) (in Polish).

10. Rzonca D., Sadolewski J., Trybus B.: IEC 61131-3 standard ST compiler intouniversal executable code. In: Real-Time Systems. Methods and Applications,WKt, Warsaw, 189-198. (2007) (in Polish).

11. Stec A., Swider Z: Trybus L.: Functional characteristic of the prototype system forembedded systems programming. In: Real-Time Systems. Methods andApplications, WKt, Warsaw, 179-188. (2007) (in Polish).

12. John K.H., Tiegelkamp M.: IEC 61131-3: Programming Industrial AutomationSystems. Berlin Heidelberg, Springer-Verlag. (2001)

13. XML Formats for IEC 61131-3 ver. 1.01 - Official Release. [Online]. Available:www.plcopen.org/



Dariusz Rzonca is an assistant at the Department of Informatics and Control,Rzesz6w University of Technology. He received B.Sc. in mathematics in2002, and M.Sc. in computer engineering in 2004. His research focuses oncoloured Petri nets and communication in microprocessor systems.

Jan Sadolewski is an assistant at the Department of Informatics and Control,Rzesz6w University of Technology. He received M.Sc. in computerengineering in 2006. His interests are in C, C#, Delphi, Java, and Assembly8086. He currently works on modern programming languages and compilerimplementations.

Dr. Bartosz Trybus is an assistant professor at the Department ofInformatics and Control, Rzesz6w University of Technology. He receivedPh.D. in computer engineering in 2004 from AGH University of Science andTechnology, Cracow. His research focuses on real-time systems and designtechniques for control applications.


prototype environment for controller programming in the ... · controllers according to the iec...

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