roadmapping the pcb assembly future -...
TRANSCRIPT
RCIAL
1998 NEMI Roadmap
NLY M
E
Roadmapping the PCBAssembly FutureBy Tom Davison and Bill Barthel
N
O
S
IT
M
U
D
N
c-,8keynts ongTheenen
ofi-
s),S)iesdeedingc-r-
nvi-casas,
ebly
ticag.MI
onsageThareon
ime
hect ert
bly of
testubla-tur-
ctorase therersdi- to
ust
h
aop-ies forandcal-us
-reel03,gha-
n-
lderghtnttactor-vingad
bil-
l-
an-el-o-
19
0
0
0
0
1
Co
FOR I
CIRCU
ITS
AS
D
Recentlypublished, the
1998 NEMIRoadmap
outlines keys toassembly’s
future success.
T he National Electronics Manufaturing Initiative (NEMI, HerndonVA) recently published its 199
roadmap. This document identifies the technology and infrastructure developmerequired to ensure the competitivenessNorth American electronics manufacturicompanies over the next decade. roadmap was designed to guide investmin research, development and deploymfor electronics manufacturing.
The 1998 roadmap involved the inputmore than 400 individuals from 175 orignal equipment manufacturers (OEMelectronics manufacturing services (EMproviders, suppliers, government agencuniversities and related consortia/traassociations. These individuals definfuture manufacturing needs by determin“product emulators” for five product setors—low cost, handheld, cost/perfomance, high performance and harsh eronment—and used these needs to foretrends for each of 17 technology areincluding board assembly.
The following article summarizes thNEMI Roadmap chapter on board assem
70 Circuits Assembly MAY 1999
DIV
IDUA
L USE
EMBLY
PROHIB
PLICA
TION A
ND
f
tt
,
t
.
Board AssemblyProcesses
Board assembly processes are a cripart of overall electronics manufacturinThe product emulators used in the NEroadmap, although diverse in the functiand the markets they serve, all leverboard assembly process technologies. priorities defined for these technologies consistent across all product sectors: cversion costs; density and weight; and tmanagement.
Conversion CostsMinimization of conversion costs is t
top priority across all of the NEMI produemulators. Conversion cost is defined asthecost to take a group of parts and convthem to a functioning electronic assem.This cost is calculated by taking the pricethe complete PCB assembly, including and material procurement cost, and stracting the material cost. With this calcution, all costs associated with manufacing the assemblies are considered.
Table 1 summarizes the product seconversion costs requirements by year. Bon cost projections developed for each ofproduct sectors, electronics manufactuwill need to reduce conversion costs—incated by cost per I/O—anywhere from 4262 percent over the next 10 years.
Product Sector Metric
Low cost ¢ per I/O
Cost/Performance ¢ per I/O
Handheld ¢ per I/O
Harsh environment/Military ¢ per I/O
High performance ¢ per I/O
TABLE 1: Board assembly roadmap:
S CO
ISTRIB
UTIOl
e
-
-
d
Several requirements and practices mbe met to achieve further reductions:
Reduction of overhead througimproved utilization.
Achieving high machine utilization iskey factor in reducing overhead. Develment and implementation of technologand practices that eliminate stoppagesmodel changeover, parts replenishment time wasted for machine assists are critily important. Examples include continuoprocessing technologies such as reel-toand bulk feeding of passive parts. By 20a significant technological breakthrouwill be required to achieve machine utiliztion beyond 85 percent.
Improvement of process yield and covergence to asymptotic yield.
Advances in processes such as sopaste screening are moving in the ridirection. Further, by leveraging receadvancements in automated noncontesting, a real potential exists for self-crecting systems. These systems are motoward providing parametric data (insteof pass/fail) that will enhance their capaities as defect prevention tools.
Optimization of the factory via modeing and simulation.
By leveraging computer integrated mufacturing (CIM) technology such as moding/simulation, systems monitoring, diagn
99 2001 2003 2009
.7 0.6 0.5 0.3
.75 0.65 0.55 0.38
.8 0.7 0.5 0.3
.9 0.7 0.6 0.4
.2 1 0.8 0.7
nversion costs by product sector.
http://www.circuitsassembly.com
canInra-aningtheod-
sisce
d
tol- be
ndof
entasslo-
el-ns
1998 NEMI Roadmap
sis and optimization, many technologies be integrated and mutually optimized. test, for example, the selection and integtion of information from several areas creduce overall test cost while maintaincoverage and efficiency. Further, by development of high-speed, high-level m
FOR I
N
CIRCU
ITS
ASS
DU
72 Circuits Assembly MAY 1999
eling and simulation tools for cost analyand virtual prototyping, CIM can also redutime to asymptotic yield and market.
Development of standards for bulk-feand odd form components.
Standards for parts dimensions and erances and parts packaging must
DIV
IDUA
L USE
O
EMBLY
PROHIBIT
PLICA
TION A
ND D
le
reredlo-
itly
nc-on-rd- beue,and ctny
ght are
eengeen-po-
ds.rg-
en-ill
an-.
tess-tioner-blegra-nt
ent
NLY
S CO
MM
ERCI
AL
ISTRIB
UTION
developed for both bulk-fed passives aodd form components. Developers automation equipment and componparts will, then, be ready to support mdeployment of these emerging technogies. Bulk feeding will also require devopment for high product mix situatiosuch as EMS.
Development of new pin-through-ho(PTH) parts.
The availability of PTH parts that acompatible with the temperatures requifor mass reflow in surface-mount technogy is a critical factor.
Density and WeightThe second priority is electrical circu
density of the printed circuit assemb(PCA). As products become smaller, futionality and degree of integration are cstantly increasing. As a result, recobreaking packaging densities need toachieved, and, if present trends continthe boundaries between component board assembly will begin to disappear.
Closely related to density is produweight. As products miniaturize and mabecome handheld, minimal product weibecomes a key factor. Several eventskey to projected density and weight:
Deployment of 0201 chip passives.For discrete chips, 0402s have now b
fully deployed. By 2001, 0201s will emeras a mainstream technology and will evtually be displaced by deposited comnents or integral passives.
Development of CSP design standarChip-scale packaging (CSP) is eme
ing as the technology choice for high-dsity, high-performance packaging. CSP wrequire the development of design stdards for packages and parts packaging
“Business pull” for FCA.Flip-chip assembly (FCA) must migra
from a “technology push” to a “businepull” model for full deployment. The infrastructure must evolve to address reducof the FCA conversion costs per I/O; intconnection material density to enaincreases in packaging density; and intetion into the standard surface-mouprocess.
Table 2 depicts some of the componattributes projected over time.
http://www.circuitsassembly.com
N
NLY
S
ITS
COM
ME
U
DIS
TRIBUTIO
N
ge-ar-
ingactinpetngeicst be toto-
helps:
ofhiselow
read,
forIMketns
s.ry toese
alsas-
Sgynaed.plyto
ind-d-
Ms allder01.ingd in 1,
ro-rduireialss. fornd
ntly,r-.
al tover-
1998 NEMI Roadmap
FOR I
CIRCU
ITS
AS
D
Time Management The third ranked factor is time mana
ment, both in terms of managing time to mket and process cycle time. By minimiztime to market, a manufacturer can requickly to changes in technology, shifts consumer demands, and changes in comtive environment. Continuous product chais critical for success in today’s electronbusiness. Overall product cycle time musminimized, which reduces the time requiredimplement model changes and limits invenry exposure. Process advancements will improve time management in several area
Leverage leadership in board test.North America is a leader in the area
board test equipment. By leveraging ttechnology, in conjunction with CIM, thfeedback loop that test provides can alfaster convergence to asymptotic yield.
Leverage leadership in CIM.North America is also a leader in the a
of CIM. By the development of high-speehigh-level modeling and simulation tools cost analysis and virtual prototyping, Ccan provide an advantage in time to marresponsiveness to shifting market conditioand reduction in overall cycle time.
Further develop data driven processeData driven processes allow for ve
rapid time to market and rapid responseengineering change orders (ECOs). Thprocesses include circuit-writing materi(nano-particle materials), deposited psives and solder jetting.
Other ConsiderationsWith the increased reliance on EM
providers, a new model in technolodevelopment versus that used in traditiovertically integrated companies is needOEMs must partner across their supchain, including their EMS providers,develop key technologies for products.
North America must actively engagethe development of environmentally frienly manufacturing technologies and leafree soldering. In Japan, leading OEhave announced their intent to eliminateuse of lead in interconnect, including soland lead and board finishes, by April 20In Europe, a proposal is currently bedebated that could ban the use of leaelectronics equipment effective January
http://www.circuitsassembly.com
DIV
IDUA
L USE
O
EMBLY
PROHIB
PLICA
TION A
ND
i-
,,
l
2004. This change in material may pfoundly affect many of today’s boaassembly technologies and may reqrequalification of processes and materdue to changes in soldering temperature
Development of common standards reliability testing of electronics devices a
RCIAL
assemblies is also an area for focus. Currelittle commonality exists among North Ameican electronics manufacturers in this area
ConclusionBoard assembly processes are centr
electronics manufacturing and can be le
Circuits Assembly MAY 1999 73
N
AL
USE O
NLY
SEM
BLY
ITS
COM
MER
CIAL
UPLICA
TION A
ND D
IBUTIO
N
glyanusain, abe
me
I
org
at
of
ing
-
nd
1998 NEMI Roadmap
Key Manufacturing 1999 2001 2003 2009Processes
Surface-Mount 20 x 40 mils 10 x 20 mils Deposited DepositedDiscrete Chips Rs and Cs Rs and Cs
Surface-Mount IC BGA—1 mm BGA—0.8 mm BGA—0.8 mm BGA—0.65 mmPackaging, CSP—0.6 mm CSP—0.5 mm CSP—0.4 mm CSP—0.3 mmMinimum Component FCA—0.18 mm FCA—0.15 mm FCA—0.13 mm FCA—0.007 mmPitch
Surface-Mount Special 2.5 mm 1.5 mm 1.5 mm 1.5 mmComponent Thick-ness
Surface-Mount Solder Solder Low Temp Low TempComponentAttach
FCA Underfill < 3 sec./chip < 0.5 sec./chip < 0.5 sec./chip Standard Surface-(120 x 120 mm chip) Mount
FCA Underfill Cure Convection oven, Convection oven, < 120 sec. Standard Surface-< 300 sec. < 180 sec. Mount
FCA Attach Solder Low temperatureconnection
Lead Alternates Tin/lead solder Tin/lead solder No-lead solder Organics
TABLE 2: Boardassembly roadmap:components.
FOR I
CIRCU
ITS
AS
D
aged in the development of increasinsophisticated products. For North Americindustry to capitalize on the numeroemerging electronics markets and remcompetitive in electronics manufacturingnumber of technological advances will
http://www.circuitsassembly.com
DIV
IDU
PROHIBrequired to improve conversion costs, timanagement, and density and weight.
For further details about the 1998 NEM
Roadmap, contact NEMI at http://www.nemi.
or (703) 834-0330.
ISTRTom Davisonis manager of operation systems
Celestica Corp., Fort Collins, CO, and chair
the NEMI Board Assembly Technology Work
Group (TWG). Bill Barthel is director of manu
facturing technology for Plexus, Neenah, WI, a
co-chair of the NEMI Board Assembly TWG.
Circuits Assembly MAY 1999 75