s. rawat i.i.t. kanpur. floating-point representation ieee numbers are stored using a kind of...
TRANSCRIPT
42510011 0010 1010 1101 0001 0100 1011
S. Rawat
I.I.T. Kanpur
4251
0011 0010 1010 1101 0001 0100 1011
Floating-point representationIEEE numbers are stored using a kind of scientific notation.
± mantissa * 2exponent
We can represent floating-point numbers with three binary fields:
a sign bit san exponent field eand a fraction field f.
The IEEE 754 standard defines several different precisions.
Single precision numbers include an 8-bit exponent field and a 23-bit fraction, for a total of 32 bits.Double precision numbers have an 11-bit exponent field and a 52-bit fraction, for a total of 64 bits.
4251
0011 0010 1010 1101 0001 0100 1011
Single Precision and Double PrecisionSingle Precision (Single means One 32 Bit Reg to register)
Double Precision (Double means Two 32 Bit Reg to register)
4251
0011 0010 1010 1101 0001 0100 1011
Sign
The sign bit is 0 for positive numbers and 1 for negative numbers.
But unlike integers, IEEE values are stored in signed magnitude format.
4251
0011 0010 1010 1101 0001 0100 1011
MantissaThe field f contains a binary fraction.The actual mantissa of the floating-point value is (1 + f).– In other words, there is an implicit 1 to the left of the
binary point.– For example, if f is 01101…, the mantissa would be
1.01101…There are many ways to write a number in scientific notation, but there is always a unique normalized representation, with exactly one non-zero digit to the left of the point.
0.232 * 103 = 23.2 * 101 = 2.32 * 102 = …A side effect is that we get a little more precision: there are 24 bits in the mantissa, but we only need to store 23 of them.
4251
0011 0010 1010 1101 0001 0100 1011
Exponent
The exponent field represents the exponent as a biased number.
It contains the actual exponent plus 127 for single precision, or the actual exponent plus 1023 in double precision.This converts all single precision exponents from -127 to 127 into unsigned numbers from 0 to 254, and all double precision exponents from -1023 to 1023 into unsigned numbers from 0 to 2046
Two Examples shown below for single precisionIf the exponent is 4, the e-field will be 4+127 = 131(100000112).If the e-field contains 8’b01011101(9310) the actual exponent is 93-127 = 34
Storing a biased exponent means we can compare IEEE values as if they were signed integers.
4251
0011 0010 1010 1101 0001 0100 1011
Example IEEE-decimal conversionLet’s find the decimal value of the following IEEE number.
1 01111100 1100000000000000000000
First convert each individual field to decimal.The sign bit s is 1.The e field contains 01111100 = 12410.The mantissa is 0.11000… = 0.7510.
Then just plug these decimal values of s, e and f into our formula.
(1 - 2s) * (1 + f) * 2e-bias
This gives us (1 - 2) * (1 + 0.75) * 2124-127 = (-1.75 * 2-3) = -0.21875.
4251
0011 0010 1010 1101 0001 0100 1011
Converting a decimal number to IEEE 754
What is the single-precision representation of 347.625?First convert the number to binary:
That is 347.625 = 101011011.1012
Normalize the number by shifting the binary point until there is a single 1 to the left:
101011011.101 x 20 = 1.01011011101 x 28
The bits to the right of the binary point comprise the fractional field f.
The number of times you shifted gives the exponent. The field-e should contain: exponent + 127.
Sign bit: 0 if positive, 1 if negative.
4251
0011 0010 1010 1101 0001 0100 1011
EXAMPLES
10 0 0 11 1 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0
10 0 0 11 1 10 1 1 0 1 1 0 1 0 0 1 1 1 1 1 1 1 0 0 0 00 0 0
00 0 1 11 0 00 0 1 0 1 0 1 1 1 0 1 1 1 0 0 1 0 0 1 0 11 0 0
01 1 1 01 0 00 1 1 0 1 0 1 1 0 0 1 0 0 1 1 0 1 1 0 0 01 1 0
10 1 1 11 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 01 1 1
10 1 1 11 1 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 01 1 1
23
23.707
Kb=1.38x10-23
-0.03452
+Inf
Nan
4251
0011 0010 1010 1101 0001 0100 1011
A Review and Features of the ANSI/IEEE Standard Floating Point Representation
42510011 0010 1010 1101 0001 0100 1011
4251
0011 0010 1010 1101 0001 0100 1011
FP MULTIPLIERGiven two FP numbers n1 and n2, the product of both denoted as n, can be expressed as
2121
2211
2.1
2..12..1
21
21
21
EESS
ESES
pp
pp
nnn
Dadda Tree (24 Bits x 24 Bits)XOR sign Bits
4251
0011 0010 1010 1101 0001 0100 1011
FP-Mult-Algorithm
1271:&
_;]0:23:1[
_;]0:23:1[
2.1
2..12..1
121
22
11
21
21
21
2121
2211
SSSforrangeallowed
normalifpaspconvert
normalifpaspconvert
pp
pp
nnn
EESS
ESES
4251
0011 0010 1010 1101 0001 0100 1011
Exponent in FP-Multiplication
12721 EEE
Adding a carry-in to the sum and subtracting 128, which can be done by complementing the most significant bit.
4251
0011 0010 1010 1101 0001 0100 1011
FP-Multiplier
FP Multiplier Block Diagram
UNPACK
XORAdd
ExponentsDadda_tree
Normalize
Round
Normalize
PACK
4251
0011 0010 1010 1101 0001 0100 1011
Dadda Tree
4251
0011 0010 1010 1101 0001 0100 1011
Dadda Tree(contd.)
4251
0011 0010 1010 1101 0001 0100 1011
Dadda Tree(contd.)
4251
0011 0010 1010 1101 0001 0100 1011
Dadda Tree(contd.)
4251
0011 0010 1010 1101 0001 0100 1011
Dadda Tree(contd.)
Do the Reductions 96432
After 2 rows reduction ADD using 47-Bit CLA, Note: you can instantiate CLAs written in previous labs
Result will be of 48 Bits
4251
0011 0010 1010 1101 0001 0100 1011
FP-Multiplier (contd.)
A 48-bit dadda multiplier is used for the significand multiplication, The 28 most significant bits (MSB) are selected as the tentative result,
where 24 bits are the mantissa result, 1 bit is used for range overflow and 3 extra bits are used for proper rounding.
Next, the result is normalized to the [1, 2) range, Rounded for proper approximation to the closest value and normalized again. The resulting sign, exponent and significand are then packed in single precision format. The normalization consists in a possible single bit right shift and corresponding exponent increment, based on the value of the b1 bit. The rounding scheme used is round to nearest, which can be easily achieved verifying the values of the remaining least significant bits (LSB).
4251
0011 0010 1010 1101 0001 0100 1011
FP-Multiplier (contd.)
Cases possible:
While feeding in Dadda tree two 24 bits operands
If (both are denormalized)
MULTIPLICATION[47][46]=’00’
Else if (one denormalized and another normal)
MULTIPLICATION[47][46]= ‘00’ or ‘01’
Else if (both normalized)
MULTIPLICATION[47][46]=‘01’
MULTIPLICATION[47][46]=’10’(normalization required)
MULTIPLICATION[47][46]=’11’(normalization required)
4251
0011 0010 1010 1101 0001 0100 1011
An Example
Lets Multiply 1.5x210 & 1.25x210
Stored Bias will be 10 + 127 = 137,
So 137 + 137 = 274
Stored Exponent of the result must correspond to 20 which is 147.
As in hardware what we are doing is subtracting 127 from the added exponents which were stored in FP registers i.e. 274-127 = 147
4251
0011 0010 1010 1101 0001 0100 1011
An Example (contd.)
10 0 0 10 0 01 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 1 0
10 0 0 10 1 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 1 0
n1=1.5x210
n2=1.25x210
Ans=1.875x220
0 01 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
1
=(223 + 222)10
=(223 + 221)10
Dadda_output=(223 + 222)*(223 + 221)=780000000000H
0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 10 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7 8
47 46
0 020
4251
0011 0010 1010 1101 0001 0100 1011
Thanks