sbs/a1n fast daq alexandre camsonne october 19 th 2012

SBS/A1n Fast DAQ

Alexandre CamsonneOctober 19th 2012

Outline• Overview• Experiments• Channel count• Fastbus inventory• Test stand• Module flipping• CODA 3 / Intel CPU• MPD APV25• Questions• To do / timeline• Conclusions

Overview

• Mixed DAQ using VME for GEM readout and Fastbus for other detectors

• Use multiple crates and modules to reduce deadtime

Fastbus

• A1n : Big Bite– Lead Glass– 4 Fastbus crates

• GEn / GMn – BigBite 4 Fastbus crates – Cdet : 8 Fastbus crates

• Gep : – BigCal : 6 Fastbus crates– Cdet : 8 Fastbus crates

Experimental ratesA1n Gep Gen GMn SIDIS

Singles BB 10 KHz X 2KHz 1KHz 200 KHz

Singles e- 200KHz ? ? 5 KHz

Singles hadron

X 1.5 MHz 1.3 MHz 1MHz 3 MHz

Coinc X 3 KHz 65 Hz 50 Hz ~1KHz

Trigger rate

10 KHz 3 KHz 2 KHz 1KHz 1KHz

Channel countA1n Gep Gen GMn SIDIS

BigBite 243 LG550 Cer

90x2 Scint=

873

243 LG550 Cer

90x2 Scint=

873

243 LG550 Cer

90x2 Scint=

873

243 LG550 Cer

90x2 Scint=

873HCAL X 242 242 242 242

CDet 3328 3328 3328 3328 X

ECAL X 1520 Shower

X X x

RICH X X X X 1934

Total 4201 5090 4443 4443 4443

GEM 20250 101700 20250 20250 101700

SuperBigbite DAQ and Electronics Alexandre Camsonne

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Bigbite spectrometer

10/13/2011

•Bigbite•Standard Hall A equipment spectrometer used for to E02-013 GEn,•Same setup for 12 GeV A1

n experiment and 12 GeV GEn and GMn

•Shower counter 7x27 blocks•Preshower 2x27 blocks• 243 blocks total•Analog sum on shower and preshower all modules available and used in previous experiments


10

SuperBigbite Spectrometer Focal Plane Polarimeter setup

10/13/2011

Fastbus• SFI

– Hall A : 6 + 2 ( TEDF ) + 1 (EEL )– Hall B : 5 (+ 11 available if DC upgrade )– DAQ group : 1– 6 CLEO FRITZ SFI but no driver / software

• Crate / Power supply– 3 BigBite– 2 TEDF– 5 + (11 ) Hall B – 2 RCS ?– 1 EEL– 2 HRS

• New – power supplies : 10 K$– SFI : 9 K$– Intel VME CPU : 3.5 K$

• Need to check for Geographical and Arbitration controller board

11 SFI + 4 spares

10 powers supplies + 3 spares

Need 6 power supplies

and 18 Fastbus blowers

Test stand

• 2 Fastbus Crate and PS from Hall B• OSP done• CODA running from• 2 SFI with Intel VME CPU• TS and VME64X crate to be installed• Error on boards– Interference of TI with Fastbus, one bug fixed with new TI

( missing interrupt line )– Possibly some other issues between SFI and VME TI– Debugging

Module flipping

• Send signals to several modules to reduce encoding deadtime

• Use ribbon cable with daisy chaining

Signal

Module flipping

• V1495 programming– Use Compton prescaler as starting point

L1A

PrescaleN

L1A on output Ntrig modulo N

Fast Clear

Busy out

FrontEndBusyFast Clear

on output Ntrig modulo N

Fastbus modulesxN

Module flipping

• V1495 programming– First version working should be good enough to

evaluate dead time improvement– Need implement busy logic and fast clear– Want to implement FIFO to store state for readout

and TDC output with board status for sync check– Need to check synch and timing resolution

Intel CPU

• Installed Linux operating system on Compact Flash so board can boot stand alone

• Readout of Fastbus working• Trigger with old VME TI with SFI working trying

new TI to test improvement with event blocking• Develop code for Fastbus readout with new TI• Develop code for module flipping readout• Port MPD code to Intel CPU

MPD / APV25

• MPD working with APV25 using CAEN controller

• MPD boards in UVA for GEM testing• Move APV setup to JLAB after test• Adapt Evaristo’s library for use with CODA

using Intel VME CPU

MQT

• 16 channels per board• Current drawn to be determined• Additional cost of MQT power supplies most

likely similar to Fastbus PS with FAN about 11 K$

Detector

To do / timeline

• Evaluate performance of module flipping using old VME CPU and EEL setup ( 1 week )

• Evaluate performance with Intel CPU ( 2 weeks ) in TEDF

• Setup Trigger supervisor add Fastbus bin : test setup with multiple crates ( 1 week )

• Check data integrity and implement sync check ( 2 weeks )

To do / timeline

• Port MPD library to use with CODA ( 3 weeks )• Test full A1n setup• Add additional crates for SBS running• Develop HCAL trigger• Test coincidence trigger

………………………

Tasks

• Test GAC, ATC board• Test SFI• V1495 Module flipping programming• Test Intel CPU


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Research Man Power• GEM readout APV25 / VME

– INFN : Evaristo Cisbani, 1 technician– NSU : Mahbub Kandaker, Vina Punjabi

• Front End NINO chips– Glasgow : John Annand

• Hadron calorimeter trigger and trigger logic – Ron Gilman, 1 postdoc, 1 student– Jefferson Laboratory : Ole Hansen, Alexandre Camsonne

• Electron calorimeter trigger– Jefferson Laboratory : Mark Jones, Alexandre Camsonne– William and Mary : Charles Perdrisat

• Hall A infrastructure– DAQ computer : Ole Hansen– Network : JLAB network

10/13/2011


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Time line• 2012

– GEM + APV25 GEM tests during g2p

– FADC tests– Receive BELLE Fastbus

electronics + MQT– 4 JLAB FADC250

• 2013– Small scale setup for testing

: FADC + trigger + Fastbus + APV25

– All APV25 and MPD for GEn built and tested by NSU

• 2014– MPD GEM electronics installed on

detectors for A1n– Start Gep electronics– Start Hadron Calorimeter Trigger

implementation • Digital Trigger electronics test parasitic

• 2015– Run A1n

• 2016– Hadron Calorimeter complete– Full DAQ setup

• 2017– Ready for GEn

10/13/2011

Conclusion• Test stand in TEDF ready• Basic readout of Fastbus done with Intel CPU• Development of use of CODA 3 VME TI• Module flipping hardware ready : need to write software and study

performance. First glance at performance when buffering with TI or TS • Need to develop module flipping with busy and Fast Clear• Major work to make sure of data synchronization

• Start work on MQT

• Need complete Fastbus inventory ( potential shortage of GAC and ATC )• Full test of all electronics and spares• Getting Hall B Drift Chamber Fastbus

sbs/a1n fast daq alexandre camsonne october 19 th 2012

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