A Division of Samtec

signal integrityDESIGN SOLUTIONS FROM SILICON-TO-SILICON

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HIGH SPEED CABLE

BOARD LEVEL INTERCONNECTSMICRO

INTERPOSERS

MICRO BACKPLANE

As 28 Gbps systems move into mainstream markets, the need to develop solutions that support both high density and signal integrity performance at that speed is becoming increasingly important.

– 28 Gbps is the new standard

– 40 Gbps systems are nearing the horizon

– 56 Gbps systems are already on the roadmap for some designers

At these extreme speeds, taking the concept of signal integrity optimization beyond the connector and into the entire system has become a necessity. Teraspeed® Consulting offers complete silicon-to-silicon signal integrity design solutions:

FROM BARE DIE, TO PACKAGE, TO BOARD, TO CONNECTOR OR CABLE - AND BACK AGAIN.

The closer we get to the silicon, the more opportunities there are for us to assist you in your initial design, and guide you through the entire product design cycle.

Teraspeed® Consulting brings Tier 1 level signal integrity expertise and capabilities directly to your engineering team. From complete system design, signal integrity analysis and engineering, and in-depth signal integrity training, our vision is to provide enabling technology and support in the design and implementation of your extreme performance systems.

teraspeed® consultingSIGNAL INTEGRITY DESIGN SOLUTIONS FROM SILICON-TO-SILICON

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FROM SILICON-TO-SILICON.FULL CHANNEL SOLUTIONS...

PANEL & I/O

HIGH SPEED EDGE CARD

RF, TEST & DEBUG

ACTIVE OPTICS

IC PACKAGING

In all high-end products, the customers’ circuit boards must be optimized for the specific connector. To stay competitive, connector companies are building their SI expertise not just for their own design challenges but also to assist their customers. This is why Samtec recently acquired Teraspeed Consulting to strengthen its support for solving customers’ SI problems.

~ Eric BogatinTeledyne LeCroy Signal Integrity Academy

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SYSTEM ENGINEERINGfull system solutions from silicon-to-silicon

ADVANCED PACKAGINGpackaging and IC-to-board design and optimization

SIGNAL & POWER INTEGRITYanalysis, design, engineering and verification

ELECTROMAGNETIC MODELINGmodeling, simulation, testing and measurement

THERMAL MANAGEMENTsolutions for high density / high power systems

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system engineeringFULL SYSTEM SOLUTIONS FROM SILICON-TO-SILICON

Teraspeed ® Consulting helps you optimize your system with a comprehensive engineering approach that integrates design,

simulation, test and development services for complete system platforms, high speed interconnects and subsystems.

Our goal is to help our clients succeed through proper application of technology. Whether we provide an unbiased evaluation of a client's design, help to solve a difficult thermal, power, or signal integrity engineering problem, or develop a system from concept to fabrication, our goal is to help your team meet all your objectives: design performance, time-to-market and cost effectiveness.

Our system engineering expertise includes:

– 35+ years of NESA expertise – Extensive experience with backplane & platform design – Proven ability to quickly turn design challenges into cost-effective solutions – Interconnect modeling, simulation and measurement methodology development – Validation platform engineering for connector, package and device characterization at frequencies to 50 GHz

– Modeling, simulation and correlation to measurement of 56 Gbps systems – Bus modeling, routing and optimization of complete systems to 28 Gbps – Turn-key system design

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advanced packagingPACKAGING & IC-TO-BOARD DESIGN & OPTIMIZATION

Our research and development in the areas of package layout, structural analysis, signal integrity and power integrity optimization, and material characterization, allow us to help you design any package, whether it's a tough DDR 3/4 design, or a high performance next-generation 56 Gbps channel.

In addition, as a division of Samtec, a global manufacturer of leading-edge electronic interconnect systems, we are able to offer the unique ability to integrate full package design and manufacturing processes in conjunction with Samtec’s Microelectronics division.

Our design and optimization capabilities include:

– SI-enabled package layout – Signal integrity & power integrity design – Design kits for any design at signaling rates up to, and including, 28 Gbps and 56 Gbps – I/O buffer sizing – Package characterization

Samtec Microelectronics capabilities include:

– Complex package assembly, including precision die attach and ultra-fine pitch wirebonding – Packaging and substrate design – Stacked die, multi-chip modules, ceramics and organics – Interposer integration – Signal integrity-optimized interconnect solutions & support – Learn more at samtecmicroelectronics.com

fine-pitch wirebond

dam and encapsulation

interposer integration

precision die attach, flip chip and underfill

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Our design evaluations for semiconductor products and interconnect systems help our clients prepare new products for market, identify strategies for quick market penetration, and select the most suitable features for future design improvements.

design kits up to 28 gbps and beyond

i/o buffer sizing

signal integrity-enabled package layout

signal & power integrity design

package characterization

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Our capabilities include high bandwidth full-wave S-parameter model extraction for:

– Printed Circuit Boards (PCB) – Capacitors – Via structures – Cables and cable transitions – DDR3, DDR4, LPDDR3 and GDDR5 – Semiconductor packaging (Digital and RF)

– Connectors and connector launch transitions – EMI – Multi Chip Module (MCM) packaging – PCIe®

– 10, 12, 14, 28 and 56 Gbps systems – IBIS model support available via teraspeedlabs.com

* PCIe® is a registered trademark of PCI-SIG®.

We use electromagnetic solvers, simulation software, and methods that have been validated against theory and practice with precise measurement techniques valid to 50 GHz.

electromagnetic modelingMODELING, SIMULATION, TESTING & MEASUREMENT

signal & power integrityANALYSIS, DESIGN, ENGINEERING & VERIFICATION

Our signal and power integrity capabilities include:

– Channel analysis, optimization and design – Backplane design – Copper / cable / optical interconnect engineering – Single-ended & differential bus design – Statistical and IBIS-AMI analysis – Future-proof design for the highest possible data rates

We provide advanced signal integrity engineering to companies worldwide. We believe in pushing the envelope of performance and sharing our experiences with others. Our Signal and Power Integrity services encompass all areas of package, board, enclosure and system engineering and verification.

VITA 68 Serial Channel Modeling

Driver Receiver

ConnectorInterface

Backplane

FX4 ModelA-J

FX4 ModelZ-R

ConnectorInterface

Backplane Model J-R

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– Multi-gig system design

– Layout & routing strategies

– Power integrity

– Printed Circuit Boards

– Basic & advanced IBIS training

– Vias

– S-parameters

– Basic signal integrity

– SERDES & PLL jitter measurement

– Advanced package modeling and simulation

– System design, routing, crosstalk

PLUS: Gain a Design Advantage with SI Training from the ExpertsTeraspeed® Consulting offers professional signal integrity classes for the beginner to the advanced user. Standard programs are one to three days, and custom classes may be arranged from one day to one week in duration. For detailed information, visit teraspeed.com. Examples of course topics include:

thermal managementSOLUTIONS FOR HIGH DENSITY / HIGH POWER SYSTEMS

As systems get smaller and power requirements increase, proper design for both electrical and thermal management has become increasingly vital. Teraspeed® Consulting can help ensure your system's performance and reliability by analyzing and modeling your system in real time under specific conditions.

Our capabilities and methods include:

– Temperature rise and distribution analysis and modeling – Determination of thermal hot spots – IR thermography – Thermal characterization – Thermal performance testing – Electrical characterization testing – Electrical performance testing – Mechanical testing – Environmental testing

Whether we provide an unbiased evaluation of your design, help to solve a difficult thermal, power or signal integrity engineering problem, or develop a system from concept to fabrication, our goal is to help your team meet all your objectives: design performance, time-to-market and cost effectiveness.

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scott mcmorrow

SI Consultant,Research & Development

rod strange

Business Management,Fast Edges™ Training & Consulting

175+ Years of Signal Integrity

Experience

rod strangeBusiness Management, SI Training & Consulting

Rod holds BSEE and MSEE degrees, as well as a BS in psychology, and has over 20 years experience as a signal integrity engineer. During his seven years as a consultant for Intel, he was contracted to write a signal integrity class for Intel’s engineers.

Since then, Rod has presented his Fast Edges™ training courses to more than 50 companies throughout the world. Rod consults as a signal integrity engineer for seven months of the year, and presents for the other five. After each high speed consulting project, he incorporates the design issues into his classes so the material is always current.

Past clients include Nokia (Finland), Lucent (US, Europe, Brazil), IBM, Philips, Tektronix, Boeing, Rockwell, Dell, HP, Motorola, Samsung (Korea), Siemens, NSA, BAE Systems, Barco, Northrop Grumman, Intel, RIM and EADS.

Rod is available to lead one, two or three day classes on signal integrity and high speed methodology.

From the design engineer with little high speed system experience, to the signal integrity veteran that wants to learn 28 Gbps to 56 Gbps guidelines from the experts, Rod can provide the signal integrity training your team requires.

scott mcmorrowSI Consultant, Research & Development

Scott is an expert in high-performance design with over 20 years of broad background in complex system design, interconnect and signal integrity engineering, modeling and measurement methodology, and professional training.

He has a consistent history of delivering and managing technical consultation that enables clients to manufacture systems with state-of-the-art performance, enhanced design margins, lower cost and reduced risk.

Through his work as an SI consultant, Scott has analyzed multiple DDR3-type systems with multiple ranks of stacked die packaging, using statistical integrity analysis to determine worst case performance compared to define limits. Scott's previous experience also includes the statistical analysis of performance system links, including planes, cables and serial channels, and using this analysis to determine worst case operational reliability and performance limits, as well as performance of data rate studies. He is also experienced in power analysis of complete systems with silicon packages and printed circuit boards, including characterization of knee requirements for any active device, including those dealing with hundreds of watts.

As Teraspeed Consulting, A Division of Samtec, we have brought together some of the brightest minds in the signal integrity field, with combined electrical engineering, EMC, package, board, enclosure and system design experience of over 175 years.

teraspeed® consultantsSIGNAL INTEGRITY EXPERTISE FROM SILICON-TO-SILICON

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wayne nunn

SI Consultant

wis macomson

SI Consultant

ed sayre

NESA System Consultant

wayne nunnSI Consultant

Wayne has over 30 years of semiconductor packaging experience focusing on the advancement of packaging technologies since 1983.

His experience includes work with Trilogy Systems, Digital Equipment Corp, Philips Semiconductors , MicroModule Systems, VLSI Technology, as well as NXP Semiconductors.

Wayne's expertise spans the modeling and signal integrity of packaging interconnects, modeling strategies, optimization of both leadframe and laminate package architectures, as well as gate array and PCB physical design.

Wayne holds three US patents, and has provided educational seminars related to physical design strategies, as well as the electrical impacts of poor interconnect and power domain design.

wis macomsonSI Consultant

Wis holds a BS in electrical engineering from MIT and is a licensed professional engineer in Oregon.

The first part of his career was in hardware design, initially in disk controller hardware and microprocessor development systems. Wis later joined a consulting firm and designed hardware and firmware for numerous embedded systems. He continued this as a self-employed system design consultant.

For the past 15 years, Wis has focused on signal integrity, working for Intel on various incarnations of the frontside bus and other interfaces on server processors.

Most recently, he has worked on high speed differential buses (PCIe®, SATA, USB, Gigabit Ethernet) as well as DDR3/4.

ed sayreNESA System Consultant

Dr. Sayre holds a BEE, an MEE, and a PhD in electrical engineering. He has held a number of academic faculty positions in electrical engineering, and in 1973 established NESA, a leading design firm for Gigabit links and interconnects over PCBs, as well as cable for Fibre Channel, InfiniBand™, CX4 and Gigabit Ethernet protocols.

Previously, Dr. Sayre designed microwave antennas and electromagnetic systems for AVCO Systems Division where he was an inventor of the Space Shuttle Microwave Landing Antennas, as well as the developer of numerous conformal microwave stripline antenna structures. He also served as R & D officer in the US Air Force where he was responsible for high-resolution radar system developments.

5 industry leaders

SEPTEMBER 2014

Toll Free: +1-844-483-7773 (4TERSPD) USA & CanadaTel: +1-812-981-8398

inquire@teraspeed.com | www.teraspeed.com

A Division of Samtec