silicon photomultipliers technology at fondazione bruno

G. Paternoster 1 of 12ESSDERC 2019 - Cracow

Silicon Photomultipliers Technology at Fondazione Bruno Kessler and 3D

Integration Perspectives

G. Paternoster*, L. Ferrario, F. Acerbi, A. Gola, P. BelluttiE-mail: [email protected]

Fondazione Bruno Kessler, Trento, Italy

September 24th 2019


Outline

A Brief Introduction to FBK

FBK SPAD/SiPMs technology as a versatile platform for specific applications◼ NUV-HD SiPM for ToF-PET

◼ SiPMs for Cryogenic applications

◼ SiPM for VUV light detection

◼ SiPMs for NIR light detection

FBK roadmap 3D-integrated SPAD/SiPM◼ FSI

◼ BSI

Conclusions


Fondazione Bruno Kessler

+600 RESEARCHERS

7RESEARCHCENTRES

+100INTERNATIONALPHD STUDENTS


Fondazione Bruno Kessler

SPDsilicon pixel detectors

SSDsilicon strip detectors

SDDsilicon drift detectors

Silicon-based detector in full-custom technology

3D detectorsLow Gain Avalanche

DetectorsSPADs & SiPM


SPADs and SiPMs

SPAD = Single Photon Avalanche Diode (working in Geiger-mode with single photon counting capabilities). Available in:

◼ Full-Custom Technology

◼ CMOS Technology

SiPMs = thousands of SPADs connected in parallel – thus behaving like a single detector, but with single-photon counting capability Available in:

◼ Full-Custom Technology

◼ Digital SiPM d-SiPM (CMOS)


SPAD and SiPMs

SiPM and SPADs in Custom technology.

◼ Optimized process-flow• Engineered electric field• Dedicated annealing steps• Not-standard steps and materials

Advantages

◼ High efficiency

◼ Low noise

◼ High flexibility

Disadvantages

◼ Read-out demanded to external electronics

◼ More complicated packaging and system integration


Silicon Photomultiplier Technology

P-on-n or n-on-p junction technologies -> NUV-HD or visible (RGB-HD) light detection

Engineered High-Field Region and virtual guard-ring to control electric Filed and breakdown

Integrated Poly-Silicon quenching Resistor

FBK HD-SiPM Technology


Silicon Photomultiplier Technology

< 3 um

DeepTrench

Trenches between cells → Lower Cross-Talk

Cell pitch: 15 – 40 um

Narrow dead border region → Higher Fill Factor (>80%)

Make it simple: 9 lithographic steps


NUV-HD SiPM

Specifically designed to match the LYSO emission peak at 420nm (ToF-PET applications)

Performance at the stateof-the-art:

PDE approach 60% (CS=40um)

DCR = 100 kHz/mm2

(0.1 cps um2)

Cross-talk = 20%

▪ Photo Detection Efficiency

▪ Dark Count Rate ▪ Direct Cross-talk


NUV-HD SiPM FoM

RGB-HDNUV-HD

NUV-HD-Cryo VUV-HD

SiR-SiPM

UHD

Optimized NUV-HD for cryogenic applications

extended sensitivity in the VUV region

Ultra High Density SiPM (cells down to 5um)

Novel SiPM scheme with integrated

quenching resistor

NIR-HD

extended sensitivity in the NIR region

HD-SiPM is a versatile technology platform that could evolve in different specific technologies to cope with specific requirements


SiPM for Cryogenic Applications

Developed for the read-out of Liquid noble gases scintillators (netrino end rare events searching experiments)

Requirements:◼ Extreme low noise at LAr

temperatures (< 87K)

◼ Preserve PDE at 420nm

Standard NUV-HD

Tunneling

Thermal generation

Dark Count Rate vs Temp


SiPM for Cryogenic Applications

Optimized doping profile to get a lower and wider high-field region, thus decreasing generation via tunneling effect

Standard NUV-HD

Dark Count Rate vs Temp

NUV-HD-Cryo 0.3 counts per day

per cell at 77 K!

> 2

0 x

A 10x10 cm2 SiPM array would have a

total DCR < 100 cps!


SiPM for Vacuum Ultra Violet

MultistackSi3N4/SiO2

ARC

SiPM for Vacuum Ultra Violet Light Detection (< 200 nm)

Developed for LXe and LArscintillation light readout (175 nm, 125 nm)

Abs. depth

PDEVIS

NUV

UV

Optical losses in VUV Ultra-shallow photon absorption


SiPM for Vacuum Ultra Violet

New ARC for VUV light

New ultra-shallow junction

High surface passivation quality

Photo Detection Efficiency @ 175 nm in LXe

nEXO experiment

VUV ARC

NUV ARC


SiPM for Near Infra-Red

NIR light with energy closer to the Si bandgap interacts deeper in the substrate

Thicker epi-Silicon is used to increase absorption

Multiple trenches for CT mitigation

Electrical Field re-design for better lateral charge collection.

NIR-HD technology Primary DCR in the order of ~1Mcps/mm2

Direct CT: ~10÷20%

PDE:

▪ 17% ÷ 20% @850nm

▪ 11% ÷ 13% @900nm


Technology Transfer to CMOS Foundry

HD-SiPM technologies have been recently transferred to External Foundry for mass production

and licensed to Broadcom for commercialization

▪ FBK vs Lfoundry: similar FoMand performance

4x4 mm2

SiPM with TSV

1.6 x 1.6 cm2 Array


Roadmap for 3d-integrated SPADs & SiPMs

Standard SiPM TSV SiPM Full-3D-integrated

1 channel

1 channel

Thousands of channels(1 chn per pixel)

3d integrated SPADs:

◼ better sensitivity

◼ more functionality per pixel

◼ each tier can be independently optimized using dedicated processe


3D Integrated CMOS SPAD

CMOS SPAD-array

CMOS read-out electronics

Pixel electronics

Pixel Active Area

A few attempts of BSI 3d integrated CMOS SPAD have been done in past years

Typical PDE:

◼ 600nm < 30%

◼ PDE at NUV < 5% (20% at 400nm has been recently demonstrated with SOI BSI Spad)

*Taken from Lee, M.-J., Sun, “First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology” . IEEE Journal of Selected Topics in Quantum Electronics 2019


3D Integration Roadmap at FBK

In the Framework of IPCEI project, FBK proposed an R&D aimed at developing an hybrid sensor integrating:

◼ SPAD in Custom Technology

◼ CMOS read-out electronics

CUSTOM SPAD-array

CMOS read-out electronics

Main Advantages:

◼ Preserving the performance in terms of PDE and DCR of SPADs in custom technology

◼ Adding some functionality at pixel level and further electronics at chip level



Front Side Illumination for NUV/VUV

Pro:◼ Much shallower

junction depth

◼ Unaffected device performance

Read-out elec.

Cons:◼ TSV connections

◼ FF losses due to TSV and BEOL

Pro:◼ 100% FF

◼ TSV-free

Cons:◼ Deeper junction

not suited for NUV/VUV

Read-out elec.

Back Side illumination for Visible/NIR



1. Isolation Trenches and TSV done during the FEOL process (no additional steps required) and W filled

2. Wafer bonding to Glass3. Thinning down to

expose TSV4. Contacts and routing5. Conductive bonding to

CMOS readout (Cu-Cu or u-bumps)

1a 1b

2 3

4 5

TSV

TrenchesSPAD active area

Epi layer

substrate

Front Side Illumination for NUV/VUV

Read-out CMOS



1 2

3 4

1. Direct Hybrid Bonding (DBI) to CMOS electronics

2. Wafer thinning4. Surface Passivation (laser annealing, MBE)

Back Side illumination for Visible/NIR

Read-out CMOS

Read-out CMOS

SPAD wafer


Conclusions

FBK SiPM Technology has been presented and described

SiPM in custom technology can still play an important role thanks to its unachieved performance and versatility to cope with specific requirements: i) VUV; ii) NIR; iii) cryogenic applications

3d vertical integration of SPADs in custom technology to CMOS electronics can combine the good performance of Custom SPADS to all the practical advantages and integrated functionalities of full-CMOS devices.

The FBK IPCEI R&D roadmap for 3d-integrated SPADs has been presented


Acknowledgements

This work is funded by the Italian Ministery “Ministero dello sviluppoeconomico” (MISE) in the frame of the “Important Project of Common European Interest (IPCEI)”.

Thank you for your attention

silicon photomultipliers technology at fondazione bruno

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