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Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002 P. Riedler ALICE Silicon Pixel Team CERN

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Page 1: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

Silicon Pixel and Strip Detectors for LHC

Experiments

1st Coordination Meeting of the CBM Experiment at the future GSI facilityGSI, Nov. 15-16, 2002

P. Riedler ALICE Silicon Pixel Team

CERN

Page 2: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

GSI - 15/11/2002 P.Riedler - CERN 2

Acknowledgements:

M. Campbell, P. Collins, H. Dijkstra, F. Faccio, H. Pernegger, G. Stefanini and the ALICE SPD Team

Page 3: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

GSI - 15/11/2002 P.Riedler - CERN 3GSI - 15/11/2002 P.Riedler - CERN 3

ALICE Silicon Pixel TelescopeReconstructed event: Testbeam 2002

- The LHC and its experimentsOutline

- Radiation damage in silicon- Electronics - Detectors

- A closer look at the ALICE SPD

Page 4: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

GSI - 15/11/2002 P.Riedler - CERN 4

Page 5: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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• head-on collisions of protons (7TeV on 7 TeV) • and heavy ions

Lmax~1034cm-2 s-1

(4cm)~3 1015 (neq) cm-2 in 10 years (>85% charged hadrons)! RADIATION DAMAGE !

The LHC and its Experiments

Detectors for LHC under full construction nowInstallation: 2006, First Beam: 2007

=> RD groups (e.g. RD48, now RD50) already work on solutions for next generation of detectors

Page 6: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

GSI - 15/11/2002 P.Riedler - CERN 6

Page 7: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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2 general purpose detectors:

Higgs in SM and in MSSM, supersymmetric Particles, B physics (CP violation, ...),…

ATLAS CMS

Strips: 61m2, 6.3 x 106 channels

Pixels: ~2m2, 80 x 106 channels

210m2, 9.6 x 106 channels

~2m2, 33 x 106 channels

Page 8: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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CP violation and rare decaysHeavy ion physics

ALICE LHCb

Strips: 4.9m2, 2.6 x 106 channels

Drifts: 1.3m2, 1.33 x 105 channels

Pixels: 0.2m2, 9.83 x 106 channels

VELO: 0.32m2, 2 x 105 channels

Tracker: 14m2, ~8 x 105 channels

HPD: ~ 0.02m2, ~1 x 106 channels

Page 9: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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Silicon Strip Detectors

Al strip

amplifier

SiO2/Si3N4

+ Vbias

+

+

+

+--

- n bulk

p+

n+

Each strip is connected to one readout channel

• N-in-n detectors• Double sided detectors• Floating intermediate strips• …

Silicon Pixel Detectors

Chip

Detector

• 2-dim matrix of cells• Each cell is connected to its own processing electronics• high granularity

Page 10: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

GSI - 15/11/2002 P.Riedler - CERN 10

Radiation Damage in Silicon

Surface Damage Bulk Damage

e.g. ATLAS Pixel Detector

Electronics

Sensitive components are located close to the surface

Detectors

Full bulk is sensitive to passing charged particles

Page 11: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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Electronics

Cumulative Effects Single Event Effects (SEE)

Total Ionizing Dose (TID)Ionisation in the SiO2 and SiO2-Si interface creating fixed charges (all devices can be affected)

Displacement Defects(bipolar devices, opto-components)

Permanent (e.g. single event gate rupture SEGR)

Static (e.g. single event upset SEU)

Transient SEEs

In the following the effects of TID only will be discussed :

Page 12: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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Total Ionizing Dose

Ionization due to charged hadrons, , electrons,… in the SiO2 layer and SiO2-Si interface • Fixed positive oxide charge• Accumulation of electrons at the interface• Additional interface states are created at the SiO2-Si border

R. Wunstorf, PhD thesis 1992

Page 13: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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E.g.: transistor level leakage and threshold voltage shift

Parasitic channel between source and drainF. Faccio, ELEC2002

Threshold voltage shift, transconductance and noise degradation, source drain leakage, leakage between devices

Effects of TID in CMOS devices

Page 14: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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Radiation Levels in some LHC experiments

total dose fluence 1MeV n eq. [cm-2] after 10 years

ATLAS Pixels 50 Mrad 1.5 x 1015

ATLAS Strips 7.9 Mrad ~2 x 1014

CMS Pixels ~24Mrad ~6 x 1014 *CMS Strips 7.5Mrad 1.6 x 1014

ALICE Pixel 500krad ~2 x 1013

LHCb VELO - 1.3 x 1014/year**

*Set as limit, inner layer reaches this value after ~2 years

**inner part of detector (inhomogeneous irradiation )

A radiation tolerant design is important to ensure the functionality of the read out over the full life-time!

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Solution - Technology Hardening

D

A

C

B

Flatband-voltage shift as function of the oxide thickness

After N.S. Saks, M.G. Ancona, and J.A. Modolo, IEEE Trans.Nucl.Sci., Vol. NS-31 (1984) 1249

• Tunneling of trapped charge in thin oxides

•VT ~ 1/tox2 for tox > 10nm

•VT ~ 1/tox3 for tox < 10nm

Page 16: Silicon Pixel and Strip Detectors for LHC Experiments 1 st Coordination Meeting of the CBM Experiment at the future GSI facility GSI, Nov. 15-16, 2002

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Using a 0.25µm CMOS process reduces th-shift significantly

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Enclosed geometrie to avoid leakage

Gate

S D

Standard Geometry

Leakage path

SD

Gate

Enclosed Geometry

Enclosed gate (S-D leakage)Guard ring (leakage between devices)

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F. Faccio, ELEC2002

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Front end technology choices of the different experiments

Technology Chip

ALICE Pixel 0.25µm CMOS ALICE1ALICE Strips 0.25µm CMOS HAL25ALICE Drift 0.25µm CMOS PASCALATLAS Strips DMILL ABCDATLAS Pixel DMILL->0.25µm CMOS FE-D25CMS Pixel DMILL->0.25µm CMOS PSICMS Strips 0.25µm CMOS APV25LHCb VELO DMILL/0.25µm CMOS SCTA/BeetleLHCb Tracker 0.25µm CMOS Beetle

Deep sub-µm means also: speed, low power, low yield, high cost

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Radiation Damage in Detectors

Surface Damage

• Creation of positive charges in the oxide and additional interface states.• Electron accumulation layer.

Bulk Damage

Displacement of an Si atom and creation of a vacancy and interstitial

• Point like defects (, electrons)• Cluster Defects (hadrons, ions)

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Macroscopic Effects

Bulk Damage

• Increase of leakage current• Increase of depletion voltage• Charge trapping

Surface Damage

• Increase of interstrip capacitance (strips!)• Pin-holes (strips!)

Effects signal, noise, stability (thermal run-away!)

• Annealing effects will not be discussed here.But: Do not neglect these effects, esp. for long term running!All experiments have set up annealing scenarios to simulate the damage after 10 years.

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Leakage current

M. Moll - Vertex 2002

Linear increase of leakage current with fluence:

Ivol=ne (=4-6 x 10-17 A/cm)

But:I prop. Exp(-Eg/2kT)

Cooling will help!e.g:ATLAS Strips: -7°CCMS Pixel: -8°C

P. Riedler Phd-thesis

ATLAS Strip detector

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Depletion Voltage

Type-Inversion:n-type bulk starts to behave like p-type bulk -> depletion from the backside of the diode!

Vdep increases with fluence (after inversion)

M. Moll - Vertex 2002

V

Before Inversion

depletion

depletionV

After Inversion

p+

n+

If depletion voltage has increased too so much that underdepleted operation is necessary-> charge loss and charge spread!

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Possible Solutions

1. n-in-n detectorsUnderdepleted operation is possible!

ATLAS pixelCMS pixel

LHCb VELO (special case)

Fluences close to 1015 cm-2

At LHC:Effi

ciency

n-in-np-in-n

ATLAS

NIM A 450 (2000) 297

ATLAS

Vbias

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2. Oxygenated Silicon

Defect engineering (RD48) - to reduce reverse annealing=> Lower depletion voltage can be expected after several years sunning (including warm-up times)

But: improvement only for charged hadrons and . No effect for neutrons observed.

Also: spread of depletion voltage of detectors from different suppliers can reduce the beneficial effect

ATLAS pixel uses oxygenated Si

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Further solutions to allow a reasonable operating voltages even after high fluences and annealing:

• Low resistive silicon• Thin detectors (also intersting for material budget reasons)• CZ starting material (under investigation)• <100> to reduce interstrip capacitance

Choice of LHC experiments:

ALICE pixel p-in-n standard FZATLAS pixel n-in-n oxygenatedATLAS strips p-in-n standard FZCMS pixel n-in-n standard FZCMS strips p-in-n standard FZ <100>LHCb VELO n-in-n standard FZ

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A closer look at the ALICE Silicon Pixel Detector (SPD)

z= 28.3 cmr= 3.9 cm & 7.6 cm

2 barrel layers

INFN Padova

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Sector - Carbon Fibre Support

The two barrels will be built of 10 sectors, each equipped with 6 staves:

stave

INFN Padova

INFN Padova

Material budget(each layer) ≈ 0.9% X0 (Si ≈ 0.37, cooling ≈ 0.3, bus 0.17, support ≈ 0.1)

(lowest material budget of all pixel detectors!)

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Bus

ALICE1LHCb chip

Carbon-fibre sector

Cooling tube

MCM

Grounding foil

Silicon sensor

Each Stave is built of two HALF-STAVES, read out on the two sides of the barrel, respectively.

Ladder: 5 chips+1 sensor

193 mm long

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12

34

56

READOUT CHIP

PIXEL DETECTORAluminumPolyimide

12

56

Glue

COOLING TUBE

11mm2mm

7 77 7SMD component

Bus:• 7 layer Al-Kapton flex• Wire bonds to the ALICE1LHCb chip

240µm

200µm

goal:150µm

M.Morel

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Analog Pilot:• Reference bias• ADC (T, V and I monitor)

Multi Chip Module (MCM)ALICE1LHCb chip

Data out

Clock

JTAG

APDP

GOL

Digital Pilot:• Timing, Control and Readout

Laser and pin diode

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• Mixed signal (analogue, digital)

• Produced in a commercial 0.25µm CMOS process

• Radiation tolerant design (enclosed gates, guard rings)

• 8192 pixel cells

• 50 µm x 425 µm pixel cell

• ~100 µW/channel

ALICE1LHCb chip

13.5 mm

15.8

mm

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Low minimum threshold: ~1000 electronsLow individual pixel noise:~100 electrons

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Class I: 42-75%Class II: 6-12%Class III: 17-42%(sample: 4 wafer, 750µm)

Production testing will start this autumn

Class I - Mean Threshold

Fully developed test system for wafers:

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Ladders and Assemblies

Chip

Detector Detectors:

• single chip detectors• 5 chip detectors for ladders• p-in-n• 300 µm thick(tests) - final thickness: 200µm

Chips:

• single chips• 750 µm thick (tests) - 150µm final

Bump-bonding:

• VTT/Finland Pb-Sn solder bumps

• AMS/Italy In bumps

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510

1520 25

50100

150200

50

100

150

200

250

50

100

150

200

250

Chip 2

chip0 chip1 chip2 chip3 chip4

First testbeam with full size ladder - July 2002

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Detector

Chips

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Chip 33Chip 43Chip 50Chip 53Chip 63

Sr-source measurement of thin ladder (300µm chip, 200µm detector)

Missing Pixels % missing % working

63 28 0.34 99.66

53 21 0.26 99.74

50 44 0.53 99.47

43 3 0.04 99.96

33 61 0.74 99.26

matrices

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Summary

• All LHC experiments use silicon detectors to improve their tracking capabilities (up to >200m2!).

• Installation foreseen in 2006.

• The high radiation environment demands radiation tolerant technologies for front end chips and detectors.

• Almost all silicon detectors use 0.25µm CMOS chips (future?).

• P-in-n and n-in-n detectors are used depending on the expected fluences and the annealing damage.

• The current challenges are the actual construction and integration of the detectors.