SINGLE-STAGE AMPLIFIERS

EMT451/4

AMPLIFIER : DEFINITIONS

Amplification the process of increasing an ac signal’s power

Amplifier The circuit that amplifies

Two Amplifier properties that are of interest to us: Gain Impedance

AMPLIFICATION?

Essential function in integrated circuits Signal too small:

to drive load Overcome noise of subsequent stage Provide the right level to the subsequent circuit (e.g. logic level)

Analyze large-signal & small-signal characteristics of single-stage amplifiers (CS, CG, CD, cascode) Goal: develop intuitive technique and fundamental models

Need to be able to simplify analysis yet maintain acceptable accuracy

Approach: simple model -> add second order phenomena (e.g. body effect, channel-length modulation)

TRADE-OFFS in ANALOG DESIGN

AMPLIFIER GAIN

Amplifier Ratio of output signal to input signal

Ratio < 1: attenuator Ratio = 1: buffer Ratio > 1: amplifier

3 types of gains associated with an amplifier Voltage gain Current gain Power gain

VOLTAGE GAIN

Defined as the ratio of ac output voltage to ac input voltage

Or, the mathematical expression:

In

OutV V

VA

CURRENT GAIN

Defined as the ratio of ac output current to ac input current

Mathematically, expressed as:

In

OutI I

IA

AMPLIFIER IMPEDANCE

When a signal (current or voltage) is fed into the input, a portion of it will not get through the amplifier. This is due to external resistance effects.

2 types of impedances associated with an amplifier:

Input impedance

Output impedance

SINGLE-STAGE AMPLIFIER

Single-stage amplifiers are used in virtually every op-amp design

By replacing a passive load (resistor) with a MOS transistor (called an active load), minimize chip area

Active load : produce higher values of resistance higher gain

Types of active load : G-D load and current source load.

COMMON-SOURCE STAGEwith resistive load

Common-source stage

Equivalent circuit in

deep triode region

Input-output

characteristic

Small-signal

model for saturation

region

ANALYSIS

If Vin is low (below threshold) transistor M1 is OFF

For Vin not-too-much-above threshold, transistor M1 is in Saturation, and Vout decreases.

For (Vin>Vin1) – M1 is in Triode Mode.

If Vin is high enough to drive M1 into deep triode region, Vout << 2(Vin – VTH)

2

2

1THinoxnDDDout VV

L

WCRVV

222

1outoutTHinoxnDDDout VVVV

L

WCRVV

Don

onDDout RR

RVV

THinDoxn

DDout

VVRL

WC

VV

1

Voltage gain

DmTHinoxnDin

outv RgVV

L

WCR

V

VA

Av 2nCoxW

L

VRD

ID

Design tradeoffs

Gain is determined by 3 factors: W/L, RD , DC voltage and ID

If current and RD are kept constant, an increase of W/L increases the gain, but it also increases the gate capacitance – lower bandwidth

If ID and W/L are kept constant, and we increase RD, then VDS becomes smaller. Operating Point gets closer to the borderline of Triode Mode.

It means – less “swing” (room for the amplified signal)

If ID decreases and W/L and VRD are kept constant, then we must increase RD

Large RD consumes too much space, increases the noise level and slows the amplifier down (time constant with input capacitance of next stage).

COMMON-SOURCE tradeoffs

Av gm ro || RD

Larger RD values increase the influence of channel-length modulation (ro term begins to strongly affect the gain)

Common Source Maximum Gain

Av gm ro || RD Av gmro

" intrinsic gain"

“Diode-Connected” MOSFET is only a name. In BJT if Base and Collector are short-circuited, then the BJT acts exactly as a diode.

COMMON-SOURCE STAGEwith diode-connected load

We want to replace RD with a MOSFET that will operate like a small-signal resistor.

mo

md

Xmo

XXX

gr

gR

Vgr

VIVV

1||

1

1

Common Source with Diode-Connected NMOS Load (Body Effect included)

Vx

Ix

1

gm gmb|| ro

1

gm gmb

(gm gmb)Vx Vx

ro Ix

CS with Diode-Connected NMOS Load Voltage Gain Calculation

Av gm1 1

gm2 gmb2

gm1

gm2

1

1

1

1

)/(2

)/(2

22

11

DOXn

DOXnv

ILWC

ILWCA

Av (W / L)1

(W / L)2

1

1

CS with Diode-Connected NMOS Load Voltage Gain Calculation

Av (W / L)1

(W / L)2

1

1

If variations of η with the output voltage are neglected, the gain is independent of the bias currents and voltages (as long as M1 stays in Saturation)

The point: Gain does not depend on Vin

Amplifier is relatively linear (even for large signal analysis!)

22

2

2

1

)(5.0)(5.0 THoutDDCnTH1inCn VVVL

WVV

L

WOXOX

)()( 221

THoutDDTH1in VVVL

WVV

L

W

Assumptions made along the way:

)()( 221

THoutDDTH1in VVVL

WVV

L

W

We neglected channel-length modulation effect We neglected VTH voltage dependent variations

We assumed that two transistors are matching in terms of COX.

Comment about “cutting off”

If I1 is made smaller and smaller, what happens to Vout?

It should be equal to VDD at the end of the current reduction process, or is it?

Comment about “cutting off” (cont’d)

If I1 is made smaller and smaller, VGS gets closer and closer to VTH.

Very near I1=0, if we neglect sub-threshold conduction, we should have VGS≈VTH2, and therefore Vout≈VDD-VTH2 !

Cutoff conflict resolved:

In reality, sub-threshold conduction, at a very low current, eventually brings Vout to the value VDD.

Output node capacitance slows down this transition. In high-speed switching, sometimes indeed Vout doesn’t

make it to VDD

Back to large-signal behavior of the CS amplifier with diode-connected NMOS load:

)()( 221

THoutDDTH1in VVVL

WVV

L

W

Large signal behavior of CS amplifier with diode-connected load

When Vin<VTH1 (but near), we have the above “imperfect cutoff” effect.

Then we have a, more or less, linear region. When Vin exceeds Vout+VTH1 amplifier enters the

Triode mode, and becomes nonlinear.

CS with Diode-Connected PMOS Load Voltage Gain

2

1

)/(

)/(

LW

LWA

p

nv

No body effect!

Numerical Example

Say that we want the voltage gain to be 10. Then:

100)/(

)/(

10)/(

)/(

2

1

2

1

LW

LW

LW

LWA

p

n

p

nv

Example continued

100)/(

)/(

2

1 LW

LW

p

n

Typically pn 2

Example continued

Need a “strong” input device, and a “weak” load device.

Large dimension ratios lead to either a larger input capacitance (if we make input device very wide (W/L)1>>1) or to a larger output capacitance (if we make the load device very narrow (W/L)2<<1).

Latter option (narrow load) is preferred from bandwidth considerations.

50)/(

)/(

2

1 LW

LW

CS with Diode-Connected Load Swing Issues

)(

||

)/(

)/(

2

1

TH1GS1

TH2GS2

p

nv

VV

VV

LW

LWA

,21 DD II

This implies substantial voltage swing constraint. Why?

2

2

2

1

)()( TH2GS2pTH1GS1n VVL

WVV

L

W

Numerical Example to illustrate the swing problems

Assume for instance VDD=3V Let’s assume that VGS1-VTH1=200mV (arbitrary

selection, consistent with current selection) Assume also that |VTH2|=0.7V (for PMOS load

VTH2=-0.7V) For a gain of 10, we now need |VGS2|=2.7V (for

PMOS load VGS2<-2.7V) Therefore because VGD2=0: VDS2=VGS2=-2.7V). Now VDS1=VDD-VSD2<3-2.7=0.3V, and recall that

VDS1>VGS1-VTH1=0.2V. Not much room left for the amplified signal vds1.

DC Q-Point of the Amplifier

VG1 determines the current and the voltage VGS2

If we neglect the effect of the transistors’ λ, the error in predicting the Q-point solution may be large!

CS with Diode-Connected Load –How do we take into account λ?

)||||1

21( oomb2m2

m1v rrgg

gA

)||||1

21(1 oo

m2v rr

ggA

m

Example as Introduction to Current Source Load

M1 is biased to be in Saturation and have a current of I1.

A current source of IS=0.75I1 is hooked up in parallel to the load – does this addition ease up the amplifier’s swing problems?

Example as Introduction to Current Source Load

Now ID2=I1/4. Therefore (from the ratio of the two transconductances with different currents):

2

1

)/(

)/(4

LW

LWA

p

nv

Example: Swing Issues

)(

||4

TH1GS1

TH2GS2A

VV

VVv

,4 21 DD II

It sure helps in terms of swing.

2

2

2

1

)(4)( TH2GS2pTH1GS1n VVL

WVV

L

W

COMMON-SOURCE STAGEwith current-source load

How can Vin change the current of M1 if I1 is constant?

As Vin increases, Vout must decrease

12

11 )1()(5.0 IVVV

L

WI outTH1inCnD OX

Simple Implementation: Current Source obtained from M2 in Saturation

CS with Current Source Load

)||( o2o1mv rrgA

DC Conditions

{(W/L)1,VG1} and {(W/L)2,Vb} need to be more or less consistent, if we wish to avoid too much dependence on λ values.

Need DC feedback to fix better the DC Vout

])[1()(5.0

)1()(5.0

22

22

212

11

DDoutTHDDbCp

DoutTH1inCnD

VVVVVL

W

IVVVL

WI

OX

OX

Swing Considerations

We can make |VDS2|>|VGS2-VTH2| small (say a few hundreds of mV), if we compensate by making W2 wider.

])[1()(5.0

)1()(5.0

22

22

212

11

DDoutTHDDbCp

DoutTH1inCnD

VVVVVL

W

IVVVL

WI

OX

OX

How do we make the gain large?

)||( o2o1mv rrgA

Recall: λ is inversely proportional to the channel length L. To make λ values smaller (so that ro be larger) need to

increase L. In order to keep the same current, need to increase W by the same proportion as the L increase.

CS Amplifier with Current-Source Load Gains

Typical gains that such an amplifier can achieve are in the range of -10 to -100.

To achieve similar gains with a RD load would require much larger VDD values.

For low-gain and high-frequency applications, RD load may be preferred because of its smaller parasitic capacitance (compared to a MOSFET load)

Numerical Example

Let W/L for both transistors be W/L = 100µm / 1.6µm

Let µnCox=90µA/V2, µpCox=30µA/V2

Bias current is ID=100µA

Numerical Example (Cont’d)

Let ro1=8000L/ID and ro2=12000L/ID where L is in µm and ID is in mA.

What is the gain of this stage?

Numerical Example (Cont’d)

4.81)||(

1921.0/6.112000

1281.0/6.18000

/06.1)/(2

211

2

1

11

oomV

o

o

DOXnm

rrgA

Kr

Kr

VmAILWCg

How does L influence the gain?

Av gm ro1 || ro2

Assuming ro2 large,

DDoxnomv IL

WICrgA

1

21

1

How does L influence the gain?

DDoxnomv IL

WICrgA

11

1

12

As L1 increases the gain increases, because λ1 depends on L1 more strongly than gm1 does!

As ID increases the gain decreases. Increasing L2 while keeping W2 constant increases ro2

and the gain, but |VDS2| necessary to keep M2 in Saturation increases.

21 ONmv RgA

)(

1

22

2THbDDL

Woxp

ONVVVC

R

COMMON-SOURCE STAGEwith triode load

How should Vb be chosen?

M2 must conduct: Vb-VDD≤VTH2, or Vb≤VDD+VTH2

M2 must be in Triode Mode: Vout-VDD≤Vb-VDD-VTH2, or Vb≥Vout+VTH2

M2 must be “deep inside” Triode Mode: 2(Vb-VDD-VTH2)>>Vout-VDD, or: Vb>>VDD/2+VTH2+Vout/2

Also Vb and (W/L)2 determine the desired value of Ron2

It’s not easy at all to determine (and implement) a working value

for Vb

CS Amplifiers with Triode Region load is rarely used

COMMON-SOURCE STAGEwith source degeneration

Av GmRD

Sm

Dmv Rg

RgA

1

Sm

mm Rg

gG

1

Summary of key formulas, neglecting channel-length modulation and body effect

CS Amplifier with Source Degeneration – Formula Explained

Sm

Dmv Rg

RgA

1

Dmout

Sm

in

SminSDin

RVgV

Rg

VV

RVgVRIVV

1

1

11

1

Idea is the same as that of adding emitter resistor to a BJT CE amplifier

With RS=0, the gain strongly depends on gm, and as we recall gm depends on the input’s amplitude, temperature and other effects.

If gmRS>>1, then AV≈-RD/RS

Sm

DmV Rg

RgA

1

CS Amplifier with Source Degeneration Key Formulas with λ and Body-Effect Included

Gm gm

RS

ro

[1 (gm gmb )RS ]

)||( OUTDmv RRGA

ROUT [1 (gm gmb )ro ]RS ro

Derivation is similar to that of the simplified case – generalized transconductance

oSmbmS

om

in

Dm

o

SDSDmbSDinm

o

SDXmbm

robsmbmD

rRggR

rg

V

IG

r

RIRIgRIVg

r

RIVgVg

IVgVgI

])(1[

)()(

1

1

IIt doesn’t matter what RD is because we treat ID as “input”

Linearizing effect of RS:

Av gm RD

1 gm RS

RD

1/ gm RS

Linearizing effect of RS:

For low current levels 1/gm>>RS and therefore Gm≈gm.

For very large Vin, if transistor is still in Saturation, Gm approaches 1/RS.

Av gm RD

1 gm RS

RD

1/ gm RS

Estimating Gain by Inspection

Denominator: Resistance seen the Source path, “looking up” from ground towards Source.

Numerator: Resistance seen at Drain.

Av gm RD

1 gm RS

RD

1/ gm RS

Example to demonstrate method:

Note that M2 is “diode-connected”, thus acting like a resistor 1/gm2

AV=-RD/(1/gm1+1/gm2)

RS effect on CS Output Resistance

roSXmbSXm

robsmbmX

IRIgRIg

IVgVgI

)(1

SXXSmbmXoX RIIRggIrV ))((

CS Output Resistance

ROUT [1 (gm gmb )ro ]RS ro

ROUT ro' ro [1 (gm gmb )RS ]

RS causes a significant increase in the output resistance of the amplifier

CS Amplifier with Source Degeneration Gain Formula with λ and Body-Effect Included

ROUT [1 (gm gmb )ro ]RS ro

Gm gm

RS

ro

[1 (gm gmb )RS ]

)||( OUTDmv RRGA

Derivation of Gain Formula

))([

)( 1

D

Soutmb

D

Soutinm

D

out

bsmbmD

outro

R

RVg

R

RVVg

R

V

VgVgR

VI

Derivation of Gain Formula

D

Souto

D

Soutmb

D

Soutinmo

D

out

SD

outoroout

R

RVr

R

RVg

R

RVVgr

R

V

RR

VrIV

])([

Now we can relate Vout to Vin - formula results

General Networks Result

Voltage gain in any linear circuit equals –GmRout

Gm is circuit transconductance when output is shorted to ground

Rout is output resistance when circuit’s input voltage is set to zero.

General Networks Result

–GmRout formula is useful if Gm and Rout can be determined by inspection.

Proof: Rout is Norton equivalent. Vout=-IoutRout

Gm=Iout/Vin, which leads to the result.