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ECE-‐606 Purdue University
ECE-‐606 Spring 2013 1
SOLUTIONS: ECE 606 Homework Week 12 Mark Lundstrom Purdue University (revised 4/18/13)
1) The energy band diagram for an MOS capacitor is sketched below. Assume T = 300K
and an oxide thickness of x0 = 1.1 nm. Answer the following questions using the delta-‐depletion approximation as needed. (Note that EF = Ei at the oxide-‐silicon interface.) (This problem is similar to prob. 16.7, Pierret SDF).
1a) Sketch the electrostatic potential vs. position inside the semiconductor. Solution:
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1b) Roughly sketch the electric field vs. position inside the oxide and semiconductor.
Solution:
Note: We assume that there is no charge in the oxide and no charge at the oxide-‐Si interface.
1c) Do equilibrium conditions apply inside the semiconductor? Explain
Solution:
YES. The oxide insures that no current flows, so the metal and semiconductor are two separate systems in equilibrium with possibly different Fermi levels. (Note: We assume that light is not shining on the semiconductor.)
1d) Roughly sketch the hole concentration vs. position inside the semiconductor.
Solution:
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1e) What is the hole concentration in the bulk?
Solution:
p x→∞( ) = nie Ei −EF( ) kBT = 1010e0.51/0.026 = 3.3×1018 cm-‐3
p x→∞( ) = 3.3×1018 cm-3
1f) What is the hole concentration at the surface?
Solution:
p x = 0( ) = nie Ei −EF( ) kBT = 1010e0 = 1×1010
p x = 0( ) = 1010 cm-3
1g) What is the surface potential?
Solution:
φS = φ x = 0( )−φ x→∞( ) = 0.51V
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1h) What is the gate voltage?
Solution:
The Fermi level in the metal aligns with the Fermi level in the semiconductor, so the gate voltage must be zero. (Note: The fact that there is a volt drop across the oxide and the semiconductor with VG = 0 indicates that there is a workfunction difference between the metal and the semiconductor.)
1i) What is the voltage drop across the oxide?
Solution:
The electric field at the surface of the semiconductor is given by eqn. (16.27) in SDF as:
E S =
2qN AφS
κ Sε0
We find the electric field in the oxide from:
κ oxE ox =κ SE S
so
E ox =
κ S
κ ox
2qN AφS
κ Sε0
The volt drop across the oxide is:
Δφox = x0E ox = x0
κ S
κ ox
2qN AφS
κ Sε0
alternatively we can write this as:
Δφox =
x0
κ oxε0
2qκ Sε0N AφS = −QD φS( )
Cox
where
QD φS( ) is the depletion charge in C/cm2 in the semiconductor and
Cox is the oxide capacitance in F/cm2
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Putting in numbers:
Cox =
κ oxε0
x0
= 3.9×8.854×10−14
1.1×10−7 = 3.6×10−6 F/cm2
We found the doping density in 1e) and the surface potential in 1g), so
QD = − 2qκ Sε0N AφS = − 2×1.6×10−19 ×11.8×8.854×10−14 × 3.3×1018 × 0.51
QD = −7.5×10−7 C/cm2
Δφox = −
QD φS( )Cox
= 7.5×10−7
3.6×10−6 = 0.21
Δφox = 0.21 V
2) Assume an MOS capacitor on a p-‐type Si substrate with the following parameters:
NA = 2.7 x 1018 cm-‐3 for the bulk doping oxide thickness: x0 = 1.1 nm QF = 0.0 (no charge at the oxide-‐Si interface) κ ox = 4 T = 300K VG = 1.0V
Also assume that the structure is ideal with no metal-‐semiconductor workfunction difference. Determine the following quantities by analytical calculations (assume
�
VG = 1.0V). You should use the delta-‐depletion approximation for these calculations. 2a) The flatband voltage, VFB
Solution: VFB = 0 because there is no workfunction difference and no charge at the interface.
2b) The surface potential, φS
Solution:
VG = φS + Δφox = φS −
QS φS( )Cox
= φS +2qκ Sε0N A
Cox
φS
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VG = φS + β φS β =
2qκ Sε0N A
Cox
= 0.295
φS + β φS −VG = 0 is a quadratic equation for φS
φS =
−β ± β 2 + 4VG
2 (take positive sign)
Putting in numbers, we find:
φS = 0.74 V
Is this greater than 2φF ?
φF =
kBTq
lnN A
ni
⎛
⎝⎜⎞
⎠⎟= 0.026× ln 2.7 ×1018
1010
⎛⎝⎜
⎞⎠⎟= 0.505
2φF = 1.01V
No, so our use of the depletion approximation for QS φS( ) in the first equation is justified, and
φS = 0.74 V
2c) The electric field in the oxide, E OX Solution:
Since there is no metal-‐semiconductor workfunction difference, the voltage on the gate is just 1V (no built-‐in voltage to worry about) and the voltage at the oxide-‐Si interface is 0.77V, so
E ox =
VG −φS
x0
= 1− 0.741.1×10−7 = 2.4×106 V cm
Alternatively, we could do it another way that would work even when there is a metal-‐semiconductor workfunction difference.
Gauss’s Law gives: κ oxε0E ox = −QS = −QB = 2qκ Sε0N AφS
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QB = − 2qκ Sε0N AφS = − 2×1.6×10−19 ×11.8×8.854×10−14 × 2.7 ×1018 × 0.74
QB = −8.17 ×10−7 C/cm2
E ox = −
QB
κ oxε0
= 8.17 ×10−7
4×8.854×10−14 = 2.35×106
E ox = 2.3×106 V/cm
(slight round-‐off error gives different answers)
2d) The electric field in the silicon at the surface, E S Solution:
At the oxide-‐Si interface, we have: κ oxε0E ox =κ Siε0E S
E S =
κ ox
κ Si
E ox =3.9
11.82.4×106( ) = 7.9×105
E S = 7.9×105 V/cm
2e) The depletion region depth, WD Solution:
WD =
2κ Sε0
qN A
φS = 2×11.8×8.854×10−14
1.6×10−19 × 2.7 ×1018 × 0.77
WD = 1.93×10−6 cm
WD = 19.3 nm
2f) The charge in the silicon, QS in C/cm2
Solution:
From the solution to 2c): QS = −8.34×10−7 C/cm2
QS = −8.34×10−7 C/cm2
HW Week 12 continued
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2g) The charge on the gate, QG in C/cm2
Solution:
Charge balance dictates that it must be equal and opposite to the charge in the semiconductor (there is no charge at the oxode-‐Si interface).
QG = −QS = +8.34×10−7 C/cm2
2h) The voltage drop across the oxide
Solution:
VG = Δφox +φS
Δφox =VG −φS = 1− 0.77 = 0.23 V
Δφox = 0.23 V
2i) The threshold voltage for this MOS capacitor Solution:
VT = 2φF −
QD 2φF( )Cox
= 1.01+2qκ Sε0N A 1.01( )
Cox
VT = 1.01+ 0.304 = 1.314 V
VT = 1.314 V
3) The gate electrode of an MOS capacitor is often a heavily doped layer of polycrystalline
silicon with the Fermi level located at EF ≈ EC for an n+ polysilicon gate and EF ≈ EV for a p+ polysilicon gate. Sketch the following four equilibrium energy band diagrams:
3a) An n-‐type Si substrate with an n+ polysilicon gate
Solution: (separated)
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A small electron transfer will occur from the gate to the semiconductor
Note: There is a little depletion in the polysilicon gate.
3b) An n-‐type Si substrate with a p+ polysilicon gate Solution: (separated)
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Electrons will transfer from the semiconductor to the gate.
Note: We again see some depletion in the polysilicon gate.
3c) A p-‐type Si substrate with an n+ polysilicon gate
Solution: (separated)
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Electrons will transfer from the gate to the semiconductor.
Note: The polysilicon gate shows some depletion here too.
3d) A p-‐type Si substrate with a p+ polysilicon gate
Solution: (separated)
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A small electron transfer will occur from the semiconductor to the gate.
Note: Polysilicon gate also depleted a little.
4) Consider an MOS capacitor with a gate oxide 1.2 nm thick. The Si substrate doping is
N A = 1018 cm-‐3. The gate voltage is selected so that the sheet density of electrons in the
inversion layer is nS = 1013 cm-‐2. Assume room temperature and that
Qi = qnS ≈ 2κ Siε0kBT ni2 NA e
+qφs /2kBT . Answer the following questions.
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4a) What is the surface potential? Compare it with 2φF .
Solution:
e+qψ s /2kBT = qnS2κ Siε0kBT ni
2 NA
φS =2kBTq
ln qnS2κ Siε0kBT ni
2 NA
⎛
⎝⎜
⎞
⎠⎟
Putting in numbers: φS = 1.11V
Now compare this to 2φF :
2φF = 2× 0.026ln 1018
1010
⎛⎝⎜
⎞⎠⎟= 0.958
φS − 2φF = 1.11− 0.96 = 0.15
φS − 2φF = 5.8 kBT q( )
The actual surface potential under strong inversion is about 6 kBT/q bigger than 2φF .
4b) How much does the surface potential need to increase to double the inversion layer
density? Solution:
From: φS =2kBTq
ln qnS2κ Siε0kBT ni
2 NA
⎛
⎝⎜
⎞
⎠⎟ with nS = 2 ×10
13 , we find
φS = 1.14 so
ΔφS = 0.03V
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4c) How much does the gate voltage need to increase to double the inversion layer
density? Solution: ΔVG = ΔφS + Δφox
Δφox ≈ − ΔQi
Cox
Cox =κ oxε0xo
= 2.88 ×10−6
Δφox ≈ − ΔQi
Cox
= q ×1013
2.88 ×10−6 = 0.56 V
ΔVG = ΔφS + Δφox = 0.03+ 0.56 = 0.59 V
ΔVG = 0.59
4d) Explain in words why it is difficult to increase the surface potential for an MOS
capacitor above threshold.
Solution: It takes only a small amount of additional band bending in the semiconductor to double the inversion layer charge because the inversion layer charge increases exponentially with surface potential.
The increased inversion layer charge leads to a large increase in the electric field in the oxide, which increases the volt drop in the oxide and as a result, the gate voltage. So above threshold, it take a large increase in the gate voltage to increase the surface potential a little bit, because most of the increase in gate voltage is lost in the volt drop across the oxide.
5) The body effect coefficient, m = 1+CS Cox( ) , is an important MOS parameter. Typical values are said to be 1< m <1.4 , but since m varies with gate bias, we should ask what bias these typical numbers refer to. Consider an MOS capacitor with a gate oxide 1.2 nm thick. The Si substrate doping is N A = 1018 cm-‐3 and answer the following questions. (Assume room temperature conditions).
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HW Week 12 continued 5a) Compute m for below threshold conditions. Assume that the depletion layer width is
W φS( ) =W 2φF( ) =WT .
Solution:
WT =
2κ Sε0
qN A
2φF 2φF = 2× 0.026ln 1018
1010
⎛⎝⎜
⎞⎠⎟= 0.958
WT =
2κ Sε0
qN A
2φF = 3.54×10−6 cm
CS = CD = κ Siε0WT
= 2.95 ×10−7
Cox =κ oxε0xo
= 2.88 ×10−6
m = 1+CS Cox( ) = 1+ 0.295 2.88( ) = 1.10
m = 1.10 below threshold
5b) Compute m for above threshold, strong inversion conditions. Assume that the sheet
density of electrons in the inversion layer is nS = 1013 cm-‐2 and that
Qi = qnS ≈ 2κ Siε0kBT ni2 NA e
+qφs /2kBT .
Solution:
CS = − dQS
dφs≈ − dQi
dφs=
2κ Siε0kBT ni2 NA e
+qφs /2kBT
2kBT / q=
Qi
2kBT q
CS =Qi
2kBT q= 1.6 ×10
−19 ×1013
0.052= 30.8 ×10−6
m = 1+CS Cox( ) = 1+ 30.8 2.88( ) = 11.7
m = 11.7 above threshold 5c) Use the results from 5a) and 5b) to explain why the surface potential is easy to change
with a gate voltage below threshold but hard to change above threshold.
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Solution: We have two capacitors in series, an oxide capacitance and a semiconductor capacitance. If a gate voltage is applied to the top (oxide capacitance), then the voltage that gets to the semiconductor (the surface potential) is the voltage dropped across the semiconductor capacitance:
φS =
VG
m m = 1+CS Cox( )
Below threshold, CS is small, m ≈1, so most of the gate voltage is dropped across the semiconductor. Above threshold, CS is large, m >>1 , so most of the gate voltage is dropped across the oxide – very little across the semiconductor, so it is hard to change the band bending in the semiconductor.