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SRI SIDDHARTHA INSTITUTE OF TECHNOLOGY

(A Constituent College of Sri Siddhartha Academy of Higher Education)

Master of Technology in Digital Electronics

2018-19

I Semester

Subject Code Subject L – T – P – C

Marks for

CIE SEE Total

18MDEL11

Digital Circuits & Logic Design 4 - 0 - 0 - 4 50 100 150

18MDEL12

Advanced Engg. Mathematics 4 - 0 - 0 - 4 50 100 150

18MDEL13

CMOS VLSI Design 4 - 0 - 0 - 4 50 100 150

18MDEL14

Advanced Embedded Systems 4 - 0 - 0 - 4 50 100 150

18MDEL15x Elective-I

4 - 0 - 0 - 4 50 100 150

18MDEL16 Technical Seminar -I

0 - 0 - 0 - 2 50 -- 50

18MDEL17 DCLD Lab

0 - 0 - 3 - 1 50 -- 50

Total Credits 20 -0 – 3 - 23 350 500 850

Elective-I 18MDEL151 Advanced Computer Architecture 18MDEL152 Automotive Electronics 18MDEL153 SOC Design

II Semester

Subject Code Subject L – T – P – C

Marks for

CIE SEE Total

18MDEL21 Modern DSP

4 - 0 - 0 - 4 50 100 150

18MDEL22 Synthesis & Optimization of

Digital Circuits 4 - 0 - 0 - 4 50 100 150

18MDEL23 Multimedia Systems

4 - 0 - 0 - 4 50 100 150

18MDEL24 Advances in VLSI Design 4 - 0 - 0 - 4 50 100 150

18MDEL25x Elective-II 4 - 0 - 0 - 4 50 100 150

18MDEL26 Technical Seminar -II 0 - 0 - 0 - 2 50 -- 50

18MDEL27 Advanced DSP Lab

0 - 0 - 3 - 1 50 -- 50

Total Credits 20 -0 – 3 - 23 350 500 850

Elective – II

18MDEL251 Embedded WSN 18MDEL252 Image Processing 18MDEL253 Real Time Operating Systems

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SRI SIDDHARTHA INSTITUTE OF TECHNOLOGY

(A Constituent College of Sri Siddhartha Academy of Higher Education)

Master of Technology in Digital Electronics

2018-19

III Semester

Subject

Code Subject L – T – P – C

Marks for

CIE SEE Total

18MDEL31 Internship

0 - 0 - 0 - 10 100 --- 100

18MDEL32 Project Work Phase-I

0 - 0 - 0 - 09 50 -- 50

Total Credits 0 -0 – 0 - 19 150 --- 150

Note:

Internship: Report evaluation on Internship (50 Marks) Viva – Voce and Evaluation of Internship (50 Marks) Project Work Phase-I: Literature Survey/Visit Industry to finalize the topic of the project and presentation of the same (50 Marks) IV Semester

Subject

Code Subject L – T – P – C

Marks for

CIE SEE Total

18MDEL41X Elective-III

4 - 0 - 0 - 4 50 100 150

18MDEL42X Elective –IV 4 - 0 - 0 - 4 50 100 150

18MDEL43 Project Work Phase-II

0 - 0 - 0 - 15 100 200 300

Total Credits 8 -0 – 0 – 23 200 400 600

Elective – III 18MDEL411 DSP Integrated Circuits 18MDEL412 ASIC Design 18MDEL413 Reliability Engineering

Elective – IV 18MDEL421 Wireless & Mobile Communication 18MDEL422 Fuzzy Logic 18MDEL423 Embedded Control Systems

Note:

Project Work Phase-II:

1. Project work Seminar – I: Presentation of the project work carried out for the

first six weeks (50 Marks)

2. Project work Seminar – II: Presentation of the project work carried out for the next

eight weeks (50 Marks)

3. Project work evaluation taken up at the end of the IV semester.

Report Evaluation: Average of the marks evaluated by

internal and external examiners (125 Marks) Viva- Voce: Conducted and evaluated jointly by internal and external

examiners (75 Marks)

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Total Credits (I to IV Semester) 88

Total Marks (I to IV Semester) 2450

DIGITAL CIRCUITS AND LOGIC DESIGN

Subject Code: 18MDEL11 IA Marks: 50

No. Of Lecture Hours/Week: 04 Exam Hours: 03

Total No. Of Lecture Hours: 52 Exam Marks: 100

Review of digital concepts: Problem statement to truth tables, combinational logic, logic problems

simplification of Boolean functions, K-map, Quine-McCluskey method, Map entered variable.

7Hrs

Logic design: Analysis of combinational circuits, comparators, data selectors, Encoders – priority

encoder, Decoders – BCD to Decimal, Seven segment display, Sine generators, Design of high speed

adders – Ripple adder, Carry look ahead adder. 7Hrs

Functional Decomposition and Symmetric Functions: Functional Decomposition, Decomposition

by expansion, Test for decomposability, Decomposition charts, Symmetric networks, Properties of

symmetric functions, synthesis, complemented variables of symmetry, Identification of symmetric

functions. 7Hrs

Reliable Design and Fault Diagnosis Hazards: Fault Detection in Combinational Circuits, Fault-

Location Experiments, Boolean Differences, Fault Detection by Path Sensitizing, Detection of

Multiple Faults, Failure-Tolerant Design, Quadded Logic. 8Hrs

Introduction to synchronous sequential circuits and Iterative networks: Sequential circuits- The

finite state model- Memory element and their excitation functions, Synthesis of synchronous

sequential circuits, Iterative networks. 9Hrs

Capabilities, Minimization, and Transformation of Sequential Machines: The Finite- State

Model, Further Definitions, Capabilities and Limitations of Finite – State Machines, Equivalence and

Machine Minimization, Simplification of Incompletely Specified Machines. 8Hrs

Structure of Sequential Machines: Introductory Example, State Assignments Using Partitions, The

lattice of closed partitions, Reduction of the output dependency, Input independence and autonomous

clocks. 6Hrs

TEXT BOOKS:

1. Zvi Kohavi, “Switching and Finite Automata Theory”, 2nd Edition. Tata McGraw Hill

Edition

2. Charles Roth Jr., “Digital Circuits and logic Design”.

REFERENCES:

1. Parag K Lala, “Fault Tolerant and fault testable hardware design”, Prentice Hall Inc. 1985

2. E. V. Krishnamurthy, “Introductory theory of computer”, Macmillan Press Ltd, 1983.

3. Mishra & Chandrasekaran, “Theory of computer science – Automata, Languages and

Computation”, 2nd Edition, PHI, 2004.

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ADVANCED ENGINEERING MATHEMATICS




Linear Algebra-I: Introduction to vector spaces and sub-spaces, definitions, illustrative examples and

simple problems. Linearly independent and dependent vectors-definition and problems. Basis vectors,

dimension of a vector space. Linear transformations - definition, properties and problems. Rank-Nullity theorem (without proof). Matrix form of linear transformations -Illustrative examples.

11Hrs

Linear Algebra-II: Computation of Eigen values and Eigen vectors of real symmetric matrices-Given’s method. Orthogonal vectors and orthogonal bases. Gram-Schmidt orthogonalization process.

QR decomposition, singular value decomposition, least square approximations. 10Hrs

Calculus of Variations: Concept of functional-Eulers equation. Functional dependent on first and

higher order derivatives, functional on several dependent variables. Isoperimetric problems-variation

problems with moving boundaries. 10Hrs

Probability Theory: Review of basic probability theory. Definitions of random variables and

probability distributions, probability mass and density functions, expectation, moments, central

moments, characteristic functions, probability generating and moment generating functions-illustrations. Binomial, Poisson, Exponential, Gaussian and Rayleigh distributions-examples.

10Hrs Joint probability distributions: Definition and properties of CDF, PDF, PMF, conditional

distributions. Expectation, covariance and correlation. Independent random variables. Statement of

central limit theorem-Illustrative examples. Random process- Classification, stationary and ergodic

random process. Auto correlation function-properties, Gaussian random process. 11Hrs

TEXT BOOKS:

1. 1. David C.Lay, Steven R. Lay and J.J.McDonald: Linear Algebra and its Applications, 5th

Edition, Pearson Education Ltd., 2015. 2. E. Kreyszig, “Advanced Engineering Mathematics”, 10th edition, Wiley, 2015.

3. Scott L.Miller, DonaldG. Childers: “Probability and Random Process with application to

Signal Processing”, Elsevier Academic Press, 2nd Edition, 2013.

REFERENCES:

1. Richard Bronson: “Schaum’s Outlines of Theory and Problems of Matrix Operations”,

McGraw-Hill, 1988.

2. Elsgolts, L.:”Differential Equations and Calculus of Variations”, MIR Publications, 3rd Edition, 1977.

3. T.Veerarajan: “Probability, Statistics and Random Process“, 3rd Edition, Tata McGraw Hill

Co.,2008.

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CMOS VLSI DESIGN




MOS Transistor Theory: n MOS / p MOS transistor, threshold voltage equation, body effect, MOS device design equation, sub threshold region, Channel length modulation. mobility variation,

Tunneling, punch through, hot electron effect MOS models, small signal AC Characteristics, CMOS

inverter, βn / βp ratio, noise margin, static load MOS inverters, differential inverter, transmission gate, tristate inverter, BiCMOS inverter. (Text1) 11Hrs

CMOS Process Technology Silicon Semiconductor technology: an overview, basic CMOS

technology. A basic n-well CMOS process, The p-well process, twin tub process, silicon on insulator CMOS process enhancements: Interconnect, circuit elements; Resistors, Capacitors, bipolar

transistors, Thin film transistors,3DCMOS(Text1) 6Hrs

MOS Design Processes: MOS layers, stick diagrams, design rules and layout, symbolic diagrams.

Basic circuit concepts: Sheet resistance ,standard unit of capacitance concepts, delay unit time,

inverter delays ,driving capacitive loads, propagation delays, scaling of MOS circuits(Text4)

9Hrs

Basics of Digital CMOS Design: Combinational MOS Logic circuits-Introduction, MOS logic

circuits with depletion Nmos load, CMOS logic circuits, complex logic circuits, CMOS Transmission Gate. (Text2) 8Hrs

Sequential MOS logic Circuits - Introduction, Behavior of bi stable elements, SR latch Circuit, clocked latch and Flip Flop Circuits, CMOS D latch and triggered Flip Flop (Text2). 5Hrs

Dynamic Logic Circuits - Introduction, principles of pass transistor circuits, Voltage boot strapping

synchronous dynamic circuits techniques, Dynamic CMOS circuit techniques(Text2) 5Hrs

CMOS Analog Design: MOS Small-Signal Amplifier, common source amplifiers, CMOS inverter as

an amplifier, current mirrors, Differential pairs, simple CMOS operational amplifier (Text3) (11.6.1

to 11.6.6) 3Hrs

Dynamic CMOS and clocking: Introduction, advantages of CMOS over NMOS, CMOS\SOS technology’ CMOS\bulk technology, latch up in bulk CMOS, static CMOS design, Domino CMOS

structure and design, Charge sharing, Clocking- clock generation, clock distribution, clocked storage

elements.(Text5) 5Hrs

TEXT BOOKS:

1. Neil Weste and K. Eshragian, “Principles of CMOS VLSI Design: A System Perspective,”

2nd edition, Pearson Education (Asia) Pte. Ltd., 2000.

2. Sung Mo Kang & Yosuf Lederabic Law, “CMOS Digital Integrated Circuits: Analysis and

Design”,

3. CMOS VLSI Design: A Circuits and System perspective, Neil H E Weste, David Haris,Ayan,

Pearson Education, III Edition.

4. Douglas A Pucknell & Kamran Eshragian , “Basic VLSI Design” PHI 3rd Edition (original Edition –1994).

5. Eugene D Fabricius, Introduction to VLSI Design, Mc Graw Hill, International Edition

(Original Edition 1990).

REFERENCE:

1. Wayne, Wolf, “Modern VLSI design: System on Silicon” Pearson Education”, Second

Edition.

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ADVANCED EMBEDDED SYSTEMS




Typical Embedded System: Core of the Embedded System, Memory, Sensors and Actuators, Communication Interface, Embedded Firmware, Other System Components. Characteristics and

Quality Attributes of Embedded Systems. 8Hrs

Hardware Software Co-Design and Program Modelling: Fundamental Issues in Hardware

Software Co-Design, Computational Models in Embedded Design, Introduction to Unified Modelling

Language, Hardware Software Trade-offs. 8Hrs

Embedded Firmware Design and Development: Embedded Firmware Design Approaches,

Embedded Firmware Development Languages. 8Hrs

Real-Time Operating System (RTOS) based Embedded System Design: Operating System Basics,

Types of OS, Tasks, Process and Threads, Multiprocessing and Multitasking, Task Scheduling,

Threads, Processes and Scheduling: Putting them altogether, Task Communication, Task Synchronization, Device Drivers, How to Choose an RTOS. 10Hrs

The Embedded System Development Environment: The Integrated Development Environment

(IDE), Types of Files Generated on Cross-compilation, Disassembler / Decompiler, Simulators, Emulators and Debugging, Target Hardware Debugging, Boundary Scan. 10Hrs

Trends in the Embedded Industry: Processor Trends in Embedded System, Embedded OS Trends, Development Language Trends, Open Standards, Frameworks and Alliances, Bottlenecks.

8Hrs

TEXT BOOK:

1. Introduction to Embedded Systems, Shibu K V, Tata McGraw Hill Education Private

Limited, 2009

REFERENCE:

1. Embedded Systems – A contemporary Design Tool, James K Peckol, John Weily, 2008.

DIGITAL CIRCUITS AND LOGIC DESIGN LAB

Sub Code: 18MDEL17 0 – 0 – 3 – 1

L – T – P – C

1. Design and simulate a circuit for 8:1 mux.

2. Simulate a circuit of a 4-bit gray code to unsigned binary converter.

3. Design, simulate and rig up a 7-segment display.

4. Generate a digital sine wave in a hardware and display in CRO.

5. Decompose the given Boolean function & verify the functionality using the simulator.

6. Realize the symmetric circuit f=S1,3,6(x1,x2,….,x7) using appropriate hardware.

7. Develop a GUI for a sequence detector to detect the sequence “1010” and simulate using

suitable IDE.

8

8. Trace the logic for Traffic light control system, design the same using state machine concept and simulate the system.

9. Trace the logic for Water level indicator system, design the same using state machine concept

and simulate the system.

10. Design a circuit that has input, a transmit clock and an NRZ serial data signal and that

generates a Manchester encoded serial signal data as output.

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ELECTIVE – I

ADVANCED COMPUTER ARCHITECTURE




Parallel Computer Models: The State of Computing, Computer Development Milestones, Elements

of Modern Computers, Evolution of Computer Architecture, System Attributes to Performance,

Multiprocessors and Multicomputer Shared –Memory Multiprocessors, Distributed Memory

Multiprocessors, A Taxonomy of MIMD Computers, Multi vector and SIMD computers, Vector Supercomputers, SIMD Supercomputers. 6Hrs

Parallel Program and network properties: Conditions for parallelism ,data resource dependencies, Hardware & software parallelism, The role of compilers, Program partitioning and scheduling, grain

size &latency, Grain packaging and scheduling, Problems on grain packaging, Program mechanisms,

control flow &dataflow, demand driven mechanisms, Comparison of flow mechanisms, network properties and routing, Static connection networks, dynamic connection networks. 10Hrs

Advanced Processors: Advanced Processor technology, Instruction set architecture, CISC scalar

processors, RISC scalar processors, and Superscalar Processors, VLIW Architectures Vector and Symbolic processors. 8Hrs

Scalable multiprocessors: Scalability,: bandwidth scaling, latency scaling, cost scaling, physical

scaling, realizing programming models, primitive network transactions, shared address space, message pasiing, common challenges, Physical DMA; 8Hrs

Pipeling and superscalar techniques: Linear pipeline processors synchronous & assynchrous Processors, Cocking & timing control, speedup ,efficency,throughput, Reservation &latency analysis,

Collision free scheduling, Instruction execution phases, mechanisms for IP, Dynamic instruction

scheduling, Compiler arithmetic principles, Multifunctional arithmetic pipeline, static arithmetic pipeline. 12Hrs

Memory Hierarchy design: Review: Introduction; Cache performance; Cache Optimizations.

Memory Hierarchy design: Introduction; Advanced optimizations of Cache performance; Memory technology and optimizations. 8Hrs

TEXT BOOKS:

1. Hennessey and Patterson: “Computer Architecture A Quantitative Approach”, 4th Edition, Elsevier, 2007.

2. Kai Hwang: “Advanced Computer Architecture Parallelism, Scalability,

Programmability”, Tata McGraw-Hill, 2003. 3. David culler, J.P.singh, Anoop gupta, “Parallel computer architecture” Margon

Kauffman1999

REFERENCES:

1. John P Hayes; computer architercture & organization 1998

2. V rajaramanna , c s r murthy,; parallel computers ,phi 2000

10

AUTOMOTIVE ELECTRONICS




Automotive Fundamentals Overview – Four Stroke Cycle, Engine Control, Ignition System, Spark

plug, Spark pulse generation, Ignition Timing, Drive Train, Transmission, Brakes, Steering System, Battery, Starting System. Air/Fuel Systems – Fuel Handling, Air Intake System, Air/ Fuel

Management. 4Hrs

Sensors – Oxygen (O2/EGO) Sensors, Throttle Position Sensor (TPS), Engine Crankshaft Angular Position (CKP) Sensor, Magnetic Reluctance Position Sensor, Engine Speed Sensor, Ignition Timing

Sensor, Hall effect Position Sensor, Shielded Field Sensor, Optical Crankshaft Position Sensor,

Manifold Absolute Pressure (MAP) Sensor - Strain gauge and Capacitor capsule, Engine Coolant Temperature (ECT) Sensor, Intake Air Temperature (IAT) Sensor, Knock Sensor, Airflow rate sensor,

Throttle angle sensor. 12Hrs

Actuators – Fuel Metering Actuator, Fuel Injector, Ignition Actuator. 5Hrs

Exhaust After-Treatment Systems – AIR, Catalytic Converter, Exhaust Gas Recirculation (EGR),

Evaporative Emission Systems. 4Hrs

Electronic Engine Control – Engine parameters, variables, Engine Performance terms, Electronic

Fuel Control System, Electronic Ignition control, Idle sped control, EGR Control. 5Hrs

Communication – Serial Data, Communication Systems, Protection, Body and Chassis Electrical

Systems, Remote Keyless Entry, GPS. 5hrs

Vehicle Motion Control – Cruise Control, Chassis, Power Brakes, Antilock Brake System (ABS),

Electronic Steering Control, Power Steering, Traction Control, Electronically controlled suspension.

4hrs Automotive Instrumentation – Sampling, Measurement & Signal Conversion of various parameters.

Integrated Body – Climate Control Systems, Electronic HVAC Systems, Safety Systems – SIR,

Interior Safety, Lighting, Entertainment Systems. 5hrs

Automotive Diagnostics – Timing Light, Engine Analyzer, On-board diagnostics, Off-board

diagnostics, Expert Systems. 3hrs

Future Automotive Electronic Systems – Alternative Fuel Engines, Collision Avoidance Radar

warning Systems, Low tire pressure warning system, Radio navigation, Advance Driver Information

System. 5hrs

TEXT BOOK:

1. William B. Ribbens: , “Understanding Automotive Electronics”, 6th Edition,

SAMS/Elsevier Publishing

REFERENCE:

1. Robert Bosch Gambh: “Bosch Automotive Electronics and Automotive Electronics ”, 5th edition, Springer Viewed

11

SoC Design




Motivation for SoC Design : Review of Moore’s law and CMOS scaling, benefits of System-on-

Chip integration in terms of cost, power, and performance, comparison of System-on-Board, System-on-Chip, and System-in-Package, typical goals in SoC design – cost reduction, power reduction,

design effort reduction, performance maximization, productivity gap issues and the ways to improve

the gap – IP based design and design reuse. 6Hrs

Embedded Processors :Microprocessors, Microcontrollers, DSP and their selection criteria, review

of RISC and CISC instruction sets, Von-Neumann and Harward architectures and interrupt

architectures. 5Hrs

Embedded Memories : Scratchpad memories, Cache memories, Flash memories, Embedded DRAM,

topics related to cache memories, Cache coherence, MESI protocol and Directory-based coherence.

7Hrs

Hardware Accelerators in an SOC : Comparison on hardware accelerators and General-purpose

CPU, accelerators for graphics and image processing, typical peripherals in an SoC – DMA controller, USB controller. 10Hrs

Interconnect architectures for SoC : Bus architecture and its limitations, Network on Chip (NoC) topologies, Mesh-based NoC, routing in an NoC, packet switching and wormhole routing. 9Hrs

Mixed Signal and RF components in an SoC : Sensors, Amplifiers, Data Converters, Power

management circuits, RF transmitter and receiver circuits. 9Hrs

SoC Design Flow : IP design, verification and integration, hardware software co-design, power

management problems and packaging related problems. 6Hrs

TEXT BOOKS:

1. Sudeep Pasricha and Nikil Dutt, “On-Chip Communication Architectures: System on Chip

Interconnect”, Morgan Kaufmann Publishers © 2008.

2. Henry Chang et al., “Surviving the SOC revolution: a guide to platform-based design”,

Kluwer (Springer), 1999.

REFERENCES:

1. Frank Ghenassia, “Transaction Level Modeling with SystemC: TLM Concepts and

Applications for Embedded Systems”, Springer © 2005, ISBN:9780387262321.

2. Luca Benini and Giovanni De Micheli, “Networks on Chips: Technology and Tools”, Morgan Kaufmann Publishers © 2006 (408 pages), ISBN:9780123705211.

12

II SEMESTER

MODERN DSP




Signals and Systems: Basics of Signals and Systems, Discrete time processing of continuous signals,

Structure of a digital filter, Frequency domain analysis of a digital filter, Quantization error, Sigma

and Sigma Delta Modulation, Fourier analysis – DFT, DTFT, DFT as an estimate of the DTFT for Spectral estimation, DFT for convolution, DFT for compression, FFT. 13 Hrs

Filters: Ideal Vs non ideal filters, FIR and IIR Filters, Digital Filter Implementation, Elementary

Operations, State Space realization, Robust implementation of Digital Filters, Robust implementation of Equi – ripple FIR digital. 13Hrs

Multirate Systems and Signal Processing: Fundamentals – Problems and definitions, Up sampling and Down sampling, Sampling rate conversion by a rational factor. 8Hrs

Multistage implementation of Digital filters: Efficient implementation of multirate systems, DFT filter banks and Transmultiplexers, DFT filter banks, Maximally Decimated DFT filter banks and

Transmultiplexers, Application of transmultiplexers in Modulation. 8Hrs

Maximally Decimated Filter banks and Time Frequency Expansion: Vector spaces, Two Channel Perfect Reconstruction conditions; Design of PR filters Lattice Implementations of Orthonormal Filter

Banks, Applications of Maximally Decimated filter banks to an audio signal, Introduction to

Time Frequency Expansion, The STFT, The Gabor Transform, The Wavelet transform, Recursive Multi resolution Decomposition. 10 Hrs

TEXT BOOKS:

1. Roberto Cristi, “Modern Digital Signal Processing”, Cengage Publishers, India, (erstwhile

Thompson Publications), 2003.

2. S.K. Mitra, “Digital Signal Processing: A Computer Based Approach”, III Ed, Tata

McGraw Hill, India,2007.

REFERENCES:

1. E.C. Ifeachor and B W Jarvis, “Digital Signal Processing, a practitioners approach,” II

Edition, Pearson Education, India, 2002 Reprint.

2. Proakis and Manolakis, “Digital Signal Processing”, Prentice Hall 1996(third edition).

13

SYNTHESIS AND OPTIMIZATION OF DIGITAL CIRCUITS




Introduction: Microelectronics, semiconductor technologies and circuit taxonomy, microelectronic

design styles, computer aided synthesis and optimization. Graphs: Notation, undirected graphs,

directed graphs, combinatorial optimization, algorithms, tractable and intractable problems,

algorithms for linear and integer programs, graph optimization problems and algorithms, boolean

algebra and applications.

08Hrs

Hardware Modelling: Hardware Modelling Languages, distinctive features, structural hardware

language, behavioural hardware language, HDLs used in synthesis, abstract models, structures logic

networks, state diagrams, data flow and sequencing graphs, compilation and optimization techniques.

04Hrs

Two level combinational logic optimization: Logic optimization, principles, operation on two level

logic covers, algorithms for logic minimization, symbolic minimization and encoding property,

minimization of boolean relations. 08Hrs

Multiple level combinational optimizations: Models and transformations for combinational

networks, algebraic model, synthesis of testable network, algorithm for delay evaluation and

optimization, rule based system for logic optimization. 10Hrs

Sequential circuit optimization: Sequential circuit optimization using state based models,

sequential circuit optimization using network models. Schedule Algorithms: A model for scheduling

problems, scheduling with resource and without resource constraints, scheduling algorithms for

extended sequencing models, scheduling pipe lined circuits.

12Hrs

Cell library binding: Problem formulation and analysis, algorithms for library binding, specific

problems and algorithms for library binding (lookup table F.P.G.As and Antifuse based F.P.G.As),

rule based library binding. 06Hrs

Testing: Types of simulators, basic components of a simulator, fault simulation techniques, automatic

test pattern generation methods (ATPG), design for testability (DFT) techniques. 04Hrs

TEXT BOOKS:

1. Giovanni De Micheli, “Synthesis and Optimization of Digital Circuits," Tata McGraw-Hill,

2003.

2. Srinivas Devadas, Abhijit Ghosh, and Kurt Keutzer, “Logic Synthesis,” McGraw-Hill,

USA, 1994.

REFERENCE:

1. Neil Weste and K. Eshragian, ”Principles of CMOS VLSI Design: A System Perspective”, 2nd edition, Pearson Education (Asia) Pte. Ltd., 2000.

14

MULTIMEDIA SYSTEMS




Multimedia Communications: multimedia information representation, multimedia networks,

multimedia applications, network QoS and application QoS. 8Hrs

Information Representation: text, images, audio and video, Text and image compression,

compression principles, text compression, image compression. Audio and video compression, audio

compression, video compression, video compression principles, video compression standards: H.261, H.263, P1.323, MPEG 1, MPEG 2, Other coding formats for text, speech, image and video. 14Hrs

Detailed Study of MPEG 4: coding of audiovisual objects, MPEG 4 systems, MPEG 4 audio and

video, profiles and levels. MPEG 7 standardization process of multimedia content description, MPEG 21 multimedia framework, Significant features of JPEG 2000, MPEG 4 transport across the Internet.

10Hrs

Synchronization: notion of synchronization, presentation requirements, reference model for

synchronization, Introduction to SMIL, Multimedia operating systems, Resource management, process

management techniques. 8Hrs

Multimedia Communication Across Networks: Layered video coding, error resilient video coding

techniques, multimedia transport across IP networks and relevant protocols such as RSVP, RTP,

RTCP, DVMRP, multimedia in mobile networks, multimedia in broadcast networks. 12Hrs

TEXT BOOKS:

1. Fred Halsall, ―Multimedia Communications, Pearson education, 2001

2. K. R. Rao, Zoran S. Bojkovic, Dragorad A. Milovanovic, ―Multimedia Communication

Systems, Pearson education, 2004

REFERENCES:

1. Fred Halsall, ―Multimedia Communications, Pearson education, 2001 2. K. R. Rao, Zoran S. Bojkovic, Dragorad A. Milovanovic, ―Multimedia Communication

Systems, Pearson education, 2004

3. Raif steinmetz, Klara Nahrstedt, ―Multimedia: Computing, Communications and

applications, Pearson education, 2002 4. Tay Vaughan, ―Multimedia: Making it work‖, 6th edition, Tata McGraw Hill, 2004

5. John Billamil, Louis Molina, ―Multimedia : An Introduction‖, PHI, 2002

6. Pallapa Venkataram, ―Multimedia Information Systems”, Pearson education (In Press), 2005

15

ADVANCES IN VLSI DESIGN




Review of MOS Circuits: MOS and CMOS static plots, switches, comparison between CMOS and BI

- CMOS. 3Hrs

MESFETS: MESFET and MODFET operations, quantitative description of MESFETS. 5Hrs

MIS Structures and MOSFETS: MIS systems in equilibrium, under bias, small signal operation of MESFETS and MOSFETS. 6Hrs

Short Channel Effects and Challenges to CMOS: Short channel effects, scaling theory, processing challenges to further CMOS miniaturization 6Hrs

Beyond CMOS: Evolutionary advances beyond CMOS, carbon Nano tubes, conventional vs. tactile

computing, computing, molecular and biological computing Mole electronics-molecular Diode and diode- diode logic, Defect tolerant computing. 7Hrs

Super Buffers, Bi-CMOS and Steering Logic: Introduction, RC delay lines, super buffers- An NMOS super buffer, tri state super buffer and pad drivers, CMOS super buffers, Dynamic ratio less

inverters, large capacitive loads, pass logic, designing of transistor logic, General functional blocks -

NMOS and CMOS functional blocks. 9Hrs

Special Circuit Layouts and Technology Mapping: Introduction, Talley circuits, NAND-NAND,

NOR- NOR, and AOI Logic, NMOS, CMOS Multiplexers, Barrel shifter, Wire routing and module

lay out. 8Hrs

System Design: CMOS design methods, structured design methods, Strategies encompassing

hierarchy, regularity, modularity & locality, CMOS Chip design Options, programmable logic, Programmable inter connect, programmable structure, Gate arrays standard cell approach, Full custom

Design. 8Hrs

TEXT BOOKS:

1. Kevin F Brennan “Introduction to Semi Conductor Device”, Cambridge publications.

2. Eugene D Fabricius “Introduction to VLSI Design”, McGraw-Hill International

publications.

REFERENCES:

1. D.A Pucknell “Basic VLSI Design”, PHI Publication

2. Wayne Wolf, “Modern VLSI Design” Pearson Education, Second Edition , 2002

16

Advanced DSP Lab

Sub Code: 18MDEL27 0 – 0 – 3 – 1

No. Of Practical Hours/Week: 03 L – T – P – C

CIE Marks: 50

I. USING MATLAB

1. A LTI system is defined by the difference equation y[n] = x[n] +x [n-1] +x [n-2].

(a) Determine the impulse response of the system and sketch it.

(b) Determine the output y[n] of the system when the input is x[n] = u[n].

(c) Determine the output of the system when the input is a complex exponential g. x[n] = 2e j0.2πn).

2. Computation of FFT when N is not a power of 2.

3. Sampling rate conversion and spectrum plot.

4. Record of machinery noise like fan or blower or diesel generator and obtaining its spectrum.

5. Fourier Transform and its inverse Fourier Transform of an image.

6. Design a simple digital FIR filter with real co-efficients to remove a narrowband (i.e.,

sinusoidal) disturbance with frequency F0=50 Hz. Let Fs=300 Hz is the sampling frequency.

(a) Determine the desired zeros and poles of the filter.

(b) Determine the filter coefficients with the gain K=1.

(c) Sketch the magnitude of the frequency response.

7. Design an IIR filter with real co-efficients with same specifications mentioned in Q2 and

repeats the steps (a) to (c).

8. Generate a signal with two frequencies x(t)=3cos(2πF1t) + 2cos(2πF2t) sampled at Fs=8 kHz.

Let F1=1 kHz and F2=F1+Δ and the overall data length be N=256 points.

(a) From theory, determine the minimum value of Δ necessary to distinguish between the two

frequencies.

(b) Verify this result experimentally. Using the rectangular window, look at the DFT with

several values of Δ so that you verify the resolution.

9. Generate the sequence x[n] = n - 64 for n = 0,…127.

(a) Let X[k] = DFT{x[n]}. For various values of L, set to zero the “high frequency

coefficients” X [64 – L] =….X[64]=…….=X[64+L]=0 and take the inverse DFT. Plot the

results.

(b) Let XDCT[k]=DCT(x[n]}. For the same values of L, set to zero the “high frequency

coefficients” XDCT[127-L]=…….XDCT[127]. Take the inverse DCT for each case and

compare the reconstruction with the previous case.

10. Design a discrete time low pass filter with the specifications given below:

Sampling frequency = 2 kHz.

Pass band edge = 260 Hz

Stop band edge = 340 Hz

Max. pass band attenuation = 0.1 dB

Minimum stop band attenuation = 30 dB

Use the following design methodologies:

Hamming windowing, Kaiser Windowing and Applying bilinear transformation to a suitable,

analog Butterworth filter.

17

ELECTIVE – II

EMBEDDED WSN




Introduction to WSN, Challenges for WSNs, Required mechanisms, Single node architecture,

Hardware components, Energy consumption of sensor nodes, Operating systems, Execution

environments, Some examples of sensor nodes. 8 Hrs

Sensor network scenarios, Optimization goals, figures of merit, Design principles for WSNs-

Distributed organization, In-network processing, Adaptive fidelity and accuracy, Data centricity, Design principles for WSNs -Exploit location information, Exploit activity patterns, Exploit

heterogeneity, Component-based protocol stacks and cross-layer optimization, Service interfaces of

WSNs-Structuring application/protocol stack interfaces, Service interfaces of WSNs-Expressibility requirements for WSN service interfaces, Gateway concepts-The need for gateways, WSN to Internet

communication, Gateway concepts-Internet to WSN communication, WSN tunneling. 10 Hrs

Introduction to Tiny OS Programming, fundamentals of Programming sensors using nesC, fundamentals of Programming sensors using nesC–continue.., Algorithms for WSN-Structural

Characteristics of Sensor Nodes, Distinctive Properties of Wireless Sensor Networks, Algorithms for

WSN-Sensor Network Stack, Synchronization in Wireless Sensor Networks , Algorithms for WSN-Collision Avoidance: Token-Based Approach, Carrier Sensing Versus Decoding, Techniques for

Protocol Programming-The Mediation Device Protocol, Contention-Based Protocols, Programming

with Link-Layer Protocols, Automatic Repeat Request (ARQ) Protocol, Transmitter Role Techniques

for Protocol Programming-Alternating-Bit-Based ARQ Protocols, Selective Repeat/Selective Reject, Naming and Addressing, Distributed Assignment of Network wide Addresses, Improved Algorithms

Techniques for Protocol Programming-Content-Based Addressing, Flooding, Rumor Routing,

Tracking, Querying in Rumor Routing. 12 Hrs

An Introduction to the Concept of Cooperating Objects and Sensor Networks-Cooperating objects and

wireless sensor networks. An Introduction to the Concept of Cooperating Objects and Sensor Networks-Embedded WiSeNts, Programming models-Requirements Programming models-State of

the art, System architectures: node internals-Data-centric and service-centric approach, Operating

systems, Virtual machines, System architectures: node internals-Data management middleware,

Adaptive system software, Summary and evaluation, System architecture: interaction of nodes-Introduction, Communication models, System architecture: interaction of nodes-Network dynamics,

Architectures and functionalities summary, future work-Programming models, Node internals.

12Hrs

Wireless sensor networks for environmental monitoring, Wireless sensor networks for environmental

monitoring-continue, Wireless sensor networks with mobile nodes, Wireless sensor networks with mobile nodes-continue, Autonomous robotic teams for surveillance, Autonomous robotic teams for

surveillance-continue, Autonomous robotic teams for monitoring, Autonomous robotic teams for

monitoring-continue, Inter-vehicle communication networks. 10Hrs

18

TEXT BOOKS:

1. Holger karl, Andreas Willig, “Protocols and architectures for wireless sensor networks”, John

wiley, 2005.

2. Liljana Gavrilovska, Srdjan Krco, Veljko Milutinovic , IvanStojmenovic,Roman Trobec, “Application and Multidisciplinary Aspectsof Wireless Sensor Networks”, Springer-Verlag,

London Limited 2011.

REFERENCES:

1. Michel Banâtre, Pedro José Marrón, Anibal Ollero, Adam Wolisz, “Cooperating Embedded

Systems and Wireless Sensor Networks”, John Wiley & Sons, Inc .2008. 2. Seetharaman Iyengar, Nandhan, “Fundamentals of Sensor Network Programming

Applications and Technology”, John Wiley & Sons,Inc.2008.

19

IMAGE PROCESSING




Introduction: 2D systems, Mathematical preliminaries – Fourier Transform, Z Transform, Optical

&Modulation transfer function, Matrix theory, Random signals, Discrete Random fields, Spectral density function. 5Hrs

Image Perception: Light, Luminance, Brightness, Contrast, MTF of the visual system, Visibility

function,Monochrome vision models, Fidelity criteria, Color representation, Chromaticity diagram, Colorcoordinatesystems, Color difference measures, Color vision model, Temporal properties of

vision. 6Hrs

Image Sampling and Quantization: Introduction, 2D sampling theory, Limitations in sampling

&reconstruction, Quantization, Optimal quantizer, Compander, Visual quantization. 3Hrs

Image Transforms: Introduction, 2D orthogonal & unitary transforms, Properties of unitary transforms, DFT,DCT, DST, Hadamard, Haar, Slant, KLT, SVD transform. 6Hrs

Image Representation by Stochastic Models: Introduction, one-dimensional models, AR models,

NoN causal representations, linear prediction in two dimensions. 5Hrs

Image Enhancement: Point operations, Histogram modelling, spatial operations, Transform

operations, Multispectral image enhancement, false colour and Pseudo-colour, Colour Image enhancement. 6Hrs

Image Filtering & Restoration: Image observation models, Inverse & Wiener filtering, Fourier Domain filters, Smoothing splines and interpolation, Least squares filters, generalized inverse, SVD

and Iterative methods, Maximum entropy restoration, Bayesian methods, Coordinate transformation

& geometric correction, Blind de-convolution. 6Hrs

Image Analysis & Computer Vision: Spatial feature extraction, Transform features, Edge detection,

Boundary Extraction, Boundary representation, Region representation, Moment representation,

Structure, Shape features, Texture, Scene matching & detection, Image segmentation, Classification Techniques. 5Hrs

Image Reconstruction from Projections: Introduction, Radon Transform, Back projection operator,

Projection theorem, Inverse Radon transform, Fourier reconstruction, Fan beam reconstruction, 3D tomography. 5Hrs

Image Data Compression: Introduction, Pixel coding, Predictive techniques, coding, Inter-frame coding, coding of two tone images, Image compression standards. 5Hrs

TEXT BOOKS:

1. K. Jain, “Fundamentals of Digital Image Processing," Pearson Education (Asia) Pte. Ltd.

/Prentice Hall of India, 2004.

2. Z. Li and M.S. Drew, “Fundamentals of Multimedia,” Pearson Education (Asia) Pte. Ltd., 2004.

REFERENCES:

1. K. Jain, “Fundamentals of Digital Image Processing," Pearson Education (Asia) Pte. Ltd./Prentice Hall of India, 2004.

2. Z. Li and M.S. Drew, “Fundamentals of Multimedia,” Pearson Education (Asia) Pte. Ltd.,

2004. 3. R. C. Gonzalez and R. E. Woods, “Digital Image Processing,” 2nd edition, Pearson

Education (Asia) Pte. Ltd/Prentice Hall of India, 2004.

20

REAL TIME OPERATING SYSTEMS

Subject Code: 18MDEL253 IA Marks: 50 No. Of Lecture Hours/Week: 04 Exam Hours: 03


Introduction to Real-Time Embedded Systems: Brief history of Real Time Systems, A brief history of Embedded Systems. 4Hrs

System Resources: Resource Analysis, Real-Time Service Utility, Scheduling Classes, The Cyclic Executive, Scheduler Concepts, Pre-emptive Fixed Priority Scheduling Policies, Real-Time OS,

Thread Safe Re-entrant Functions. 7Hrs

Processing: Pre-emptive Fixed-Priority Policy, Feasibility, Rate Monotonic least upper bound,

Necessary and Sufficient feasibility, Deadline – Monotonic Policy, Dynamic priority policies.

6Hrs I/O Resources: Worst-case Execution time, Intermediate I/O, Execution efficiency, I/O

Architecture. 3Hrs

Memory: Physical hierarchy, Capacity and allocation, Shared Memory, ECC Memory, Flash file systems. 3Hrs

Multi-resource Services: Blocking, Deadlock and livestock, Critical sections to protect shared resources, priority inversion. 3Hrs

Soft Real-Time Services: Missed Deadlines, QoS, Alternatives to rate monotonic policy, mixed hard and soft real-time services. 3Hrs

Embedded System Components: Firmware components, RTOS system software mechanisms,

Software application components. 3Hrs

Debugging Components: Exceptions assert, Checking return codes, Single-step debugging, kernel

scheduler traces, Test access ports, Trace ports, Power-On self test and diagnostics, External test equipment, Application-level debugging. 6Hrs

Performance Tuning: Basic concepts of drill-down tuning, hardware – supported profiling and

tracing, Building performance monitoring into software, Path length, Efficiency, and Call frequency, Fundamental optimizations. 6Hrs

High availability and Reliability Design: Reliability and Availability, Similarities and differences, Reliability, Reliable software, Available software, Design tradeoffs, Hierarchical

applications for Fail-safe design. 6Hrs

Design of RTOS – PIC microcontroller. (Chap 13 of book MykePredko). 2Hrs

TEXT BOOKS:

1. “Real-Time Embedded Systems and Components”, Sam Siewert, Cengage Learning India

Edition, 2007. 2. “Programming and Customizing the PIC microcontroller”, MykePredko, 3rd Ed, TMH,

2008.

REFERENCE: 1. “Programming for Embedded Systems”, Dreamtech Software Team, Jhon Wiley, India Pvt.

Ltd.

21

ELECTIVE – III

DSP Integrated Circuits




DSP integrated circuits and VLSI circuit technologies: Standard digital signal processors,

Application specific IC’s for DSP, DSP systems, DSP system design, Integrated circuit design. MOS

transistors, MOS logic, VLSI process technologies, Trends in CMOS technologies.

10Hrs

Digital Signal Processing: Digital signal processing, Sampling of analog signals, Selection of sample

frequency, Signal- processing systems, Frequency response, Transfer functions, Signal flow graphs,

Filter structures, Adaptive DSP algorithms, DFT-The Discrete Fourier Transform, FFT-The Fast

Fourier Transform Algorithm, Image coding, Discrete cosine transforms.

10Hrs

Digital filters and finite word length effects: FIR filters, FIR filter structures, FIR chips, IIR filters,

Specifications of IIR filters, Mapping of analog transfer functions, Mapping of analog filter structures,

Multirate systems, Interpolation with an integer factor L, Sampling rate change with a ratio L/M,

Multirate filters. Finite word length effects -Parasitic oscillations, Scaling of signal levels, Round-off

noise, measuring round-off noise, Coefficient, sensitivity, Sensitivity and noise.

11Hrs

DSP architectures and synthesis of DSP architectures: DSP system architectures, Standard DSP

architecture, Ideal DSP architectures, Multiprocessors and multicomputer, Systolic and Wave front

arrays, Shared memory architectures. Mapping of DSP algorithms onto hardware, Implementation

based on complex PEs, Shared memory architecture with Bit – serial PEs.

11Hrs

Arithmetic units and Integrated circuit Design: Conventional number system, Redundant Number

system, Residue Number System, Bit-parallel and Bit-Serial arithmetic, Basic shift accumulator,

Reducing the memory size, Complex multipliers, Improved shift-accumulator. Layout of VLSI

circuits, FFT processor, DCT processor and Interpolator as case studies. Cordic algorithm.

10Hrs

TEXT BOOKS:

1. Lars Wanhammer, “DSP Integrated Circuits”, 1999 Academic press, New York

2. A.V.Oppenheim et.al, “Discrete-time Signal Processing”, Pearson Education, 2000.

REFERENCES:

1. Emmanuel C. Ifeachor, Barrie W. Jervis, “ Digital signal processing – A practical approach”,

Second Edition, Pearson Education, Asia.

2. Keshab K.Parhi, “VLSI Digital Signal Processing Systems design and Implementation”, John

Wiley & Sons, 1999.

22

ASIC DESIGN




Introduction: Full Custom with ASIC, Semi custom ASICS, Standard Cell based ASIC, Gate array

based ASIC, Channelled gate array, Channel less gate array, structured get array, Programmable logic device, FPGA Design flow, ASIC Cell Libraries. 8Hrs

Data Logic Cells: Data Path Elements, Adders, Multiplier, Arithmetic Operator, I/O cell, Cell

Compilers. 8Hrs

ASIC Library Design: Logical effort: practicing delay, logical area and logical efficiency logical

paths, multi stage cells, optimum delay, optimum no. of stages, library cell design. 6Hrs

Low-level Design Entry: Schematic Entry: Hierarchical design. The cell library, Names, Schematic,

Icons & Symbols, Nets, schematic entry for ASIC’S, connections, vectored instances and buses, Edit in place attributes, Netlist, screener, Back annotation. 6Hrs

Programmable ASIC: programmable ASIC logic cell, ASIC I/O cell .

A Brief Introduction to Low Level Design Language: an introduction to EDIF, PLA Tools, an introduction to CFI designs representation. Half gate ASIC. Introduction to Synthesis and Simulation;

6Hrs ASIC Construction Floor Planning, Placement and Routing: Physical Design, CAD Tools,

System Partitioning, Estimating ASIC size, partitioning methods. Floor planning tools, I/O and power

planning, clock planning, placement algorithms, iterative placement improvement, Time driven placement methods. Physical Design flow global Routing, Local Routing, Detail Routing, Special

Routing, Circuit Extraction and DRC. 18Hrs

Note: All Designs Will Be Based On VHDL

TEXT BOOKS:

1. M.J.S .Smith, - ―Application - Specific Integrated Circuits‖ – Pearson Education, 2003

2. Jose E.France, YannisTsividis, ―Design of Analog-Digital VLSI Circuits for

Telecommunication andSignal Processing‖, Prentice Hall, 1994.

REFERENCES:

1. Malcolm R.Haskard; Lan. C. May, ―Analog VLSI Design - NMOS and CMOS‖ Prentice Hall, 1998.

2. Mohammed Ismail and Terri Fiez, ―Analog VLSI Signal and Information Processing”,

McGraw Hill, 1994.

23

RELIABILITY ENGINEERING

Subject Code: 18MDEL413 A Marks: 50



Reliability Engineering: System reliability - series, parallel and mixed configuration, Block diagram, r-out-of-n structure, Solving problems using mathematical models. Reliability improvement and

allocation-Difficulty in achieving reliability, Method of improving reliability during design, different

techniques available to improve reliability, Reliability – Cost trade off, Prediction and analysis,Problems. 9Hrs

Maintainability, Availability & Failure Analysis: Introduction, Techniques available to improve maintainability & availability, trade off among reliability, maintainability & availability and analysis.

Defect generation – Types of failures, defects reporting and recording, Defect analysis, Failure

analysis, Equipment down time analysis, Breakdown analysis, TA, FMEA, FMECA. 9Hrs

Maintenance Planning and Replacement: Maintenance planning – Overhaul and repair; Meaning

and difference, Optimal overhaul/Repair/Replace maintenance policy for equipment subject to

breakdown, Replacement decisions – Optimal interval between preventive replacements of equipment subject to breakdown, group replacement. 9Hrs

Maintenance Systems: Fixed time maintenance, Condition based maintenance, Opportunity

maintenance, design out maintenance, Total productive maintenance, Inspection decision – Optimal inspection frequency, non-destructive inspection, PERT & CPM in maintenance, Concept of

terotechnology. 9Hrs

Condition Monitoring: Techniques-visual monitoring, temperature monitoring, vibration

monitoring, lubricant monitoring, Crack monitoring, Thickness monitoring, Noise and sound

monitoring, concept of S/N ratio, Condition monitoring of hydraulic system, Machine diagnostics - Objectives, Monitoring strategies, Examples of monitoring and diagnosis. 9Hrs

Safety Aspects: Importance of safety, Factors affecting safety, Safety aspects of site and plant,

Instruments for safe operation, Safety education and training, Personnel safety, Disaster planning and measuring safety effectiveness, Future trends in industrial safety. 7Hrs

TEXT BOOKS:

1. Concepts in Reliability Engineering L.S. Srinath Affiliated East West Press

2. Maintainability and Reliability Handbook Editors: Ireson W.A. and C.F. Coombs McGraw

Hill Inc.

3. Failure Diagnosis and Performance Monitoring L.F. Pau Marcel Dekker

REFERENCES:

1. Industrial Maintenance Management S.K. Srivastava S. Chand & Co Ltd.

2. Management of Industrial Maintenance Kelly and M.J. Harris Butterworth and Co. 3. Maintenance, Replacement and Reliability A.K.S. Jardine Pitman Publishing

4. Engineering Maintainability: How to Design for Reliability and Easy Maintenance B.S.

Dhillon Prentice Hall of India

24

ELECTIVE – IV

WIRELESS AND MOBILE COMMUNICATION

Subject Code: 18MDEL421 A Marks: 50



Review of fundamentals of wireless communication and Networks: Wireless communication channel specifications, Wireless communication systems, Wireless networks, Switching technology, Communication problems, Wireless network issues and standards. 10Hrs Wireless body area networks: Properties, Network architectures, Components, Technologies, Design issues, Protocols and applications. 9Hrs Wireless personal area networks: Architectures, Components, Requirements, Technologies and protocols, Bluetooth and Zigbee. 9Hrs Wireless LANs: Network components, design requirements, Architectures, IEEE-802.11x, WLAN protocols, 802.11p and applications. 8Hrs WMANs, IEEE-802.16: Architectures, Components, WiMax mobility support, Protocols, Broadband networks and applications, WWANs, cellular networks, Satellite Network, Applications. 8Hrs Wireless ad-hoc networks: Mobile ad-hoc networks, Sensor network, Mesh networks, VANETs, Research issues in Wireless networks. 8Hrs

TEXT BOOKS:

1. S. S. Manvi, and M. S. Kakkasageri, "Wireless and Mobile network concepts and Protocols", Wiley, 1st edition, 2010.

2. P. Kaveh, Krishnamurthy, "Principles of Wireless network: A unified approach", PHI, 2006. 3. Iti Saha Mitra, "Wireless communication and network: 3G and Beyond", McGraw Hill, 2009.

REFERENCES:

1. Ivan Stojmenovic, "Handbook of Wireless networks and Mobile Computing", Wiley, 2009. 2. P. Nicopolitidis, M. S. Obaidat, et al, "Wireless Networks", Wiley, 2009. 3. Yi-Bing Lin, Imrich Chlamtac, "Wireless and Mobile Network Architectures", Wiley, 2009. 4. Mullet, "Introduction to Wireless Telecommunication Systems and Networks", Cengage,

2009.

25

FUZZY LOGIC




Introduction, Classical sets and Fuzzy Sets: Background, Uncertainty and Imprecision, Statistics

and Random Processes, Uncertainty in Information, Fuzzy Sets and Membership, Chance versus Ambiguity. Classical Sets - Operations on Classical Sets, Properties of Classical (Crisp) Sets,

Mapping of Classical Sets to Functions Fuzzy Sets - Fuzzy Set operations, Properties of Fuzzy Sets.

Sets as Points in Hypercube. 7Hrs

Classical Relations and Fuzzy Relations: Cartesian Product, Crisp Relations- Cardinality of Crisp

Relations, Operations on Crisp Relations, Properties of Crisp Relations, Composition. Fuzzy

Relations - Cardinality of Fuzzy Relations, Operations on Fuzzy Relations, Properties of Fuzzy Relations, Fuzzy Cartesian Product and Composition, Non-interactive Fuzzy Sets. Tolerance and

Equivalence Relations - Crisp Equivalence Relation, Crisp Tolerance Relation, Fuzzy Tolerance and

Equivalence Relations. Value Assignments - Cosine Amplitude, Max-min Method, Other Similarity methods. 7Hrs

Membership Functions: Features of the Membership Function, Standard Forms and Boundaries, Fuzzification, Membership Value Assignments – Intuition, Inference, Rank Ordering, Angular Fuzzy

Sets, Neural Networks, Genetic Algorithms, Inductive Reasoning. 6Hrs

Fuzzy-to-Crisp Conversions, Fuzzy Arithmetic: Lambda-Cuts for Fuzzy Sets, Lambda-Cuts for Fuzzy Relations, Defuzzification Methods Extension Principle - Crisp Functions, Mapping and

Relations, Functions of fuzzy Sets – Extension Principle, Fuzzy Transform (Mapping), Practical

Considerations, Fuzzy Numbers Interval Analysis in Arithmetic, Approximate Methods of Extension - Vertex method, DSW Algorithm, Restricted DSW Algorithm, Comparisons, Fuzzy Vectors. 6Hrs

Classical Logic and Fuzzy Logic: Classical Predicate Logic – Tautologies, Contradictions,

Equivalence, Exclusive OR and Exclusive NOR, Logical Proofs, Deductive Inferences. Fuzzy Logic, Approximate Reasoning, Fuzzy Tautologies, Contradictions, Equivalence and Logical Proofs, Other

forms of the Implication Operation, Other forms of the Composition Operation. 6Hrs

Fuzzy Rule- Based Systems: Natural Language, Linguistic Hedges, Rule-Based Systems - Canonical

Rule Forms, Decomposition of Compound Rules, Likelihood and Truth Qualification, Aggregation of

Fuzzy Rules, Graphical Techniques of Inference. 6Hrs

Fuzzy Decision making: Fuzzy Synthetic Evaluation, Fuzzy Ordering, Preference and consensus,

Multiobjective Decision Making, Fuzzy Bayesian Decision Method, Decision Making under Fuzzy

States and Fuzzy Actions. 7Hrs

Fuzzy Classification: Classification by Equivalence Relations - Crisp Relations, Fuzzy Relations.

Cluster Analysis, Cluster Validity, c-Means Clustering - Hard c-Means (HCM), Fuzzy c-Means (FCM). Classification Metric, Hardening the Fuzzy c-Partition, Similarity Relations from Clustering.

7Hrs

TEXT BOOKS:

1. John Yen & Reza Langari, ‘Fuzzy Logic – Intelligence Control & Information’, Pearson

Education, New Delhi, 2003.

2. Timothy J. Ross, ‘Fuzzy Logic with Engineering Applications’, Tata McGraw Hill, 1997.

REFERENCES:

1. H.J. Zimmermann, ‘Fuzzy Set Theory & its Applications’, Allied Publication Ltd., 1996.

Simon Haykin, ‘Neural Networks’, Pearson Education, 2003.

26

EMBEDDED CONTROL SYSTEMS




Introduction: Controlling the hardware with software – Data lines – Address lines - Ports –Schematic representation – Bit asking– Programmable peripheral interface – Switch input detection –

74 LS 244.

10Hrs

Input-output devices: Keyboard basics – Keyboard scanning algorithm – Multiplexed LED displays

– Character LCD modules – LCD module display – Configuration – Time-of-day clock – Timer

manager - Interrupts - Interrupt service routines – IRQ - ISR - Interrupt vector or dispatch table multiple-point - Interrupt- driven pulse width modulation.

10Hrs

DAC and ADC: R- 2R ladder - Resistor network analysis - Port offsets - Triangle waves analog vs.

digital values - ADC0809 – Auto port detect - Recording and playing back voice - Capturing analog

information in the timer interrupt service routine - Automatic, multiple channel analog to digital data acquisition.

12Hrs

Asynchronous serial communication: Asynchronous serial communication – RS-232 – RS-485 – Sending and receiving data – Serial ports on PC – Low level PC serial I/O module - Buffered serial

I/O.

10Hrs

Case studies: Embedded C programming: Multiple closure problems – Basic outputs with PPI –

Controlling motors – Bi-directional control of motors – H bridge – Telephonic systems – Stepper

control – Inventory control systems.

10Hrs

TEXT BOOKS:

1. Jean J. Labrosse, “Embedded Systems Building Blocks: Complete and Ready To Use

Modules in C”, CMP Books 2000.

2. Ball S.R., “Embedded microprocessor Systems – Real World Design”, Prentice Hall, 1996.

REFERENCES:

1. Herma K, “Real Time Systems – Design for distributed Embedded Applications”, Kluwer

Academic, 1997. 2. Daniel W. Lewis, “Fundamentals of Embedded Software where C and Assembly meet”, PHI,

2002.

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