the abc’s of pa’s -...

Berkeley

The ABC’s of PA’s

Prof. Ali M. Niknejad

U.C. BerkeleyCopyright c© 2014 by Ali M. Niknejad

Niknejad Advanced IC’s for Comm

Class A Review


Class A Amplifiers

Class A amplifiers have a collector current waveform with100% duty cycle. In other words, the bias current IQ > io ,where io is the current swing.

The advantage of Class A amplifiers is high linearity, cleansinusoidal waveforms (little harmonic filtering needed), andsimple design (not relying too much on transistornon-linearity).

The disadvantage of Class A is low efficiency and maximumpower consumption at zero output power!

Dynamic Class A (modulate bias current) is an attractivesolution for some applications. Envelope following Class Acombined with dynamic Class A is even better.


CE/CS Class A

vin

vo

VCC

RL

The CE amplifier has the advantage of higher power gain(there is voltage gain and current gain).

The collector effciency is given by

ηc =PL

Pdc=

12vo io

VCC IQ=

1

2v × i

The efficiency is maximized if we can set the voltage swingand current swing independently.


CE/CS Voltage Swing

VCC − VCE!sat

VCE!sat

VQ,low

VQ,high

VQ,mid

VCC

VCE,sat

VQ,mid

We see that to avoid clipping, we should bias the transistor atthe midpoint between VCC and VCE ,sat (or Vdsat).

Thus

vo ≤VCC

2


CE/CS Current Swing

IQ

0A

The current in the transistor cannot go negative. Therefore,the maximum current is set by the bias current

io ≤ IQ

The efficiency is therefore limited to 25%

η = v × i =1

2× 1

2


Optimum Load

It’s important to note that to achieve these optimumefficiencies, the value of the load resistance is constrained bythe current and voltage swing

Ropt =voio

=

(v

i

)(VCC

IQ

)Since the load resistance is usually fixed (e.g. antennaimpedance), a matching network is required to present theoptimum load to the amplifier.


Inductor Loaded CE/CS

vin

vo

VCC

RL

C∞RFC

If we AC couple a load RL to the amplifier, then the Q pointof the amplifier collector voltage is set at VCC through thechoke inductor.

The maximum swing is now nearly twice as large. Notice thatthe collector voltage can swing above the supply rail.


Swinging both ways...

vin

vo

VCC

RL

+VCC

−

+V

CC −VCC

−

+

Recall that the voltage polarity across the inductor is given bydI/dt, which can go negative. Thus the collector voltage isequal to the supply minus or plus the absolute voltage acrossthe inductor.


Improved Class A Efficiency

Since the swing is almost double, the efficiency nowapproaches 50%

vo ≤ VCC

η =1

2

iovoVCC IQ

≤ 1

2

In practice, due to losses in the components and back-off frommaximum swing to minimize distortion, the actual efciencycan be much lower.

Package parasitics (see later slides) also limit the voltageswing.


Complete Class A Output Stage

vin

vo

VCC

Lres

Cm

Lm R0Cpar

In practice the collector inductor can double as a resonantelement to tune out the collector parasitics.

The coupling capacitor Cc can be replaced by a matchingcapacitor Cm.


Class A Power Capacity

A good metric when comparing PA’s is to measure the outputpower versus the peak voltage and current stress imposed onthe device

These peak stresses are set by breakdown considerations. ForClass A operation, we can apply

PC =Pout

Vmax Imax

Vdrain,max = 2VDD

Idrain,max = IQ + IL = 2IQ

Pout =1

2VDD IQ

PC =1

2· 1

2· 1

2=

1

8= 0.125


Emitter Degeneration

Emitter inductance has adetrimental effect on PAefficiency since it reduces theswing. The voltage acrossthe emitter is given by

VE = jωLE io

vin

vo

VCC

RL

C∞RFC

+VLE

−

For a current swing of 1A at 1 GHz, a typical parasiticinductance of 1 nH will “eat” up 6.28V of swing! We need toreduce LE or to use a much higher VCC .

In practice both approaches are taken. We choose atechnology with the highest breakdown voltage and thepackage with the lowest LE .


Class B PA’s


Class B

+vin

−VCCvbias

The above circuit utilizes two transistors. Each device onlydelivers a half sinusoid pulse and the full sinusoid is recoveredby phase inversion through the transformer.

The base and collector bias voltages come from thetransformer center tap. The base (or gate) is biased at theedge of conduction (threshold).


Class B Waveforms

p(t)

ic(t) vc(t)

VCC

0V

Since the voltage at the load is ideally a perfect sinusoid, thevoltage on the collectors is likewise sinusoidal.

The power dissipated by each transistor is thus the product ofa sine and a half sine as shown above.


Class B Efficiency

The average current drawn by each transistor is given by

IQ =1

T

∫ T

0ic(t)dt =

IpT

∫ T/2

0sinωtdt =

Ip2π

∫ π

0sin θdθ =

Ipπ

Where Ip is the peak voltage drawn from the supply.

The peak current drawn from the supply is just the loadcurrent swing reflected to the collector, Ip = io × n.

η =1

2

(Ip

2IQ

)(vo

VCC

)Note that the total DC current draw is twice IQ since bothdevices draw current from the supply.


Class B Efficiency (cont)

Since the collector voltage swing can be as large as VCC

(similar to an inductively loaded Class A), the efficiency isbounded by

η ≤ 1

2

(Ip

2IQ

)=

1

4

(IpIQ

)η ≤ π

4≈ 78%

This is a big improvement over the peak efficiency of Class A.

Note that the average current naturally scales with outputpower, and so efficiency drops more gracefully as we back-offfrom peak power.


Efficiency versus Back-Off

η(V )

VCC

50%class B

class A

The efficiency drops linearly as we back-off from the peakoutput voltage

where vc is the collector voltage swing, which is just n timessmaller than the load voltage, vc = vo/n.


Tuned Class B

vin

vo

VCC

RL

C∞RFC

vbias

A tuned Class B amplifier works with a single devices bysending half sinusoid current pulses to the load. The device isbiased at the edge of conduction.

The load voltage is sinusoidal because a high Q RLC tankshunts harmonics to ground.


Class B Tank

In a single transistor version, the “minus” pulse is in factdelivered by the RLC tank. The Q factor of the tank needs tobe large enough to do this. This is analogous to pushingsomeone on a swing. You only need to push in one direction,and the reactive energy stored will swing the person back inthe reverse direction.

The average current drawn from the supply is the same asbefore, IQ = Ip/π. The harmonic current delivered to the loadis given by Fourier analysis of the half pulse

Iω1 =2

2πIp

∫ π

0sin θ sin θdθ =

1

πIp

∫ π

0

1− cos 2θ

2dθ

=1

π

π

2Ip =

Ip2


Class B Waveforms

ic(t) vc(t)

VCC

0V

We see that the transistor is cut-off when the collector voltageswings above VCC . Thus, the power dissipated during thisfirst half cycle is zero.

During the second cycle, the peak current occurs when thecollector voltage reaches zero.


Class B Efficiency (again)

The efficiency is therefore the same

η =1

2

Iω1

IQ

vcVCC

≤ 1

2

π

2=π

4

The DC power drawn from the supply is proportional to theoutput voltage

Pdc = IQVCC =VCC Ipπ

Ip =vc

Ropt=

nvoRopt

The power loss in the transistor is given by

pt(t) =1

2π

∫ π

0Ip sin θ(VCC − vc sin θ)dθ


Transistor Power Loss

Integrating the above expression

pt(t) =VCC Ip

2π(− cos θ

∣∣∣∣π0

− vcIp

2π

=1

2π

(2VCC Ip −

vc Ip2π

)=

Ipπ

VCC −vc Ip

4

= IQ · VCC −vc Iω1

2

= Pdc − PL


Class B Power Capacity

Recall the definition for PC

PC =Pout

Vmax Imax

Vmax = 2VCC

Imax = Iout

Note that the output power is related to the fundamentalcoefficient of a half sine wave, or 1/2 the peak

Pout =1

2VCC

Iout2

PC =12VCC

Iout2

2VCC Iout= 0.125

Same as Class A


Dynamic PA

vin

vo

Cm

Lm R0

DC-DC converterSupply

Envelope

Dynamic Bias

Envelope tracking supply and dynamic class-A

Efficiency always close to peak efficiency of amplifier (say30%) regardless of PAR

Need a very fast DC-DC converter


Class C PA’s


Conduction Angle

Often amplifiers are characterized by their conduction angle,or the amount of time the collector current flows during acycle.

Class A amplifiers have 360 conduction angle, since the DCcurrent is always flowing through the device.

Class B amplifiers, though, have 180 conduction angle, sincethey conduct half sinusoidal pulses.

In practice most Class B amplifiers are implemented as ClassAB amplifiers, as a trickle current is allowed to flow throughthe main device to avoid cutting off the device during theamplifier operation.


Reducing the Conduction Angle

ic(t) vc(t) ic(t) vc(t)

The most optimal waveform is shown above, where a currentpulse is delivered to the load during the collector voltageminimum (ideally zero)

As the pulse is made sharper and sharper, the efficiencyimproves. To deliver the same power, though, the pulse mustbe taller and taller as it’s made more narrow. In fact, in thelimit the current spike approaches a delta function.


Class C

vin

vo

VCC

RL

C∞RFC

Vbias < Vthresh

Class C amplifiers are a wide family of amplifiers withconduction angle less than 180. One way to achieve this is tobias a transistor below threshold and allow the input voltageto turn on the device for a small fraction of the cycle.


Class C Linearity

I

Q

000

001010

011

100

101110

111

I 2 + Q2 = A2

The Class C amplifier is very non-linear, and it is onlyappropriate for applications where the modulation is constantenvelope. For instance, FM uses a constant amplitude carrierand only modulates the frequency to convey information.Likewise, any digital modulation scheme with a constellationon a circle is constant envelope


Polar Modulation

RL

C∞

Vbias < Vthresh

B(t) cos (ωt + φ(t))A(t)

A0 cos (ωt + φ(t))

While the amplifier is a non-linear function of the inputamplitude, the Class C amplifier can be made to act fairlylinearly to the collector voltage.

By driving the amplifier into “saturation” in each cycle, e.g.with a large enough swing to rail the supplies, then the outputpower is related to the voltage supply. Collector modulationthen uses the power supply to introduce amplitudemodulation into the carrier.


Class C Approximate Analysis

IDD

IDQ2y

Assume current pulses are sine wave tips, conduction angle is2y

IDD cos y = IDQ y = cos−1(

IDQ

IDD

)iD(θ) =

−IDQ + IDD sin θ IDD cos θ ≥ IDQ

0 otherwise


Class C Average Current

To make the integral easy to calculate, change variables tothe range of y to 0.

IDC from supply:

IDC =1

2π

∫ 2π

0iD(θ)dθ =

1

π

∫ y

0(IDD cos θ′ − IDQ)dθ′

IDC =1

π(IDD sin y − IDQy)

IDC =IDD

π(sin y − y cos y)


Class C Analysis (cont)

Output voltage is: VOM = Fund−iD(θ)RLSince iD is an odd function, the Fourier series will only yieldsine terms

VOM =−2RL

2π

∫ 2π

0iD(θ) sin θdθ =

2RL

π

∫ y

0(IDD cos θ−IDQ) cos θdθ

VOM =2RL

π(

IDDy

2+

IDD sin 2y

4− IDQ sin y)

VOM =IDDRL

2π(2y − sin 2y)

Note: IDQ sin y = IDD cos y sin y = IDD2 sin 2y

DC power from prev page:PDC = IDCVCC = IDDVCC

π (sin y cos y)

Assuming that max swing ∼ VCC :

VOM ≈ VCC =IDDRL

2π(2y − sin 2y)


Class C Efficiency

PDC ≈2V 2

CC

RL

sin y − y cos y

2y − sin 2y

Power to load (assuming VCC swing): PL =V 2CC

2RL

Ideal Efficiency:

η =PL

PDC=

1

4

2y − sin 2y

sin y − y cos y

limy→0

η(y) = 100% (ideal class C)

η(π) = 50% (tuned-circuit Class A)

η(π/2) = 78.5% (single-ended Class B)

For small conduction angle current pulses approachdelta-function.Many practical issues make Class C difficult to design.


Power Capacity of Class C

0 50 100 150 200 250 300 3500.0

0.1

0.2

0.3

0.4

Class AClass B

Conduction Angle

Pow

er C

apab

ility

Vdrain,max = 2VCC

ID,max = IDD − IDQ

= IDD(1− cos y)

PC =Po

2VCC IDD(1− cos y)

=1

4π

2y − sin 2y

1− cos y

The power capacity of Class C is low at low conductionangles. Peak is Class AB.


Class D and F


Class F Circuit

3ω0

ω0 RL

The above circuit isolates the fundamental resonant load fromthe drain at the third harmonic, allowing the drain voltage tocontain enough third harmonic to create a more square likewaveform.

It can be shown that just adding a third harmonic boost theefficiency from 78% (Class B) to 88%.


Class F

ic(t) vc(t)

Since it’s difficult to create extremely narrow pulses at highfrequency, we can take a different approach and attempt tosquare up the drain voltage.


Quarter Wave Class F

ω0 RL

Z0

ℓ = λ0/4

RFC

In this circuit a quarter wave transformer converts the lowimpedance at the load (due to the capacitance) at harmonicsof the fundamental to a high impedance for all odd harmonics.Even harmonics are unaltered as they see a λ/2 line.

In theory then we can create a perfect square wave at thedrain of the transistor and thus achieve 100% efficiency.


Ideal Class D Switching Amplifier

S1

S2

RL

VDD

If give up linearity, then we can create some intrinsicallyefficient amplifiers using switches. An ideal switch does notdissipate any power since either the voltage or current is zero.

By varying the switching rate, we can impart phase/frequencymodulation onto the load.

A real switch has on-resistance and parasitic off capacitanceand conductance.


MOS Class D Inverter

RL

VDD

Switching amplifiers are realized with transistors operating asswitches. MOS transistors make particularly good switches.

The input voltage is large enough to quickly move theoperating point from cut-off to triode region.


Class D Waveforms

0V

id(t)VDDvd(t)

The MOS drain voltages switches from VSS to VDD at therate of the input signal.

A series LCR filter only allows the first harmonic of voltage toflow into the load. Since current only flows through a devicewhen it’s fully on (ideally VDS = 0), little power dissipationoccurs in the devices.


Class D Efficiency

We can see that the efficiency has to be 100% for an idealswitch. That’s because there is no where for the DC power toflow except to the load.

The collector voltage can be decomposed into a Fourier series

vd =VDD

2(1 + s(ωt))

s(θ) = sign(sin(θ)) =4

π

(sin θ +

1

3sin 3θ +

1

5sin 5θ + · · ·

)The load current is therefore

iL =4

π

VDD

2Rsin θ =

2VDD

πRLsin θ


Class D Efficiency (cont)

The load power is thus

PL =i2LRL

2=

2

π2V 2DD

RL≈ 0.2

V 2DD

RL

The drain current are half-sinusoid pulses. The averagecurrent drawn from the supply is the average PMOS current

IQ =Ipπ

=2

π2VDD

RL

PDC = IQ · VDD =2V 2

DD

πRL= PL

As we expected, the ideal efficiency is η = 100%


Class D Reality

As previously noted, a real Class D amplifier efficiency islowered due to the switch on-resistance. We can make ourswitches bigger to minimize the resistance, but this in turnincreases the parasitic capacitance

There are two forms of loss associated with the parasiticcapacitance, the capacitor charging losses CV 2f and theparasitic substrate losses.

The power required to drive the switches also increasesproportional to Cgs since we have to burn CV 2f power todrive the inverter. A resonant drive can lower the drive powerby the Q of the resonator.

In practice a careful balance dictates the maximum switchsize.


Differential Class D

VDC

RL

L1 C1

f0

+vin

−

+−vin

−

Differential circuit have a huge benefit in ICs. First they havecommon mode rejection and also inject (ideally) less commonmode into the supplies. Makes system integration easier (e.g.VCO pulling). Also differential allows higher swings on loadfor a fixed supply, and less impact from bond-wire inductors.

Downside: Need a balun.


Differential Class D Analysis

Assume a high Q tank so that the output current is sinusoidal(phase φ will be computed)

iout = Io sin(θ + φ)

The voltage at the secondary of the transformer is given by

vo(θ) = nVDC s(t)− n2IoRon sin(θ + φ)

The fundamental component of the secondary load voltage isgiven by

vL(θ) = RLiout = nVDC4

πsin(θ)− n2IoRon sin(θ + φ)


Class D Analysis (cont)

From the above relation, it’s clear that the voltage andcurrent are in phase (φ = 0)

Io =4nVDC

πRL

1

1 + n2 RonRL

Each transistor conducts a half sinusoid pulse (similar todifferential Class B), so it’s DC value is

id1,DC = id2,DC =nIoπ

The DC power consumed is therefore

PDC = VDC (id1,DC + id2,DC ) =8n2VDC

π2RL

1

1 + n2 RonRL


Class D Efficiency

From the AC and DC power, we are now in a position tocalculate the efficiency

Pout =1

2I 20 RL =

8n2V 2DC

πRL

1

1 + n2 RonRL

η =Pout

PDC=

1

1 + n2 RonRL

Note that the switch on resistance is a key factor. We cannotarbitrarily increase it due to CVf 2 losses.


Estimating Switching Losses

We can estimate the switching losses by noting that thedevice “on”-resistance is related to the device gds,lin = gm,sat

Ron =1

gds≈ 1

gm,sat

ωT =gm

Cgs + Cgd=

1

Ron(Cgs + Cgd)

The total input power involves switching approximately2Cgs + 2γCgs , where γ is a technology parameter relating thedrain-bulk capacitance to the gate-source cap. Take γ ∼ 1 foran upper bound

Ploss = CtotV2DC f = 4CgsV 2

DC f = 4V 2DC f

1

ωTRon


Class D Power Handling Capability

The power handing capability of Class D is given by

vdrain,max = 2VDD

idrain,max = nIo

PC =Pout

2 · vdrain,max · idrain,max=

η

2π≤ 0.159

This compares favorably with Class A amplifiers.


Class D−1

VDC

IDC

RL

L1

C1

f0

is1 is2i1

vs1 vs2

IDC is1

vs1

IDC

The “Dual” Class D amplifier (interchange voltage/current ⇒square wave current, sinusoidal voltage, parallel LCR filter)

Chokes act like current sources. ZVS by “design” but only ifthere is no device capacitance to begin with.

vs1 =

0 0 < θ < π

− 4π IDCRL sin(θ) π < θ < 2π


Class E


Class E Amplifier

Switching PA like Class D but can absorb transistor parasiticcapacitance into load network. This allows the switch tobecome very large (low on-resistance).

The load network is design to ensure zero switching condition.

Figures: “Class-E RF Power Amplifiers,” by Nathan O. Sokal,Design Automation, Inc


Switching RF Power Amplifier

Switching amplifier = LC network and a switch

Low Q

Source: Patrick Reynaert and Michiel Steyaert



Switching amplifier = LC network and switch

High Q





perfect Q




Output power of Class E is low

Pout,E < 0.045V 2max

RLOAD

Compare to Class A

Pout,A < 0.125V 2max

RLOAD

0.35um technology, Vmax = 8V ⇒ Pout < 60mW at 50Ω



Class E Waveforms

128

DD

o

V

L

πω

Figure 6-3 Circuit configuration and characteristic waveforms of a Class-E PA

CMOS Power Amplifiers for

Wireless Communication,

King-Chun Tsai, Ph.D.

Dissertation, UC Berkeley,

2007.


Class E Issues

Problems with Class E include low power gain and largevoltage swings. The drain waveform can swing to more than3.5 times the supply voltage. This means the transistors haveto be able to handle much larger voltages.

Efficiency for this class of PA is extremely good. Powercapacity PC < 0.107, much better than Class C lowconduction angle operation.


First GSM CMOS Class E

149

in each stage and significantly relaxes the input driving requirement. Inserting cross-

coupled pairs effectively turn each gain stage into an injection locking oscillator and we

will discuss the injection locking mechanism in greater details later in this chapter.

Figure 7-1 Schematic of the 1-W 1.9GHZ CMOS Differential Class-E power amplifier

Use standard CMOS to achieve output power of 1WMeasured efficiency > 50%Use cross-coupled devices to boost driver capability (requiresinjection locking)

CMOS Power Amplifiers for Wireless Communication, King-Chun

Tsai, Ph.D. Dissertation, UC Berkeley, 2007.


Output Matching

Use chip-on-board testing (avoid lead inductance)

Use a microstrip balun to convert from differential tosingle-ended to drive antenna

Source: “A 1.9-GHz, 1-W CMOS Class-E Power Amplifier forWireless Communications,” King-Chun Tsai and Paul R. Gray


RF CMOS Class-E PA

Implemented in a 0.18 um CMOS technology



Chip micrograph



Other Classes


Class S

If the switching rate is much higher than the fundamental,then amplitude modulation can be converted to pulse-widthmodulation.

A low-pass filter at the output faithfully recreates theenvelope of the signal.


Class S Amplifier

RL

VDD

Amplitudeto PWM

Class S amplifiers are commonly used at low frequencies(audio) since the transistors can be switched at a much higherfrequency than the fundamental.

This allows efficiencies approaching 100% with good linearity.


Pulse Density Modulation

RF Pulse Train

Pulse-density modulation process

Mixer PA Filter

Inherent linearity

Improved efficiency in power backoff, but ...


Pulse Density Modulation Process

AM process ⇒ Extra harmonics

Tradeoff between oversampling ratio and Q

Out of band spectrumEfficiency

Noise shaping: digital ∆− Σ

Conclusions

No major efficiency advantage with Q< 5-10Linearity may be the compelling factor(almost) pure digital implementation!Need to run PDM process *as fast as possible*


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