two stage amplifier

Final Lab Design – Two-Stage Amplifier M. Do & J. Ramey

EGRE 224 – Introduction to Microelectronics

Final Design ProjectTwo-Stage Amplifier

Lab Section: Wednesday 1pm

Report submitted on: December 12, 2014

Marian DoJacob Ramey

PLEDGE:_______________________________________“On my honor, I have neither given nor received unauthorized aid on this assignment”

Introduction: In this final design project, we design, simulate, build and test a two-stage amplifier using

two NMOS (2N7000) transistors, and a given topology. We use the equations in the Background and Theory section to calculate for operation in the saturation region to ensure that our amplifier is operating as it should. Then using the data from the transistors from Lab 6, we design the two-stage amplifier with specific given values by completing DC and small signal analyses based on

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the theoretical behavior of the transistors. After the first calculations, we then simulate the amplifier in Multisim, comparing our simulation results to that of our calculated theoretical results. After running the simulations, we build and test the amplifier, using standard capacitor and resistor values, to get a voltage gain of +/- 25V/V +/- 2V.Background and Theory:

The negative-channel metal oxide semiconductor (NMOS) transistor is a type of metal oxide semiconductor field effect transistor (MOSFET). This type of transistor is negatively charged so the transistor turns on with the movement of electrons, as the source of n-channel carriers are electrons. PMOS transistors are opposite and the source carriers are holes.

For MOSFETs, there are three modes or regions; cutoff, triode, and saturation. For this lab, we will be focusing mostly on the saturation region and some on the triode and region. The following equations define the current ID at each of the regions,

Triode: ID=k'n(WL )( (V GS−V t )V DS−

V DS2

2 )Saturation: ID=

12k'

n(WL ) ((V GS−V t )

2 (1− λ ) )where k’n= electron mobility, W = gate width, L = gate length, VGS = gate to source voltage, Vt = threshold voltage, VDS = drain to source voltage, and λ = channel length parameter. If the condition V GS>V t is not met, or V GS<V t is met, the transistor is considered to be off, or in the cutoff region, where the current is 0. In the triode region, two conditions must be met, V GS>V t and V DS<(V GS – V t ). When the conditions, V GS>V t and V DS≥ (V GS –V t ) are met, it is in the saturation region.

From the equations shown above, we can see that when we change one variable, then we must change the other variables to make sure that the transistor’s region stays the same or if we want to have a specific ID. This makes the circuit able to be manipulated quite easily to get the output ID that you need necessary for your application.

The NMOS transistors that we use for this lab are 2N7000 n-channel MOSFETs, which have a max rating of 60V and 200mA. The pin assignment and typical I-V curves, as per lab information and the datasheet, are shown in figures B1 and B2, respectively.

Figure B1: Pin assignment

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Figure B2: Typical I-V CharacteristicsIn this final design, we look at the cascode and its characteristics. The cascode is a two-

stage amplifier that is composed of a transconductance amplifier, which is then followed by another amplifier, which buffers the output. The first stage of the amplifier is a common source amplifier. The drain of the first amplifier is connected to the gate of the second amplifier. The cascode’s characteristics include high input impedance, high gain, high bandwidth, and high stability, however, it usually requires a high voltage supply, meaning that the two transistors must be biased with a relatively high voltage at the drain (in this case, 15V). The gain of the cascode can be found by finding the gain of the first amplifier and then finding the gain of the second amplifier and multiplying the two.

Figure B3: Two-Stage Amplifier TopologyTo design an amplifier, both a DC circuit analysis and an AC circuit analysis are

required. In the DC analysis, the capacitors react as open circuits. This reduces the circuit to just resistors, the transistors, and VDD, as shown in Figure B4.

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Figure B4: Modified circuit for DC analysis – Transistor 1

Figure B5: Modified circuit for DC analysis – Transistor 2

Using the given values for VDD, VSS, RG, Vt, VGS from data, kn’, W, L, and VA, the overdrive voltage VOV, the channel modulation length λ, the current ID, the transconductance gm,

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the output resistance ro, and the source resistance RS can all be determined using the following equations. From this circuit, we can see that the voltage at the gateV G=0. Therefore:V S=V G−V GSV OV=V GS−V t

λ= 1V A

Because DC circuit analysis occurs in the saturation region,

ID=12kn ' (WL ) (V OV )

2

(1+λ )

gm=2 I DV OV

ro=1λ I D

V S+VDD=RS ( ID )

RS=V S+VDDID

For the AC analysis, we can use a small signal model, as seen in figure B5, first shorting the capacitors, as they as have infinite capacitance, and ignore all DC sources, as there is no more need to look at the DC portion of the circuit, since DC analysis was already performed. Then all that is left of the circuit is the AC or small signal components.

Using the following equations and the values given and found previously for gm, RG, Rsig, and RL, the values for the ratio of vi/Vsig, where vi is the voltage at the gate, the gain Av, the resistance at the drain RD, the DC voltage at the drain VD, and the output resistance ro, as seen from the load resistor ca be determined.

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vi=RG

RG+Rsig(V sig )

v iV sig

=RG

RG+R sig

AV=V outv

AV=vgs (−gm ) (RD∨r o∨RL )

v gsAV=(−gm ) (RD∨ ro∨RL)

AV=(−gm )(((r oRLro+RL )RD)

( roRLro+RL )+RD )Using the previous equation to solve for RD, then VD can then be determined.V DD−V D=ID (RD )−V D=ID (RD )−V DD

V D=V DD−ID (RD )

Procedure:

Figure P1: Two-Stage Amplifier Topology

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First we built the topology in Figure P1 in Multisim so that we have our circuit ready and built for testing. Then using figure P1, we drew the DC model of the two-stage amplifier so that we can calculate the necessary values. Our DC models can be seen in Figure P2 and P3.

Figure P2: Modified circuit for DC analysis – Transistor 1

Figure P3: Modified circuit for DC analysis – Transistor 2

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Since there are two transistors, we have two DC models. Using the transistors and data from Lab 6, we input the equations into Excel to do our calculations.

Next, we draw the AC model of the two stage amplifier, seen in Figure P4.

Figure P4: AC modelShown in P4, we then make an AC model of our amplifier. Using this model, we can then

calculate for our gain in Excel.In order to properly bias the transistors to get the right gain, the most important factor is

the resistor values. The DC voltage of the Gate, Drain, and Source we use mainly voltage and current division.

To find the voltage at the first gate VG1,

V G1=V DD( RG1B

RG1 A+RG1B)

And similarly we can find the voltage at the source using voltage division

V S 1=V DD ( RS1B

RS1 A+RS1B+RD1)

After finding the gate and source voltage, we determine VGS1 and then VOV1V GS1=V G1−V S1

V ov 1=V GS1−V t

This overdrive voltage is important because it is one part of the test for saturation- the mode of operation we need for proper amplification. The drain current is a function of the

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overdrive voltage some constants defined by the design of the transistor. In order to find the drain current through the first transistor, the following equation was applied

ID1=12knV ov

2 = 12kn (V GS1−V t )

2

The drain current is used to then solve for the transconductance of the transistor, gm

gm=2 IDV ov

Which is an important variable when determining the gain. The current through the drain is then given by

ID=−gmV GS

To calculate the voltage the second transistors gate, we use voltage division like at the first transistor taking advantage of the following equation

V G2=V DD( RG2B

RG 2A+RG2B)

The drain of the second transistor is connected directly to the DC voltage source, so its voltage is a constant 15V

V D2=15V

To calculate the voltage at the source of the second transistor, we use Ohm’s LawV S 2=ID2R s2

To calculate the gain, we need to find the ratio of the output voltage to the input voltage, where the output is measured across a 100Ω load resistor and the input is a 100mV 10 kHz sinusoidal signal. The gain is more easily calculated by finding the gain from A to B, then from B to C, then the total gain is simply the product of the individual gains. The gain resulting from the signal is given by voltage division

V G1=V sig( RG1 A+RG1B

RG1 A+RG1B+R sig )G0=

V G1

V sig=

RG1 A+RG1B

RG1 A+RG1 B+R sigThe gain given by the first transistor is given by

G1=1 (RS1 A∨RS1B )

V G1

Then the gain for the second transistor

G2=ID2 RS2

V G2

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Then the overall gain G is equal to the product of the gainGT=G0G1G2

After checking that the design is correct in Excel, that both transistors are operating in saturation and that our calculations in Excel match that of the results in Multisim, we build the circuit, using the PXI system, a power supply, two oscilloscope probes, DMM probes, a function generator cable, a power supply cable, two specified 2N7000 transistors, standard resistors to match the design, four 47uF capacitors, some wires, and a breadboard.

Before the power supply is connected to the board, make sure that that the power supply is supplying 15V. It is always possible that the voltage shown on the power supply is more or less than the voltage you need, in this case, 15V. Then build the circuit. The input voltage fed into the circuit from the function generator should be set to 50mV at 10kHz.Then take a screenshot of the output, showing 25V/V +/- 2V. To ensure that the amplifier follows the criteria, test the circuit at 200Hz. The cutoff frequency should be less than 200Hz, showing a gain of less than 17.6V/V.Experimental Results:Data Table 1: Resistances

Resistors

RG1a 2050000 Stage 2 RG2a 100000

RG1b 2000000 RG2b 51000

RD1 10000 RS2 51

RS1a 100 GainS2 626.8533703

RS1b 15000 ID2 0.043211123

GainS1 0.2968461 I2 9.93377E-05

ID1 0.00035531 Req 9.8944

I1 3.7037E-06

Data Table 2: Voltages Voltages Stage 1 VG1 7.40740741 Stage 2 VG2 5.066225166 VS1 5.33 VS2 2.2 VD1 11.4468765 VD2 15 Vt1 1.9235 Vt2 1.5 Vov1 0.15390741 Vov2 1.366225166 VGS1 2.07740741 VGS2 2.866225166

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VDS1 6.11687649 VDS2 12.8 VGD1 2.07740741 VGD2 -9.93377483

Data Table 3: Test for Saturation

Test q1 q2 Kn1 0.03state Kn2 0.0463off 0 0 gm1 0.02368749

triode 0 0 gm21.86657120

3saturation 1 1

Figure E1: Gain at 10kHz, with each voltage and current labeledIn Figure E1, each probe shows the values that we have calculated in Excel. We placed

the probes to ensure that our design was correct, with both values matching Excel and Multisim.

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Figure E2: Gain at 10kHzFigure E2 shows the output from the built circuit using the PXI systems at 10kHz. Here,

we have a gain of about 25V/V.

Figure E3: Gain at 200 HzTo show that our design is operating correctly, the input signal frequency was changed to

200Hz to show that the cutoff frequency is below 200Hz. This shows a gain of below 17.6V/V.Summary and Conclusions:

Transistors are an essential building block in any circuit that has even basic complexity. The vast amount of things that can be accomplished using these transistors in different ways has

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been advancing electronics since transistors were invented. The focus of this lab report was to use our knowledge of how transistors work to create an amplifier with very specific design restrictions. The gain was to be around 25V/V which is impossible to achieve with properly biasing the transistors.

The resistors determine the voltages that are at each of the terminals, and thus determine the mode of operation the transistor is in. Amplification of a signal occurs in the saturation region and we want to design our circuit such that it is in this region and, when a sinusoidal source is applied, the waveform is not chopped off. The most difficult part in designing this amplifier is finding the values for the resistors. Numerical solutions were used to help us achieve the voltages and gains we needed. Excel is a useful tool in that we can do fast calculations with a range of numbers and find the right value for our project. I had never used conditional logic in Excel but this proved to be very useful (and easy to implement) because I could see a real time test as to whether or not the transistor was biased correctly.

The correct configuration of an amplifier does not necessarily imply it will give the right results. It is difficult to change one value without severely affecting another. When choosing values for the resistor at the first gate we saw that adding 50k to a 2M ohm resistor we nearly took the transistor out the saturated region. Changing a value could bring the gain closer to your desired, but there would come a certain point where it didn’t matter how much you increased or decreased it- the change either had no effect or it took us out of saturation. Often times changing one values changes multiple other ones and we faced issues with circular references when defining the variables. The key to solving this is to choose a current that is consistent with data from the previous lab that shows it is in the saturation region with a certain VGS. After using this constant throughout the excel sheet, we can solve for values that work using that drain current, then use those new relations to define the current through the drain. The voltage gain of the circuit is very sensitive to the value of the gate voltage of the first transistor. The use of voltage division is the best way to get exactly the voltage you design by choosing a resistor such that a certain voltage will be dropped across with leaving you with what you need exactly.

By cascoding transistors, we are able to get a much larger gain than with single stage amplifiers and also we can more specifically define the cutoff regions using the capacitors. The larger capacitor values determine the lower cutoff frequency and when the capacitors are large enough they behave as short circuits at relatively low frequencies. The gain of the circuit by cascoding resulted in a positive waveform as well, whereas single stage amplifier generally result in negative gains.

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two stage amplifier

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