ultrasoundtogo - nano-tera 2016
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UltrasoundToGo
Giovanni De Micheli
Luca Benini
Jean-Yves Mewly
Joseph Sifakis
Lothar Thiele
Jean-Philippe Thiran
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What is needed?
1. A portable, inexpensive, low-power scanner
2. The scanner must be 3D
Acquires volumes; reduces threshold of operator’s expertise
Only other way to remotely acquire images: robotic arm; complex
3. Good enough imaging quality for the applications
4. A protocol to tag and remotely visualize the scans
ARTIS project by ESA
for space applications
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Professional 3D scannersexpensive, bulky, >500W
Efforts for mobility are usually 2D (still radiologist…)
First attempt at miniaturized 3D, but full of limitations
Related products
Siemens Acuson, Philips Epiq, Samsung WS80…
BK Ultrasound’s Sonic Window
To locate vessels for dialysis cannulation. Acquires
images 3 cm deep and only computes one cross-section.
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[…] MU’s US-304 portable ultrasound imager,
powered by ST […] aiming to […] diagnostics in
remote rural areas of Africa. 14.04.2016
Philips
Visiq
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2015/16 UltrasoundToGo Progress
Advanced modeling of the acquisition process (Matlab)
Co-designed new 3D probe (transducer and circuit)
in collaboration with Fraunhofer IBMT, Germany
Realized digital beamforming on a new FPGA platform
Developed toolchains for efficient mapping of ultrasound
beamforming onto parallel hardware architectures
Improved algorithms to use compressive sensing allowing
for a reduction in cabling and analog electronics requirements
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Development of a Matrix Array
Probe is essential to image quality
Collaboration project with Fraunhofer IBMT, DE
Fraunhofer: piezoelectric array(32x32 = 1024 elements),
analog cabling,
custom connector
IIS-ETHZ: miniaturized analog electronics, PCB layout
Final assembly imminent
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Array close-up
(last week)
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Probe Electronics Design
Reduces volume by 2X and cross-section by 3X compared
to previous prototype (30x33 mm – handheld) 9
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Probe and System Design
Sensor Array
(32x32 = 1024
elements)
4:1 analogMultiplexing
and amplification
256-channel I/O
Custom cabling
and connector Analog
front-end
Digital ultrasound
image formation
Fraunhofer imager (DiPhAS)
UltrasoundToGo imager
Offline or
realtime
Next steps:1. Connect to Fraunhofer’s
DiPhAS, acquire echoes, process
them offline on our digital imager
2. (Pending funding application)
Acquire same machine at EPFL as
bridge for realtime imaging 10
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Development Board
Kintex Ultrascale FPGA chip
Performs 1024-channel beamforming(delay, apodization, sum)
Gigabit Ethernet port
Currently used for input
of digitized echoes and
output of images
HDMI portWill be used for direct
video output (requires
on-chip scan conversion)
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FPGA Beamformer results
32x32=1024-channel in a single XCKU040 chip
Most high-end equipment supports only 256
Configurable volume: 73°x73°x10cm
64x64x600 = 2.5Mvoxels per frame
One insonification per frame
Beamformer operates at 125 MHz
Approximate power consumption: 4W Peak throughput: 50 fps
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Future View – 2016/17
Concentrates analog processing into the probe to reduce
costs and allow for efficient fully-digital data processing
Enables fully-in-house UltrasoundToGo imager 13
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3D beamforming per-nappe approach
High level of parallelisaton:
46,664 beamformer instances deployed toKalray MPPA-256
3D US deployed on Kalray MPPA-256
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Offline: 1. Computation of the WCET as a sum of WCCT and delay due to interferences
2. Optimization based on WCET providing real-time guarantiesOnline: Run-time optimizations based on actual execution times (AET)
Task
A
Task
C
ω(eAC)
Task
Bω(eAB)
Cluster 1 Cluster 2b(eAC)
IA TA0 ω(eAB)
FA
0
b(eAB)
IB
TB
0
0
b(eBA)
Online
Partitioning and placement
Mapping, Scheduling,buffer allocation
Run-time optimization
1. Many-core Kalray MPPA-256
2. Application
WCET overapproximation
3. Worst case computation time
(WCCT) in isolation
SMT
solver
SMT
solver
WCET
Updating the schedule
Tightening of the WCET by
pruning out interferences from
tasks not overlapping neither in
space nor in timeOffline
Tighter
WCET
4. Unified system model
Application Deployment
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Time running the whole application of the host processor:
Time when Beamforming is running on the Kalray MPPA-256 chip:
Probe = 12 x 12 phased array;
Volume depth = 4.5cm
ϕ,ϑ∈ [-38°, 38°];
fc = 4 MHz;
fs = 200 MHz
A blanket of echo signals that need to be stored on each cluster:
Memory required by one blanket is ~ 1MB
Probe = 64 x 64 phased array;
Volume depth = 4.5cm
ϕ,ϑ∈ [-38°, 38°];
fc = 4 MHz;
fs = 12 MHz
Two possible configurations:
~ 30s (1 thread) ~ 13 minutes (1 thread)
~ 0.5s ~ 14s
Possible 3D US configurations
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Mapping Algorithms to Architecture
Goal: Map application to system architecture towards apredictable and efficient execution.
How to specify the application? Neutral w.r.t. hardware or software.
High expressivity (adaptive, mode change)
CAL Actor Language
RVC-CAL designed and standardizedby MPEG group
Used to specify hardware and software
Conversion to Kahn process networks
for anaysis 17
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Adapteva Parallella board: Zynq dual core ARM A9 CPU and FPGA Epiphany 16-core coprocessor
→ Ideal test platform for HW/SW integration
Case Study
Case study:
2D beamforming
on the
parallella board
Presented at N-T
annual meeting
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Compressed Beamforming Framework
for 2D Ultrasound Imaging
Reducing memory footprint, data rate and cabling
is crucial for portable ultrasound
Compressed beamforming:
Acquire ultrasound echo signals with fewer sensors Design of new sensing strategies
Reconstruction with compressed-sensing-based algorithms
Classical
acquisition
Delay-and-
Sum
Compressed
beamforming
Compressed
acquisition High quality
image
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Results on in vivo carotids
Reference image
Standard image
reconstruction
algorithm
128 elements
CTR = -31dB
Proposed image
Compressed image
reconstruction
algorithm
32 elements
CTR = -31dB
Reference image
Standard image
reconstruction
algorithm
32 elements
CTR = -26dB21
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Compressed Beamforming Outlook
Compressed sensing
Acquires ultrasound echo signals with fewer sensors
Performs an iterative reconstruction of the high quality
image based on compressed-sensing algorithms
Results:
Significant data rate reduction (~75%)
Significant decrease of the memory footprint (~75%)
Image quality is preserved
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Summary
• Developed a front-end US system in collaboration with
Fraunhofer Institute
• Designed a full 1024 Channel Beamformer on a FPGA
• Power consumption lower than 4W• Developed a tool flow for realizing a beamformer on a
multiprocessor 16x16 core Kalray unit
• Designed compressed sensing algorithms for reducing
system size and power while preserving image quality
• Interacted with medical doctors at CHUV for advice
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UltrasoundToGo Current Staff
Integrated Systems Laboratory (EPFL-LSI)
Aya Ibrahim, Dr. Federico Angiolini, Prof. Giovanni De Micheli
Rigorous System Design Laboratory (EPFL-RiSD) Stefanos Skalistis, Dr. Alena Simalatsar, Prof. Joseph Sifakis
Signal Processing Laboratory (EPFL-LTS5)
A. Besson, Dr. R. Carrillo, Dr. M. Arditi, Prof. J.-Ph. Thiran
Integrated Systems Laboratory (ETHZ-IIS) Pascal Hager, Dr. Andrea Bartolini, Prof. Luca Benini
Computer Engineering and Networks Laboratory (ETHZ-TIK)
Andreas Tretter, Prof. Lothar Thiele
Service de radiodiagnostic et radiologie interventionnelle (CHUV)
Prof. Jean-Yves Meuwly 24
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Thanks for your attention!
Visit us at www.nano-tera.ch
www.nano-tera.ch
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