unit v peripherals
TRANSCRIPT
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PERIPHERALINTERFACING
Dr.P.Yogesh,
Senior Lecturer,
DCSE, CEG Campus,
Anna University, Chennai-25.
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I/O Basics
The microprocessor communicates with theperipherals in either of the two formats:asynchronous or synchronous
In synchronous mode the sender and the receiverare synchronized with the same clock.
In asynchronous mode, the communication takesplace at irregular intervals
The communication between the microprocessorand the peripherals is by and large asynchronous
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I/O Basics
The microprocessor receives or sends the
data in either of the two modes: parallel and
serial
In parallel mode entire word is transferred at
a time
In serial mode, one bit is transferred at a time
over a single line between themicroprocessor and the peripheral
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I/O Basics
The microprocessor uses two types of
mappings to identify the I/O devices
Memory mapped I/O
Direct I/O
The microprocessor uses a common bus to
transfer information between the processor
and the memory as well as the I/O devices
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I/O Basics
The distinction between a memory transfer
and an I/O transfer is made through the
control signals
Moreover the I/O devices and the memory
use separate address spaces
Such a mapping is called I/O mappedI/O
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I/O Basics
The other type of mapping used by themicroprocessors is Memory-Mapped I/O in whichthe I/O devices are treated alike memory
Same address space is shared between thememory and I/O devices and a common set ofcontrol signals are used
In this arrangement an address will refer to memory,if a memory device is connected there; it will refer to
an I/O location, if an I/O device is connected there In memory-mapped I/O no separate instructions are
needed to differentiate between the memory and I/Odevices
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I/O Basics
Data transfer between the microprocessor and theperipherals can be controlled either by themicroprocessor or by the peripherals
Most peripherals are slower than the microprocessor
and hence the conditions for the data transfer are tobe set up
In this case, conditions are set up by themicroprocessor and this type of transfer is calledmicroprocessor controlled data transfer
If the peripheral is faster than the microprocessorthen the conditions are set up by the peripheral andthis type of data transfer is called peripheralcontrolled data transfer
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Programmable InterfacingDevices
I/O functions can be done with the help of eithersimple integrated circuits or programmable devices
Latches and tri-state buffers are simple integrated
circuits whose capabilities are limited The major limitation of these devices is they are
hard-wired and hence each device can perform onlyone function
On the other hand, a programmable interfacingdevice is capable of performing various input/outputfunctions according to the way in which we programthe device
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Programmable InterfacingDevices This type of device can be set up to perform specificfunctions by writing an instruction (or instructions) in
its internal register
The internal register is called control register
The particular function the device will performdepends on the instruction we write into the controlregister
Hence it is possible to change the function at anytime
In general, programmable interfacing devices areflexible, versatile and economical
They are widely used in microprocessor basedproducts
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Programmable InterfacingDevices
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Matrix Keyboard andMultiplexed Display Interface
A matrix keyboard is a commonly used input device when morethan eight keys are necessary
A matrix keyboard reduces the number of connections and hencereduces the number of interfacing devices
The rows and columns do not have any connection and theconnection occurs when a key is pressed
In other words, we can say that pressing a key shorts one rowand column
The interfacing of a matrix keyboard requires one input port and
one output port Rows are connected to the output port and columns are
connected to the input port
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Matrix Keyboard andMultiplexed Display Interface
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Matrix Keyboard andMultiplexed Display Interface
The steps involved in this process are
Check whether all keys are open
Check a key closure
Identify the key
Find the binary key code for the key
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Matrix Keyboard andMultiplexed Display Interface
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Intel 8279 Keyboard/DisplayController
Intel 8279 is the keyboard/display controllerthat is used to interface the keyboard and thedisplay of a system to the microprocessor
The advantage of 8279 is that it is able todrive the signals for both the keyboard anddisplay and hence it is possible for themicroprocessor to concentrate in its routine
tasks The 8279 has two sections: keyboard and
display
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Intel 8279 Keyboard/DisplayController
The 8279 chip provides a set of four scan
lines and eight return lines for interfacing
keyboards and a set of eight output lines for
interfacing display
The keyboard portion can provide a scanned
interface to a 64-contact key matrix
The keyboard portion interfaces an array ofsensors or a strobed interface keyboard
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Intel 8279 Keyboard Section
Keyboard depressions can be 2-key lockout
or N-key rollover
Keyboard entries are debounced and strobed
in an 8-charcter FIFO
If more than 8 characters are entered,
overrun status is set
Key entries set the interrupt output line to the
CPU
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Intel 8279 Display Section
The display portion provides a scanned displayinterface for LED, incandescent and other populardisplay technologies
Both numeric and alphanumeric segment displays
may be used as well as simple indicators The 8279 has 16*8 display RAM which can be
organized into dual 16*4
The RAM can be loaded or interrogated by the CPU
Both right entry, calculator and left entry typewriterdisplay formats are possible
Both read and write of the display RAM can be donewith auto-increment of the display RAM address
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Functional Block Diagram
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Signal description 8279 pins
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Pin diagram and Signaldescription of 8279
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2 Key Lockout
In scanned keyboard mode with 2 key lockout, whena key is pressed, a debounce logic comes intooperation
During the next two scans, the other keys are
checked for closure and if no other is pressed thefirst pressed key is identified
The key code of the identified key is entered into theFIFO with SHIFT and CNTL status, provided that
FIFO is not full, that is it has at least one byte free If the FIFO does not have any free byte, naturally
the key data will not be entered and the error flag isset
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N-Key Rollover
In scanned keyboard with N-key rollover each keydepression is treated independently
When a key is pressed the debounce circuit waits
for two keyboard scans and then checks whetherthe key is still depressed
If it is still depressed, the code is entered in FIFORAM
Any number of keys can be pressed simultaneouslyand recognized in the order, the keyboard scanrecorded them
All the codes of such keys are entered into FIFO
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Keyboard/Display Mode Set
DD is the display mode and KKK is the
keyboard mode
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Keyboard/Display Mode Set
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Keyboard/Display Mode Set
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Programmable Clock
PPPPP is a 5-bit binary constant. The input
frequency is divided by a decimal constant
ranging from 3 to 31, decided by the bits of
an internal prescalar PPPPP
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Read FIFO/Sensor RAM
XDont Care
AI Auto Increment flagAAA Address pointer to 8-bit FIFO RAM
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Read Display RAM
AI is auto increment flag and AAAA, the 4-bit
address, points to the 16-byte display RAM
that is to be read. If AI=1, the address will be
automatically, incremented after each read orwrite to the display RAM.
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Write Display RAM
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Clear Display RAM
1 0 X All zeros (X dont care) AB = 00
1 1 0 A1-A2 = 2 (0010) and B3-B0 = 00 (0000)
1 1 1 All ones (AB=FF), i.e. clear RAM
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End Interrupt/Error Mode Set
For N-key rollover mode, if the E bit is programmed to be 1,
the 8279 operates in special error mode
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Interfacing Keyboard/Display to the
Microprocessor Using Intel 8279
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CRT Fundamentals
It is the oldest and most popular display
technology
Advantages of CRT are as follows
Low cost because of volume of production
Speed of updating and the retention of image is
good
Colour display is available Text and graphics display modes
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CRT Fundamentals
Disadvantages of CRT are as follows
Large size and weight: Typical CRT displays are
at least as deep as they are wide
High voltage and power consumption
Also generate a lot of heat
CRT displays are glass vacuum tubes, and are
therefore relatively fragile The microprocessor interface is relatively complex
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Basic Components of CRT
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Major Interface Signals of CRT
H i l d V i l
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Horizontal and Vertical syncPulses
H i l d V i l
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Horizontal and Vertical syncPulses
Horizontal sync: Retraces beam to the left edge ofthe screen
Horizontal oscillator: Saw-tooth signal that sweepsthe beam horizontally across the screen
Vertical sync: Causes beam to retrace to the top ofthe screen
Vertical oscillator: Saw-tooth signal applied to thevertical deflection amplifier to move the beam downthe screen
Video signal: Determines the intensity of the beamthat will strike the screen. The signal is amplifiedand applied as the accelerating voltage in the CRT
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Internal Architecture of 8275
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Read/Write Control Logic
CS A0 RD WR Operations
0 0 0 1 Read 8275 parameter Reg0 0 1 0 Write 8275 parameter Reg
0 1 0 1 Read 8275 status Reg
0 1 1 0 Write 8275 command Reg
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Pin Diagram of 8275
I t f i S h ti f 8275
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Interfacing Schematic of 8275with an 8257 DMAC
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Coprocessors
Some applications require extremely fast and
complex math functions which are not
provided by a general purpose processor
Such functions as square root, sine, cosine,
and logarithms are not directly available in a
general purpose processor
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Coprocessors
Software routines required to implement
these functions tend to be slow and not very
accurate
Integer data types and their arithmetic
operations (i.e., add, subtract, multiply and
divide) which are directly available on general
purpose processors, still may not meet theneeds for accuracy, speed and ease of use
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Coprocessors
Providing fast, accurate, complex math can be quite
complicated, requiring large areas of silicon on
integrated circuits
A general data processor does not provide thesefeatures due to the extra cost burden that less
complex general applications must take on
For such features, a special numeric data processor
is required one which is easy to use and has ahigh level of support in hardware and software
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8087 Coprocessor
The 8087 is a numeric data coprocessor
which is capable of performing complex
mathematical functions while the host
processor (i.e. the main CPU) performs moregeneral tasks
It supports the necessary data types and
operations and allows use of all the currenthardware and software support for the 8086/8
and 80186/8 microprocessors
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8087 Coprocessor
The fact that the 8087 is a coprocessormeans it is capable of operating in parallelwith the host CPU, which greatly improves
the processing power of the system The 8087 can increase the performance of
floating point calculations by 50 to 100 times,providing the performance and precision
required for small business and graphicsapplications as well as scientific dataprocessing
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CU & NEU
The 8087 is divided into two sections internally namely theControl Unit (CU) and the Numeric Extension Unit (NEU)
The numeric extension unit executes all the numeric processorinstructions while the control unit receives, decodes instructions,reads and writes memory operands and executes the 8087control instructions
These two units may work asynchronously with each other
The control unit is mainly responsible for establishingcommunication between the CPU and memory and also forcoordinating the internal coprocessor execution
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Internal Architecture of 8087
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Status Word
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Status Word
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Tag Word
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Instruction and Data Pointer
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Control Word
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Control Word
C i ti b t
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Communication betweenMicroprocessor and Coprocessor