7/26/2019 VLSI-5 Short Channel Effects.pdf

1/9

Channel-Length Modulation

The pinch-off point moves toward the source as VDS

increases.

The length of the inversion-layer channel becomes shorter with increasing VDS.

ID increases (slightly) with increasing VDS in the saturation region of operation.

satDDSTHGSoxnsatD VVVVL

WCI ,

2

, 12

1

is the channel length modulation coefficient.

L

L

LLLIDsat 1

11

DSsatDS VVL

7/26/2019 VLSI-5 Short Channel Effects.pdf

2/9

and L

The effect of channel-length modulation is less for a long-channel MOSFET than for a short-channel MOSFET.

7/26/2019 VLSI-5 Short Channel Effects.pdf

3/9

Velocity Saturation

In state-of-the-art MOSFETs, the channel is very short (

7/26/2019 VLSI-5 Short Channel Effects.pdf

4/9

Impact of Velocity Saturation

Recall that

If VDS > EsatL, the carrier velocity will saturate and hence the

drain current will saturate:

ID,sat is proportional to VGSVTH rather than (VGS VTH)2

ID,sat is not dependent on L

ID,sat is dependent on W

)()( yvyWQI invD

satTHGSoxsatinvsatD vVVWCvWQI ,

7/26/2019 VLSI-5 Short Channel Effects.pdf

5/9

ID,sat is proportional to VGS-VTH rather than (VGS-VTH)2

VD,sat is smaller than VGS-VTH

Channel-length modulation is apparent (?)

Short-Channel MOSFET ID-VDS

P. Bai et al. (Intel Corp.),

Intl Electron Devices Meeting, 2004.

7/26/2019 VLSI-5 Short Channel Effects.pdf

6/9

In a short-channel MOSFET, the source & drain regions each support

a significant fraction of the total channel depletion charge QdepWL

VTH is lower than for a long-channel MOSFET

As the drain voltage increases, the reverse bias on the body-drain PN

junction increases, and hence the drain depletion region widens.

VTH decreases with increasing drain bias.

(The barrier to carrier diffusion from the source into the channel is reduced.)

ID increases with increasing drain bias.

Drain Induced Barrier Lowering (DIBL)

7/26/2019 VLSI-5 Short Channel Effects.pdf

7/9

NMOSFET in OFF State

We had previously assumed that there is no channel currentwhen VGS < VTH. This is incorrect!

As VGS is reduced (toward 0 V) below VTH, the potential barrier to

carrier diffusion from the source into the channel is increased.

ID

becomes limited by carrier diffusion into the channel, rather

than by carrier drift through the channel.

(This is similar to the case of a PN junction diode!)

ID varies exponentially with the potential barrier height at the

source, which varies directly with the channel potential.

7/26/2019 VLSI-5 Short Channel Effects.pdf

8/9

Sub-Threshold Leakage Current

Recall that, in the depletion (sub-threshold) region of operation,

the channel potential is capacitively coupled to the gate potential.

A change in gate voltage (VGS) results in a change in channel

voltage (VCS):

Therefore, the sub-threshold current (ID,subth) decreases

exponentially with linearly decreasing VGS/m

mVCC

CVV

GSdepox

ox

GSCS

/

log (ID)

VGS

ID

VGS

mV/dec60)10(ln

)(log1

10

T

GS

DS

mVS

dV

IdS

Sub-threshold swing:

7/26/2019 VLSI-5 Short Channel Effects.pdf

9/9

VTH Design Trade-Off

Low VTH is desirable for high ON-state current:

ID,sat (VDD - VTH) 1 < < 2

But high VTH is needed for low OFF-state current:

VTH cannot be

reduced aggressively.

Low VTH

High VTH

IOFF,high VTH

IOFF,low VTH

VGS

log ID

0