vlsi design rules
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Rules to draw layoutsTRANSCRIPT
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VLSI Design rules and layoutsBy Y. Anil Kumar13331D5701M.TECH(VLSI) 1st year 1st semOverview Based Design rulesStick and Layout encoding rulesLayouts
Based Design rulesHow current ID varies?How capacitance and resistance value varies?How parasitic components arise?How to control these parameters? Based Design rules
Fig. Design rules for wires
Fig. Transistor Design rulesContactsPoly silicon to metal and metal to diffusionContact CutViaButting contactBuried contact
Via and cut
Fig. Contacts(NMOS and CMOS)Butting
Buried contact
Buried and Butting contacts
Buried and Butting contacts
Contd.
Layout encoding
Symbol of transistor
Encoding of transistors
CMOS inverter
NMOS load inverter
CMOS NOR
CMOS NAND
NMOS load NOR
NMOS load NAND
ReferencesEssentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A. Pucknell, Sholeh Eshraghian.CMOS Digital Integrated Circuits Analysis and Design Sung-Mo Kang, Yusuf Leblebici.VLSI Design K Lal Kishore, V.S.V. Prabhakar
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