2X-3Xthicker coverage

Insu�cient silicide coverage slows charge transfer from the active region to circuit wiring.

CURRENT TECHNOLOGY

ENDURA CIRRUS HT Co PVD SYSTEM

Robust coverage of low-resistivity Co silicide speeds charge transfer to improve device performance.

HOW CAN MATERIALS ENGINEERING REDUCE RC DELAY?

CONTRIBUTORS

- Increases exponentially at 1xnm nodes- Impedes future scaling- Slows performance (e.g., data retrieval from memory)

WHAT IS RC DELAY?

- Resistance driven by shrinking conductor dimensions and increased electron scattering from grain boundaries and impurities- Challenges in fabricating low- resistivity metal/semiconductor interfaces- Materials limits to achieving ultra-low capacitance insulators

R

DELAY

C

resistance — the di�culty a current has in passing through a conducting material.

capacitance — the degree to which an insulating material holds a charge.

slowness of signal speed through circuit wiring as a result of R and C

RC DELAY: THE INTERCONNECT CHALLENGE

10-15%lower resistivity

Impurities and surface roughness impede progress of electrons through circuit wiring.

CURRENT TECHNOLOGY

ENDURA VERSA XLR2 W PVD SYSTEM

Purer, smoother tungsten lowers circuit resistivity.

500 400 300 200 100 0

25

20

15

10

5

0

2xnm DRAM

1xnm DRAM

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

1.2

1.0

0.8

0.6

0.4

0.2

0.0

Increase Resistivity (Relative Unit)

Sens

ing

Mar

gin

(Rel

ativ

e U

nit)

Film Thickness (Å)

Resi

stiv

ity

(µoh

m-c

m)

Resistance increases significantly as metal bitlines shrink.

DRAM sensitivity to bitline signals decreases as resistance increases.

WHY MUST RC DELAY BE RESOLVED?