wireless apptitude examination system using arm 7

8/20/2019 WIRELESS Apptitude Examination System Using ARM 7

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Introduction

Wireless technology is in highest demand because of its various features.

Every industry is trying to capture its benets. This project deals with the

automation of traditional examination procedure with the help of wireless

technology

In this project every user will have its own Electronic Answer Pad. This

answer pad is a combination of keypad and display so that user can enter

and view the selected answer of a particular !uestion from a given !uestion

paper. "nce the exam is over all the answers of users will be sent to server

system via Zigbee Technology, the server system will then analy#e the

answers with the pre loaded answer sheet in order to generate the results of

all users.


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Block Diagram


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Block Diagram Description

$. Electronic %nswer &ad

This is a hand held unit which will act as answer pad for all users. It will

contain a keypad with various keys like option keys % ' ( ) etc to select

the answer "* )E+ET in order to enter or modify the selected answer of a

ny !uestion

in order to view the !uestion number and selected answer this answer pad

will also contain a display unit also in order to send the result it will use the

,igbee module

-. ,igbee odule

,igbee technology is the low power consumption technology it can be use

for long range data transfer. We are using ,igbee module in order to transfer

and receive the user data from answer pad


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/. %0 +&( -$12

It is the heart of the entire system and used for data analysis and storage. It

will capture the all the answers feed by users and will do the comparison

with standard answers enter by system operator. ARM7 is a generation

of ARM processor designs. This generation introduced the Thumb 16-bit instruction set

providing improved code density compared to previous designs. The most widely used ARM7

designs implement the ARMvT architecture! but some implement ARMv" or ARMv#T$%. All

these designs use a &on 'eumann architecture! thus the few versions comprising a cache do not

separate data and instruction caches.

The '() *founded by )hilips+ ,)1/ is an ARM7T0M-2 based high-performance "-bitR2 Microcontroller with Thumb e3tensions #145 on-chip lash RM with n-2ystem

)rogramming *2)+ and n-Application )rogramming *A)+! "45 RAM! &ectored nterrupt

ontroller! Two 18bit A0s with 1 channels! 925 .8 ull 2peed 0evice ontroller! Two

9ARTs! one with full modem interface. Two serial interfaces! Two 2) serial interfaces Two

"-bit timers! :atchdog Timer! ):M unit! Real Time loc; with optional battery bac;up!

5rown out detect circuit ?! n-chip crystal

oscillator and n-chip ),,.

Features and benefits

.1 4ey features

@ 16-bit="-bit ARM7T0M-2 microcontroller in a tiny ,)6 pac;age.

@ / ;5 to 8 ;5 of on-chip static RAM and " ;5 to #1 ;5 of on-chip flash memory.

1/-bit wide interface=accelerator enables high-speed 68 M>? operation.

@ n-2ystem )rogramming=n-Application )rogramming *2)=A)+ via on-chip boot

loader software. 2ingle flash sector or full chip erase in 88 ms and programming of

#6 5 in 1 ms.

@ $mbedded$ RT and $mbedded Trace interfaces offer real-time debugging with the

on-chip RealMonitor software and high-speed tracing of instruction e3ecution.

@ 925 .8 ull-speed compliant device controller with ;5 of endpoint RAM.

http://en.wikipedia.org/wiki/ARM_architecturehttp://en.wikipedia.org/wiki/Von_Neumann_architecturehttp://en.wikipedia.org/wiki/ARM_architecturehttp://en.wikipedia.org/wiki/Von_Neumann_architecture


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n addition! the ,)16=/ provides / ;5 of on-chip RAM accessible to 925 by 0MA.

@ ne or two *,)11= vs. ,)1=6=/+ 18-bit A0s provide a total of 6=1

analog inputs! with conversion times as low as . s per channel.

@ 2ingle 18-bit 0A provides variable analog output *,)1==6=/ only+.

@ Two "-bit timers=e3ternal event counters *with four capture and four compare

channels each+! ):M unit *si3 outputs+ and watchdog.

@ ,ow power Real-Time loc; *RT+ with independent power and " ;>? cloc; input

An Introduction to the ARM 7 Architecture

The principle feature of the ARM 7 microcontroller is that it is a register based load-and-

store architecture with a number of operating modes. :hile the ARM7 is a " bit

microcontroller! it is also capable of running a 16-bit instruction set! ;nown as BT>9M5C. This

helps it achieve a greater code density and enhanced power saving. :hile all of the register-to-

register data processing instructions are single-cycle! other instructions such as data transfer

instructions! are multi-cycle. To increase the performance of these instructions! the ARM 7 has a

three-stage pipeline. 0ue to the inherent simplicity of the design and low gate count! ARM 7 is

the industry leader in low-power processing on a watts per M) basis. inally! to assist the

developer! the ARM core has a built-in %TA< debug port and on-chip Bembedded $C that

allows programs to be downloaded and fully debugged in-system.

n order to ;eep the ARM 7 both simple and cost-effective! the code and data regions are

accessed via a single data bus. Thus while the ARM 7 is capable of single-cycle e3ecution of all

data processing instructions! data transfer instructions may ta;e several cycles since they will

reDuire at least two accesses onto the bus *one for the instruction one for the data+. n order to

improve performance! a three stage pipeline is used that allows multiple instructions to be

processed simultaneously.

The pipeline has three stagesE $T>! 0$0$ and $($9T$. The hardware of each stage is

designed to be independent so up to three instructions can be processed simultaneously. The

pipeline is most effective in speeding up seDuential code. >owever a branch instruction will


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cause the pipeline to be flushed marring its performance. As we shall see later the ARM 7

designers had some clever ideas to solve this problem.

ARM-3-StagePipeline

ARM7 )rogramming Model

The programmerFs model of the ARM 7 consists of 1# user registers! as shown in ig. "! with

R1# being used as the )rogram ounter *)+. 2ince the ARM 7 is a load-and-store architecture!

an user program must load data from memory into the )9 registers! process this data and then

store the result bac; into memory. 9nli;e other processors no memory to memory instructions

are available.

ig ,oad And 2tore Architecture

As stated above R1# is the )rogram ounter. R1" and R1 also have special functionsE R1" is

used as the stac; pointer! though this has only been defined as a programming convention.

9nusually the ARM instruction set does not have )92> and )) instructions so stac; handling


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is done via a set of instructions that allow loading and storing of multiple registers in a single

operation. Thus it is possible to )92> or )) the entire register set onto the stac; in a single

instruction. R1 has special significance and is called the Blin; registerC. :hen a call is made to

a procedure! the return address is automatically placed into R1! rather than onto a stac;! as

might be e3pected. A return can then be implemented by moving the contents of R1 into R1#!

the ). or multiple calling trees! the contents of R1 *the lin; register+ must be placed onto the

stac;.

.

3ig / 4ser ode 0egister odel

n addition to the 16 )9 registers! there is a current program status register *)2R+. This

contains a set of condition code flags in the upper four bits that record the result of a previous

instruction! as shown in ig . n addition to the condition code flags! the )2R contains a

number of user-configurable bits that can be used to change the processor mode! enter Thumb

processing and enable=disable interrupts.


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urrent )rogram 2tatus Register and lags

Exception and Interrupt Modes

The ARM 7 architecture has a total of si3 different operating modes! as shown below. These

modes are protected or e3ception modes which have associated interrupt sources and their own

register sets.

9serG This mode is used to run the application code. nce in user mode the )2R cannot be

written to and modes can only be changed when an e3ception is generated.

G *ast nterrupt reuest+ This supports high speed interrupt handling. $0 opcode is not an ARM instruction! an undefined

instruction e3ception will be generated.

The 9ser registers R8-R7 are common to all operating modes. >owever mode has its own

R/ HR1 that replace the user registers when is entered. 2imilarly! each of the other modes

have their own R1" and R1 so that each operating mode has its own uniDue 2tac; pointer and


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,in; register. The )2R is also common to all modes. >owever in each of the e3ception modes!

an additional register - the saved program status register *2)2R+! is added. :hen the processor

changes the current value of the )2R stored in the 2)2R! this can be restored on e3iting the

e3ception-mode.


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Wireless %nswer &ad 3or %ptitude Examinations

ig # ull Register 2et or ARM 7

Entry to the Exception modes is through the interrupt vector table.Exceptions in the %0 processor can be split into three distinct types.5i6 Exceptions caused by executing an instruction these include softwareinterrupts undened instruction exceptions and memory abort exceptions5ii6 Exceptions caused as a side e7ect of an instruction such as a abortcaused by trying to fetch data from an invalid memory region.5iii6 Exceptions unrelated to instruction execution this includes reset 3I8 and

I08 interrupts.


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!".#$.% &tandard

29-.$:.1 is a standard for wireless communication issued by the IEEE

5Institute for Electrical and Electronics Engineers6. The IEEE is a technical

professional association that has written numerous standards to promote

growth and interoperability of existing and emerging technologies. IEEE has

published the standards that dene communication in areas such as the

Internet &( peripherals industrial communication and wireless technology.

%s a few examples the IEEE 29-.$$ standard denes communication for

wireless +%; and 29-.$< denes communication for broadband wireless

etropolitan %rea ;etworks. While both of those wireless standards are

concerned with higher bandwidth Internet access applications 29-.$:.1 was

developed with lower data rate simple connectivity and battery application

in mind. The 29-.$:.1 standard species that communication can occur in

the 2# or the -.199=-.12/: @># Industrial

Acientic and edical 5IA6 bands.

While any of these bands can technically be used by 29-.$:.1

devices the -.1 @># band is more popular as it is open in most of the

countries worldwide. The 2# band is specied primarily for European

use whereas the ?9-=?-2 ># band can only be used in the 4nited Atates

(anada and a few other countries and territories that accept the 3((

regulations. The 29-.$:.1 standard species that communication should

occur in : ># channels ranging from -.19: to -.129 @>#. In the-.1 @>#

band a maximum over=the=air data rate of -:9 kbps is specied but due to

the overhead of the protocol the actual theoretical maximum data rate is

approximately half of that. While the standard species : ># channels only

approximately - ># of the channel is consumed with the occupied

bandwidth. %t -.1 @># 29-.$:.1 species the use of )irect Ae!uence Apread

Apectrum and uses an "7set 8uadrature &hase Ahift *eying 5"=8&A*6 with


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half=sine pulse shaping to modulate the 03 carrier. The graph below shows

the various channels at the spacing specied by 29-.$:.1.

The 29-.$:.1 standard allows for communication in a point=to=point or a

point=to=multipoint conguration. % typical application involves a central

coordinator with multiple remote nodes connecting back to this central host.

)igiBs C'eeD 29-.$:.1 "E 03 modules can be set up to operate in a point=

to=point point=to=multipoint or a peer=to=peer conguration. While standard

29-.$:.1 always re!uires a coordinator the )igi radios are set up so that a

coordinator is not re!uired.


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)igiBs C'eeD 29-.$:.1 "E 03 modules can be set up to operate in a point=

to=point point=to=multipoint or a peer=to=peer conguration.While standard

29-.$:.1 always re!uires a coordinator the )igi radios are set up so that a

coordinator is notre!uired.

ZigBee

,ig'ee is a protocol that uses the 29-.$:.1 standard as a baseline and adds

additional routing and networking functionality. The ,ig'ee protocol was

developed by the ,ig'ee %lliance. The ,ig'ee %lliance is a group of

companies that worked in cooperation to develop a network protocol that

can be used in a variety of commercial and industrial low data rate

applications. ,ig'ee is designed to add mesh networking to the underlying

29-.$:.1 radio. esh networking is used in applications where the range

between two points may be beyond the range of the two radios located at

those points but intermediate radios are in place that could forward on any

messages to and from the desired radios.


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%s an example in the gure above suppose you want to transmit data from

point % to point ' but the distance was too great between the points. The

message could be transmitted through point ( and a few other radios to

reach the destination. The ,ig'ee protocol is designed so that if a number of

di7erent radios were deployed as in the gure above the radios would

automatically form a network without user intervention. The ,ig'ee protocolwithin the radios will take care of retries acknowledgements and data

message routing. ,ig'ee also has the ability to self=heal the network. If the

radio at point ( was removed for some reason a new path would be used to

route messages from % to '. )evices in the ,ig'ee specication can either

be used as End )evices 0outers or (oordinators. 0outers can also be used


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as End )evices. Aince the ,ig'ee protocol uses the 29-.$:.1 standard to

dene the &>F and %( layers the fre!uency signal bandwidth and

modulation techni!ues are identical. 'ecause ,ig'ee was designed for low

power applications it ts well into embedded systems and those marketswhere reliability and versatility are important but a high bandwidth is not.

The following table o7ers a comparison of features with several other

popular wireless technologies and their di7erent applications.


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'hat Does ZigBee Do(

$. )esigned for wireless controls and sensors

-. "perates in &ersonal %rea ;etworks 5&%;Gs6 and device=to=device networks

/. (onnectivity between small packet devices

1. (ontrol of lights switches thermostats appliances etc

ZigBee )re*uencies

$. "perates in 4nlicensed 'ands

-. IA -.1 @># @lobal 'and at -:9kbps

/. 2# European 'and at -9kbps

1. ?$: ># ;orth %merican 'and at 19kbps

ZigBee+IEEE !".#$.% market eature

$. +ow power consu-. mption

-. +ow cost

/. +ow o7ered message throughput

1. Aupports large network orders 5H


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Liuid !r"stal displa" #L!$%&

The three control lines are $'! R2! and R:.

The $' line is called I$nable.I This control line is used to tell the ,0 that you are sending it

data. To send data to the ,0! your program should ma;e sure this line is low *8+ and then set

the other two control lines and=or put data on the data bus. :hen the other lines are completely

ready! bring $' high *1+ and wait for the minimum amount of time reDuired by the ,0

datasheet *this varies from ,0 to ,0+! and end by bringing it low *8+ again.

The R2 line is the IRegister 2electI line. :hen R2 is low *8+! the data is to be treated as a

command or special instruction *such as clear screen! position cursor! etc.+. :hen R2 is high *1+!

the data being sent is te3t data which should be displayed on the screen. or e3ample! to display

the letter ITI on the screen you would set R2 high.

The R: line is the IRead=:riteI control line. :hen R: is low *8+! the information on the data

bus is being written to the ,0. :hen R: is high *1+! the program is effectively Duerying *orreading+ the ,0. nly one instruction *I


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316 ,ine Alphanumeric ,0 0isplay

The most commonly used ALPHANUMERIC displays are 1x16 *2ingle ,ine J 16 characters+!

2x16 *0ouble ,ine J 16 character per line+ J 4x20 *four lines J Twenty characters per line+.

The ,0 reDuires " control lines *R2! R=: J $'+ J / *or + data lines. The number on data

lines depends on the mode of operation. f operated in /-bit mode then / data lines L " controllines i.e. total 11 lines are reDuired. And if operated in -bit mode then data lines L " control

lines i.e. 7 lines are reDuired. >ow do we decide which mode to use tFs simple if you have

sufficient data lines you can go for / bit mode J if there is a time constrain i.e. display should be

faster then we have to use /-bit mode because basically -bit mode ta;es twice as more time as

compared to /-bit mode.

)in 2ymbol unction

1 &ss


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:hen RS is low *8+! the data is to be treated as a command. :hen R2 is high *1+! the data being

sent is considered as te3t data which should be displayed on the screen.

:hen R/W is low *8+! the information on the data bus is being written to the ,0. :hen R: is

high *1+! the program is effectively reading from the ,0. Most of the times there is no need to

read from the ,0 so this line can directly be connected to - ,: signal is

reDuired to latch the data. The ,0 interprets and e3ecutes our command at the instant the $'

line is brought low. f you never bring $' low! your instruction will never be e3ecuted.

/8#1 nterfacing to ,0

RS-'3' Protocol


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0evices which use serial cables for their communication are split into two categories. Thes 0$

*0ata ommunications $Duipment+ and 0T$ *0ata Terminal $Duipment.+ 0ata ommunication

$Duipment are devices such as your modem! TA adapter! plotter etc while 0ata Term$Duipment

is your omputer or Terminal. The electrical specifications of the serial port is contained in the

$A *$lectronics ndustry Association+ R2" standard. t states many parameters such as -

1. A I2paceI *logic 8+ will be between L" and L# &olts.

. A ar;I *,ogic 1+ will be between -" and -# &olts.

". The region between L" and -" volts is undefined.

. An open circuit voltage should never e3ceed # volts. *n Reference to


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)in / )in 1 0 arrier 0etect

)in 8 )in 0TR 0ata Terminal Ready

)in )in O R Ring ndicator

)in unctions

PPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPP

Abbreviation ull 'ame unction

T0 Transmit 0ata 2erial 0ata utput *T(0+

R0 Receive 0ata 2erial 0ata nput *R(0+

T2 lear to 2end This line indicates that the Modem is ready to e3change data.

00 0ata arrier 0etect :hen the modem detects a IarrierI from the modem at the other

end of the phone line! this ,ine becomes active.

02R 0ata 2et Ready This tells the 9ART that the modem is ready to establish a lin;.

0TR 0ata Terminal Ready This is the opposite to 02R. This tells the Modem that the 9ART

is ready to lin;.

RT2 ReDuest To 2end This line informs the Modem that the 9ART is ready to e3change

data.

'orking

It can be classied in following modes

# Electronic Answer Pad

". &er-er &ystem


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# Electronic Answer Pad

The electronic answer pad is a combination of microcontroller keypad

display and #igbee module it will act as individual device for each user it will

be having a uni!ue code for eacg user. Ao that the user data can be

separated from each other in this mode user will enter answers for all the

!uestions in exam paper with the help of option keys available on answer

pad. >e will be able to see the !uestion number and the answer entered by

him on the display attached to the answer pad. >e can also modify the

answers if necessary. The microcontroller will store this data and will

continue sly send it to the server system with the help of ,igbee module

attached to the system

". &er-er &ystem

% server system will contain a #igbee receiver in order to capture the user

data from electronic answer pad of each user also microcontroller and

server &(. It will capture this data in predened se!uence from all users in

this mode the server system will receive the data from #igbee module. It will

store it in the controller and compares it with the reference answer sheet."nce this is done it will generate the result for all users and send it to the &(

via serial communication the server system will store this results for future

use a

)lowchart


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Ad-antages

$ It avoid the manual errors in paper correction system

-. Jery reliable secure and accurate

/. It avoids proxy users as validation and user verication is perform by the

system

1. Time saving and user friendly system

Applications

$. 3or %ptitude Entrance examination

-. as voting meter for internal voting in organi#ations.

/. In 8ui# shoes.

1. 3or %ptitude !uestions in companies for interview purpose.

)uture &cope

$. With the help of internet we can increase the scope of this system.

-. 'y the use of face recognition and ((TJ we can increase the security of

the system.

/. internet interface can be developed for future use.

wireless apptitude examination system using arm 7

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