wirelss sens nw

7/28/2019 Wirelss Sens Nw

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Wireless Sensor Networks

Administrivia

BlackBoard Access

Lab Partners

Labs 1, 2, and 3 in Levine 279

Getting started - http://nanork.org/QuickTime and a

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Previous Lecture

Some Sensor Nodes Application Domains for WSNs Advantages of WSNs Taxonomy of WSNs Batteries and Energy Challenges and Metrics Summary


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Outline of Todays Lecture

FireFly Hardware Atmel Processor Features Chipcon Radio FireFly Node FireFly Programmer

Operating System Nano-RK Communication Link Layer Tips and Tricks

Lab Descriptions


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FireFly History

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FireFly v2.2 - Overview


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Atmel AVRMicrocontrollers

FireFly 1.2 Atmega32 (2K SRAM, 32K FLASH, 4K EEPROM) FireFly 2.0 Atmega128 (4K SRAM, 128K FLASH, 4K EEPROM) FireFly 2.2 Atmega1281 (8K SRAM, 128K FLASH,4K EEPROM)

ATmega1281 Features 1 I2C controller (2 wire serial protocol, Philips) 8-bit Harvard Architecture (16-bit address space) RISC Instruction Set 2 UARTS (RS232 115200 baud) 1 SPI (4 wire serial protocol, Motorola) 8 channel 10-bit ADC 2 8 bit Timers / Counters 4 16 bit Timers / Counters 6 Full 8-bit GPIO ports 32 8-bit Registers 64 Control Registers


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Atmel AVR CPU Core

No Cache No Pre-Fetch No Branch Predictor No Memory Management Unit

Yes Pipeline (Hooray 1962!)

VERY Little RAM Reasonable ROM

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AVR On Chip Memory

SRAM (8K) Holds Program Data etc Cleared on Power Down

FLASH Memory (128K) Holds Program Code Does not get cleared on power down, but is slow for a program to write into

(must write large pages) Limited write cycle lifetime

EEPROM (4K)

Does not get cleared on power down Easy for a program to read / write from Uses interface that reads / writes to control registers

FUSES (a few bytes) Holds CPU Hardware Configuration CPU can not access this data


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Data Memory 32 8-bit Registers

Compiler (or you) use these for manyinstructions that only operate onregisters

64 8-bit I/O Registers (all named in a

header file) Control UART parameters Set / Read Pin Values Configure Timers

Internal SRAM

This is memory that must be loadedand written to and from registers This is slower than directly accessing

a register Program Data, Stack and Heap Live

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AVR GPIO(General Purpose Input Output)




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General Purpose Input-Output

Tri-state Buffer Port

Memory-Mapped IO

Control Registers Data Direction Register (DDR, TRIS) Internal Pull Up Register (PLP)

Reading / Writing to the Port


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Tri-state Buffer Gate(controlled by DDR register)

Each GPIO port can be configured as input or output

on a bit-by-bit basis. Input can act as a high-impedance state to allow

other devices to control the line level.




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GPIO Register

Writing to a Port A memory address directly maps to the state of a port




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GPIO Register

Reading and Writing with a Port


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AVR Analog to Digital Converter

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AVR Analog to Digital Converter

Converts an Analog Signal to a Digital One 8 Channels at 10 bit Resolution Sampling Rate (up to 15 kSPS)




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AVR UART (Universal AsynchronousReceiver / Transmitter)


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AVR UART






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AVR SPI and I2C




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I2C (Inter-Integrated Circuit)

Multi-drop 2 wire serial bus protocol

Designed by Philips

Two Bi-directional Open-Drain Lines

400 kbits / sec (up to 3.4Mbits / sec high speed mode)




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SPI (Serial Peripheral Interface)

4 Wire Serial Bus from Motorola Up to 1Mbits / sec Bidirectional Data

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Radio (TI-Chipcon cc2420)

802.15.4 Radio Physical / MAC layer of Zigbee

2.4 Ghz (ISM band) 250 Kbps (Burst Data Rate)

16 Channels (11-26) in 5MHz Steps Transmits > 100 meters line of sight 0.18 CMOS Process


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Communication Logistics

128-Byte Max Packet Size SPI communication from Atmel to Radio Built-in CRC (cyclic redundancy code) 128-bit AES encryption




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Horizontal Antenna Pattern




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Vertical Antenna Pattern




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cc2420 Power




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ATmega Power States




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Radio + CPU Power




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FireFly Board (1/3)




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FireFly Board (2/3)




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FireFly Board (3/3)




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FireFly Programmer




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Connect FireFly board like this...




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Software Tools



>


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Nano-RK Architecture




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Nano-RK Reservations

CPU Utilization Time Allowed Per Period For example, a task can run for 10ms of time every 250ms

Network Utilization Packets In and Out Per Period

Sensors & Actuators Usage Sensor Readings Per Period

{CPU, Network, Peripherals} Together comprise the total energy usage of the node Static Offline Budget Enforcement


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Nano-RK Time Management

~1ms OS Tick Resolution Variable Tick Timer (interrupts occur as required, not every

quantum)

wait_until_xxx() functions Suspend task until the event or timeout happens If there is no wait_until_xxx() call, then your reserve will be

violated If reserves are disabled, then this can starve low priority

tasks and will waste battery power


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Nano-RK Fault Handling

Task Time Violations OS will enforce time bounds given to a task

Canary Stack Check Check if user-specified stack has been overflowed Not 100%, but incurs low overhead and better than nothing

Unexpected Restarts Capture restart that occurs without power-down

Resource Over-use

Manage sensors / actuators Low Voltage Detection Watchdog Timer

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Creating a Nano-RK Task




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Sample nano-RK Task




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Nano-RK Network: Link Layers

LPL-CSMA (bmac) Low-Power Listen Carrier Sense Multiple Access Contention Based Protocol Polastre, Hill, Culler, Versatile Low Power Media Access for

Wireless Sensor Networks , Sensys 2004

RT-Link Time Division Multiple Access (TDMA) Protocol Anthony Rowe, Rahul Mangharam, Raj Rajkumar, "RT-Link: A

Time-Synchronized Link Protocol for Energy Constrained Multi-hop

Wireless Networks ," SECON 2006


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LPL-CSMA




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TDMA-based Approach (RT-Link)




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RT-Link Graph Coloring

Color Topology Graph to Avoid Collisions Each Color represents a TDMA slot

a

b

d

cf

e

Gateway a

b

d

cf

e

a

b

c

TX

RX

TX

RX

TX

RX

TDMA Frame

Low Power Listen within each


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Low Power Listen within eachTDMA Slot

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Receiving a Packet with Nano-RK




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Sending a Packet with Nano-RK




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RT-Link Schedule






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d k ( f )


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Tips and Tricks (4 of 4)

What variables are using up my memory? Use avr-nm (NAME) to find a list of symbols and how much

they consume. Below is an example that prints the size of functions and static memory sorted as decimal:

"T" refers to the text section, "B" refers to the BSSsection, and "D" refers to the data section.Remember that strings don't show up in this listbecause they do not have compiler mapped labels.




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Questions?

On Tuesday:

Labs and Get started with nano-RK Other Operating Systems

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