XR-215A...the analog plus companyTM

MonolithicPhase–Locked Loop

Rev. 1.01�1996

EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 � (510) 668-7000 � (510) 668-7010

1

June 1997-3

FEATURES

� Wide Frequency Range: 0.5Hz to 25MHz

� Wide Supply Voltage Range: 5V to 26V

� Wide Dynamic Range: 300�V to 3V, nominally

� ON-OFF Keying and Sweep Capability

� Wide Tracking Range: Adjustable from +1% to+50%

� High-Quality FM Detection: Distortion 0.15%Signal/Noise 65dB

APPLICATIONS

� FM Demodulation

� Frequency Synthesis

� FSK Coding/Decoding (MODEM)

� Tracking Filters

� Signal Conditioning

� Tone Decoding

� Data Synchronization

� Telemetry Coding/Decoding

� FM, FSK and Sweep Generation

� Crystal-Controlled PLL

� Wideband Frequency Discrimination

� Voltage-to-Frequency Conversion

GENERAL DESCRIPTION

The XR-215A is a highly versatile monolithic phase-locked loop (PLL) system designed for a wide variety ofapplications in both analog and digital communicationsystems. It is especially well suited for FM or FSKdemodulation, frequency synthesis and tracking filter

applications. The XR-215A can operate over a largechoice of power supply voltages ranging from 5V to 26Vand a wide frequency band of 0.5Hz to 25MHz. It canaccommodate analog signals between 300mV and 3V.

ORDERING INFORMATION

Part No. PackageOperating Temperature

Range

XR-215ACP 16 Lead 300 Mil PDIP 0°C to 70°C

XR-215ACD 16 Lead SOIC (Jedec, 0.300”) 0°C to 70°C

XR-215A

2

Rev. 1.01

9

VEE

16

VCC

4PHCP1

6PHCP2

1OPAMP

7COMP

Phase

Comparator

OpAmp

2 PCO1

3 PCO2

8 OPAMPO

15 VCOOVCO

5BIAS

12VSI

11VGC

10RGS

14TCI2

13TCI1

Figure 1. XR-215A Block Diagram

XR-215A

3

Rev. 1.01

PIN CONFIGURATION

16 Lead 300 Mil PDIP

VCCVCOOTCI2TCI1VSIVGCRGSVEE

OPAMPPCO1PCO2

PHCP1BIAS

PHCP2COMP

OPAMPO

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

VCCVCOOTCI2TCI1VSIVGCRGSVEE

OPAMPPCO1

PCO2PHCP1

BIASPHCP2COMP

OPAMPO

16 Lead SOIC (Jedec, 0.300”)

161

98

2

3

4

5

6

7

15

14

13

12

11

10

PIN DESCRIPTION

Pin # Symbol Type Description

1 OPAMP I Operational Amplifier Input.

2 PCO1 O Phase Comparator Output 1.

3 PCO2 O Phase Comparator Output 2.

4 PHCP1 I Phase Comparator Input 1.

5 BIAS I Phase Comparator Bias Input.

6 PHCP2 I Phase Comparator Input 2.

7 COMP I Operational Amplifier Frequency Compensation Input.

8 OPAMPO O Operational Amplifier Output.

9 VEE - Negative Power Supply.

10 RGS I Range Select Input.

11 VGC I VCO Gain Control.

12 VSI I VCO Sweep Voltage Input.

13 TCI1 I Timing Capacitor Input. The timing capacitor connects between this pin and pin 14.

14 TCI2 I Timing Capacitor Input. The timing capacitor connects between this pin and pin 13.

15 VCOO O VCO Output.

16 VCC - Positive Power Supply.

XR-215A

4

Rev. 1.01

DC ELECTRICAL CHARACTERISTICSTest Conditions: V CC= 12V (single supply), TA = 25°C, Test Circuit of Figure 3 with C0 = 100 pF, (silver-mica) S1,S2, S5, closed, S3, S4 open unless otherwise specified.

Parameter Min. Typ. Max. Unit. Conditions

GENERAL CHARACTERISTICS

Supply Voltage

Single Supply 5 26 V Figure 3

Split Supply +2.5 +13 V Figure 4

Supply Current 8 11 15 mA Figure 3

Upper Frequency Limit 20 25 MHz Figure 3, S1 Open, S4 Closed

Lowest Practical Operating Frequency

0.5 Hz C0 = 500�F (Non-Polarized)

VCO Section

Stability:

Temperature 250 600 ppm/°C See Figure 7, 0°C � TT < 70°C

Power Supply 0.1 %/V VCC > 10V

Sweep Range 5:1 8:1 S3 Closed, S4 Open, 0 < VS < 6VSee Figure 10, C0 = 2000pF

Output Voltage Swing 1.5 2.5 Vp-p S5 Open

Rise Time 20 ns

Fall Time 30 ns 10pF to Ground at Pin 15

Phase Comparator Section

Conversion Gain 2 V/rad VIN > 50mV rms (See Characteristic Curves)

Output Impedance 6 k� Measured Looking into Pins 2 or 3

Output Offset Voltage 20 100 mV Measured Across Pins 2 and 3VIN = 0, S5 Open

OP AMP Section

Open Loop Voltage Gain 66 80 dB S2 Open

Slew Rate 2.5 V/�sec AV = 1

Input Impedance 0.5 2 M�

Output Impedance 2 k�

Output Swing 7 10 Vp-p RL = 30k� From Pin 8 to Ground

Input Offset Voltage 1 10 mV

Input Bias Current 80 nA

Common Mode Rejection 90 dB

Note: Bold face parameters are covered by production test and guaranteed over operating temperature range.

XR-215A

5

Rev. 1.01

DC ELECTRICAL CHARACTERISTICS (CONT’D)

Parameter Min. Typ. Max. Unit Conditions

SPECIAL APPLICATIONS

A) FM DemodulationTest Conditions: Test circuit of Figure 5, VCC = 12V, input signal = 10.7MHz FM with �f = 75kHz. fmod = 1kHz.

Detection Threshold 0.8 3 mV rms 50� source

Demodulated Output Amplitude 500 mV rms Measured at Pin 8

Distortion (THD) 0.15 0.5 %

AM Rejection 40 dB VIN = 10mV rms, 30% AM

Output Signal/Noise 65 dB

B) Tracking FilterTest Conditions: Test circuit of Figure 6, VCC = 12V, fo = 1 MHz, VIN = 100mV rms, 50� source.

Tracking Range (% of fo) +50 See Figure 5 and Figure 25

Discriminator Output

�VOUT�f / fo

50 mV/% Adjustable - See Applications Information

Note: Bold face parameters are covered by production test and guaranteed over operating temperature range.

Specifications are subject to change without notice

ABSOLUTE MAXIMUM RATINGS

Power Supply 26 volts. . . . . . . . . . . . . . . . . . . . . . . . . . . Power Dissipation (Package Limitation) Plastic Package 625mW. . . . . . . . . . . . . . . . . . . . . . . . Derate above 25°C 5mW/°C. . . . . . . . . . . . . . . . . . . .

SOIC Package 500mW. . . . . . . . . . . . . . . . . . . . . . . . . Derate above 25°C 4mW/°C. . . . . . . . . . . . . . . . . . . . Temperature Storage -65°C to +150°C. . . . . . . . . . . . . . . . . . . . . . .

XR-215A

6

Rev. 1.01

6

Figure 2. Equivalent Schematic Diagram

1

16

23

54

11

14 13 15

12

78

9

10

SYSTEM DESCRIPTION

The XR-215A monolithic PLL system consists of abalanced phase comparator, a highly stable voltage-controlled oscillator (VCO) and a high speed operationalamplifier. The phase comparator outputs are internallyconnected to the VCO inputs and to the noninverting inputof the operational amplifier. A self-contained PLL Systemis formed by simply AC coupling the VCO output to eitherof the phase comparator inputs and adding a low-passfilter to the phase comparator output terminals.

The VCO section has frequency sweep, on-off keying,sync, and digital programming capabilities. Its frequencyis highly stable and is determined by a single externalcapacitor. The operational amplifier can be used for audiopreamplification in FM detector applications or as a highspeed sense amplifier (or comparator) in FSKdemodulation.

DESCRIPTION OF CIRCUIT CONTROLS

Phase Comparator Inputs (Pins 4 and 6)

One input to the phase comparator is used as the signalinput. The remaining input should be AC coupled to the

VCO output (pin 15) to complete the PLL (see Figure 3).For split supply operation, these inputs are biased fromground as shown in Figure 4. For single supply operation,a resistive bias string similar to that shown in Figure 3should be used to set the bias level at approximatelyVCC/2. The DC bias current at these terminals isnominally 8�A.

Phase Comparator Bias (Pin 5)

This terminal should be DC biased as shown in Figure 3and Figure 4, and AC grounded with a bypass capacitor.

Phase Comparator Outputs (Pins 2 and 3)

The low frequency (or DC) voltage across these pinscorresponds to the phase difference between the twosignals at the phase comparator inputs (pins 4 and 6). Thephase comparator outputs are internally connected to theVCO control terminals (see Figure 2.) One of the outputs(pin 3) is internally connected to the noninverting input ofthe operational amplifier. The low-pass filter is achievedby connecting an RC network to the phase comparatoroutputs as shown in Figure 15.

XR-215A

7

Rev. 1.01

16 VCC

Figure 3. Test Circuit for Single Supply Operation

+12V

0.1�F

0.1�F

5K5K

SignalInput

SweepInput Vs

U1

XR-215A

S31K

5K

0.1�F

2K 2K

0.1�F

S5

VCOOutput

0.068�FDemodulatedOutput

10K

S2

300pF

RF100KRP 10K

10K

7505pF

S1

100pF

S4

2nF 2nF

50 50

PhaseComp.

VCO

6

11

12

10

9 13 14 2 3 1 7

8

15

45

VEE

OpAmp

XR-215A

8

Rev. 1.01

16 VCC

13

OpAmp

Figure 4. Test Circuit for Split-Supply Operation

0.1�F

+6V

0.1�F

U1

XR-215A5K

0.1�F

2K

SignalInput50�

2K

0.1�F

2K

VCOOutput

DemodulatedOutput

100pF

10K

10K300pF

RF100KRP 10K

-6V750

S4

-6V

2nF 2nF

50 50

PhaseComp.

VCO

11

12

10

9 14 3 1 7

15

4

8

6

2

VEE

5

0.068�F

XR-215A

9

Rev. 1.01

16 VCC

Figure 5. Test Circuit for FM Demodulation

0.1�F

0.1�F

+12V

U1

XR-215A

0.1�F

2K

3K

FM Input

(50� Source)

2K

1K

0.1�F

VCOOutput

10K

DemodulatedOutput10nF

300pF

RF100KRP 10K

7.5K

30pF

750

50 50

1nF1nF

PhaseComp.

6

11

12

10

VEE

VCO

139 14 3 1 72

OpAmp

54

15

8

XR-215A

10

Rev. 1.01

16 VCC

Figure 6. Test Circuit For Tracking Filter

+12V5K 5K

0.1�F

SignalInput50�

R0 2K

U1

XR-215A

0.1�F

2K

0.1�F

2K

0.1�F

10K

DemodulatedOutput

VCOOutput

1K

RF40K

300pFC0 200pF

50 50

RP 20K

5nF 5nF

6

11

12

10

9 13 14 2 3 1 7

PhaseComp.

VCO

8

4

5

OpAmp

15

VEE

XR-215A

11

Rev. 1.01

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Figure 7. Typical VCO Temperature Coefficient Range as a Function of Operating Frequency (Pin 10 open)

-800

-400

0

400

800

10KHz 100KHz 1MHz 10MHz

VCO Frequency (Hz)

VCC = 12VR0 = 5k�

VC

O T

empe

ratu

re C

oeffi

cien

t (P

PM

/ C)

Figure 8. VCO Free Running Frequency vs. Timing Capacitor

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Rx=750� Between Pins 9 & 10

Pin 10 Open

107

102 103 104 105 10610 107

106

105

104

103

102

VCO Frequency (Hz)

Tim

ing

Cap

acita

nce

C

(pF

)0

XR-215A

12

Rev. 1.01

VCO Timing Capacitor (Pins 13 and 14)

The VCO free-running frequency, fo, is inversely proportional to timing capacitor C0 connected between pins 13 and 14.(See Figure 8.)

VCO Output (Pin 15)

The VCO produces approximately a 2.5Vp-p output signal at this pin. The DC output level is approximately 2 volts belowVCC. This pin should be connected to pin 9 through a 10k� resistor to increase the output current drive capability. Forhigh voltage operation (VCC > 20V), a 20k� resistor is recommended. It is also advisable to connect a 500� resistor inseries with this output for short circuit protection.

0.1 1 10 100 1000

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

High Level InputConstant = 1V rms

�2V/RAD

Low Level Input Input Amplitude (mV rms)

1.0

0.1

0.01

Figure 9. Phase Comparator Conversion Gain, K d, versus Input Amplitude

Pha

se C

ompa

rato

r C

onve

rsio

n G

ain

Kd

XR-215A

13

Rev. 1.01

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Figure 10. Typical Frequency Sweep Characteristics as a Function of Applied Sweep Voltage

RX=�

RX=750�

Bias Pins 1,4,5,6 to VCC/2

5

4

3

2

1

+2 0 -2 -4 -6 -8 -10 -12

Co

2KVs VCO

2K

Rx

VCC

OUTPUTFo12

11

16 14 1315

109

Rs

Net Applied Sweep Voltage V S - VSO (Volts)

Nor

mal

ized

Fre

quen

cy (f

/fo)

Note: VSO � VCC - 5V = Open Circuit Voltage at pin 12

XR-215A

14

Rev. 1.01

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Figure 11. XR-215A Op Amp Frequency Response

8

Vout

0.1�F

1Rs

1K

Vin

3

Cc

Open Loop Response

AV = 100RF = 100K

AV = 1000RF = 1M

AV = 10CC = 50pF; RF = 10K

AV = 1CC = 300pF; RF = 1K

100

80

60

40

20

0

-20

100H 1KHz 10KHz 100KHz 1MHz 10MHz

RF

Volta

ge G

ain

(dB

)

Frequency

VCO Sweep Input (Pin 12)

The VCO Frequency can be swept over a broad range by applying an analog sweep voltage, VS, to pin 12 (seeFigure 10.) The impedance looking into the sweep input is approximately 50�. Therefore, for sweep applications, acurrent limiting resistor, RS, should be connected in series with this terminal. Typical sweep characteristics of the circuitare shown in Figure 10. The VCO temperature dependence is minimum when the sweep input is not used.

CAUTION: For safe operation of the circuit, the maximum current, IS, drawn from the sweep terminal should be limited to5mA or less under all operating conditions.

ON-OFF KEYING: With pin 10 open circuited, the VCO can be keyed off by applying a positive voltage pulse to thesweep input terminal. With RS = 2k�, oscillations will stop if the applied potential at pin 12 is raised 3 volts above itsopen-circuit value. When sweep, sync, or on-off keying functions are not used, RS is not necessary.

XR-215A

15

Rev. 1.01

Figure 12. Explanation of VCO Range-Select Controls

Range Select

> 3V, F1

InternalBias I1 I2

T1 T2

600

1.3V

10

RX

Input

0V, Fo

Á9

Fo = F1(1+(0.6/RX))

Range-Select (Pin 10)

The frequency range of the XR-215A can be extended byconnecting an external resistor, RX, between pins 9 and10. With reference to Figure 12, the operation of therange-select terminal can be explained as follows: TheVCO frequency is proportional to the sum of currents I1and I2 through transistors T1 and T2 on the monolithicchip. These transistors are biased from a fixed internalreference. The current I1 is set internally, whereas I2 is setby the external resistor RX. Thus, at any C0 setting, theVCO frequency can be expressed as:

f0 � f1 �1 � 0.6RX

�

where f1 is the frequency with pin 10 open circuited andRX is in k�. External resistor RX (�750�) isrecommended for operation at frequencies in excess of5MHz.

The range select terminal can also be used for fine tuningthe VCO frequency, by varying the value of RX. Similarly,the VCO frequency can be changed in discrete steps byswitching in different values of RX between pins 9 and 10.

Digital Programming

Using the range select control, the VCO frequency can bestepped in a binary manner, by applying a logic signal topin 10, as shown in Figure 12. For high level logic inputs,transistor T2 is turned off, and RX is effectively switchedout of the circuit. Using the digital programming capability,the XR-215A can be time-multiplexed between twoseparate input frequencies, as shown in Figure 19 andFigure 20.

Amplifier Input (Pin 1)

This pin provides the inverting input for the operationalamplifier section. Normally it is connected to pin 2 througha 10 k� external resistor (see Figure 3 or Figure 4.)

XR-215A

16

Rev. 1.01

Amplifier Output (Pin 8)

This pin is used as the output terminal for FM or FSKdemodulation. The amplifier gain is determined by theexternal feedback resistor, RF, connected between pins 1and 8. Frequency response characteristics of theamplifier section are shown in Figure 11.

Amplifier Compensation (Pin 7)

The operational amplifier can be compensated for unitygain by a single 300pF capacitor from pin 7 to ground.(See Figure 11.)

BASIC PHASE-LOCKED LOOP OPERATION

Principle of Operation

The phase-locked loop (PLL) is a unique and versatilecircuit technique which provides frequency selectivetuning and filtering without the need for coils or inductors.As shown in Figure 13, the PLL is a feedback systemcomprised of three basic functional blocks: phasecomparator, low-pass filter and voltage-controlledoscillator (VCO). The basic principle of operation of a PLLcan be briefly explained as follows: with no input signalapplied to the system, the error voltage Vd, is equal tozero. The VCO operates at a set frequency, fo, which isknown as the “free-running” frequency. If an input signal isapplied to the system, the phase comparator comparesthe phase and frequency of the input signal with the VCOfrequency and generates an error voltage, Ve(t), that isrelated to the phase and frequency difference betweenthe two signals. This error voltage is then filtered and

applied to the control terminal of the VCO. If the inputfrequency, fs, is sufficiently close to fo, the feedbacknature of the PLL causes the VCO to synchronize or “lock”with the incoming signal. Once in lock, the VCO frequencyis identical to the input signal, except for a finite phasedifference.

A Linearized Model for PLL

When the PLL is in lock, it can be approximated by thelinear feedback system shown in Figure 14. �s and �o arethe respective phase angles associated with the inputsignal and the VCO output, F(s) is the low-pass filterresponse in frequency domain, and Kd and Ko are theconversion gains associated with the phase comparatorand VCO sections of the PLL.

DEFINITION OF XR-215A PARAMETERS USED FORPLL APPLICATIONS DESIGN

VCO Free-Running Frequency, f o

The VCO frequency with no input signal is determined byselection of C0 across pins 13 and 14 and can beincreased by connecting an external resistor RX betweenpins 9 and 10. It can be approximated as:

f0 � 220C0

�1 � 0.6RX

�

where C0 is in �F and RX is in k�. (See Figure 8.)

Figure 13. Block Diagram of a Phase-Locked Loop

fs

InputSignal

VS(t) PhaseComparator

Lowpass Filter

VCO

Ve(t)Vd(t)

Vd(t)fo

VO(t)

XR-215A

17

Rev. 1.01

Figure 14. Linearized Model of a PLL as a Negative Feedback System

F(s)Kd

�0

�s

Kos

-

Phase Comparator Gain K d

The output voltage from the phase comparator per radianof phase difference at the phase comparator inputs (pins4 and 6). The units are volts/radians. (See Figure 9.)

VCO Conversion Gain Ko

The VCO voltage-to-frequency conversion gain isdetermined by the choice of timing capacitor C0 and gaincontrol resistor, R0 connected externally across pins 11and 12. It can be expressed as:

700C0R0

K0 � (radians/sec/volt)

where C0 is in �F and R0 is in k�. For most applications,recommended values for R0 range from 1k� to 10k�.

Lock Range ( �wL)

The range of frequencies in the vicinity of fo, over whichthe PLL can maintain lock with an input signal. It is alsoknown as the “tracking” or “holding” range. If saturation orlimiting does not occur, the lock range is equal to the loopgain, i.e. ��L = KT = KdKo.

Capture Range ( �wC)

The band of frequencies in the vicinity of fo where the PLLcan establish or acquire lock with an input signal. It is alsoknown as the “acquisition” range. It is always smaller thanthe lock range and is related to the low-pass filterbandwidth. It can be approximated by a parametricequation of the form:

��C � ��L |F(j��C)|

where |F(j��C| is the low-pass filter magnitude responseat � = ��C. For a simple lag filter, it can be expressed as:

��L

T1���C �

where T1 is the filter time constant.

Amplifier Gain AV

The voltage gain of the amplifier section is determined byfeedback resistors RF and Rp between pins (8,1) and(2,1) respectively. (See Figure 3 and Figure 4.) It is givenby:

–RF

R1 � RPAV �

where R1 is the (6k�) internal impedance at pin 2.

XR-215A

18

Rev. 1.01

Low-Pass Filter

The low-pass filter section is formed by connecting anexternal capacitor or RC network across terminals 2 and3. The low-pass filter components can be connectedeither between pins 2 and 3 or, from each pin to ground.Typical filter configurations and corresponding filter

transfer functions are shown in Figure 15 where R1 (6k�)is the internal impedance at pins 2 and 3. It should benoted that the rejection of the low pass filter decreasesabove 2MHz when the capacitor is tied from pin 2 to 3.

Figure 15.

2 3R2

C1

Lag Lead Filter

2 3

C1 C1

R2 R2

�1 = 2R1C1

C1

2 3

C1 C1

2 3

�1 = 2R1C1

Lag Filter

1S�1

F(s) =F(s) =

F(s) =

�1 = R1C1

1 + S�21 + S(�1 + �2)

1 + S�21 + S(�1+�2)

�1 = R1C1

1S�1

F(s) =�2= R2C1

�2 = R2C1

Note:R1 = 6k� internal resistor.

The natural frequency �n can be calculated from the VCO conversion gain K0, the phase comparator conversion gainKd, and the low pass filter time constants �1 and � 2 as follows:

��2 �1

K0 · Kd

�� ��n

2

Then the damping factor � can be calculated using:

�n �K0 · Kd

�1 � �2�

XR-215A

19

Rev. 1.01

16 VCC

Figure 16. Circuit Connection for FM Demodulation

+12V

5K 5K

FMInput

U1

XR-215A

2K

0.1�F

Cc

R0

0.1�F

2K

Cc

300pFDemodulatedOutput

2K

8K

7.5K

RF

VolumeControl 10nF (De-Emphasis)

C0

Rx

50

C1

50

C1

RP 10K

Cc Coupling Capacitor

PhaseComp.

5

OpAmp

8

4

15

713214139VEE

10

12

11

6

APPLICATIONS INFORMATION

FM DemodulationFigure 16 shows the external circuit connections to the XR-215A for frequency-selective FM demodulation. The choiceof C0 is determined by the FM carrier frequency (see Figure 8.) The low-pass filter capacitor C1 is determined by theselectivity requirements. For carrier frequencies of 1 to 10MHz, C1 is in the range of 10⋅C0 to 30⋅C0. The feedbackresistor RF can be used as a “volume-control” adjustment to set the amplitude of the demodulated output. Thedemodulated output amplitude is proportional to the FM deviation and to resistors R0 and RF for +1% FM deviation it canbe approximated as:

VOUT � R0RF�1 � 0.6RX

�mV, rms

where all resistors are in k� and RX is the range extension resistor connected across pins 9 and 10. For circuit operationbelow 5MHz, RX can be omitted. For operation above 5MHz, RX � 750� is recommended.

Typical output signal/noise ratio and harmonic distortion are shown in Figure 17 and Figure 18 as a function of FMdeviation, for the component values shown in Figure 5.

XR-215A

20

Rev. 1.01

Multi-Channel Demodulation

The AC digital programming capability of the XR-215A allows a single circuit be time-shared or multiplexed between twoinformation channels, and thereby selectively demodulate two separate carrier frequencies. Figure 19 shows apractical circuit configuration for time-multiplexing the XR-215A between two FM channels, at 1MHz and 1.1MHzrespectively. The channel-select logic signal is applied to pin 10, as shown in Figure 19 with both input channelssimultaneously present at the PLL input (pin 4). Figure 20 shows the demodulated output as a function of thechannel-select pulse where the two inputs have sinusoidal and triangular FM modulation respectively.

Figure 17. Output Signal/Noise Ratio as a Function of FM Deviation

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

fo =10 MHzfmod = 1 KHzVIN = 20 mV rms(Test Circuit of Figure 5)

100

80

60

40

0.01% 0.1% 1.0% 100%10%

Frequency Deviation �f/fo

Figure 18. Output Distortion as a Function of FM Deviation

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

1%

0.5%

00.01% 0.1% 1.0% 100%10%

fo =10MHzfmod = 1KHzVIN = 20 mV rmsVOUT = Constant @ 2 VPP

(Test Circuit of Figure 5)

Dem

odul

ated

Out

put S

igna

l / N

oise

(dB

)

Frequency Deviation �f/fo

Dis

tort

ion

(TH

D)

XR-215A

21

Rev. 1.01

VCC16

Figure 19. Time-Multiplexing XR-215A Between Two Simultaneous FM Channels

U1

XR-215A

Channel 2F2=1.1MHz

Channel 1F1=1MHz

1K

0.1�F

0.1�F

+5V

1K

DemodulatedOutput

10nF (De-Emphasis)

7.5K

10nF

10nF

-5V

10K

300pF300pFCo

100K

3K

Co 220pF

R0

3K

Rx6K

1K

ChannelSelect

-5V

0V Fo=F1

-5V Fo=F2

10KRP 10K

Cc Coupling Capacitor4nF 4nF

PhaseComp.

5

OpAmp

8

4

15

713214139

VEE

10

12

11

6

VCO

XR-215A

22

Rev. 1.01

Figure 20. Demodulated Output Waveforms for Time-Multiplexed Operation

Demodulated Output

Channel Select Pulse

FSK Demodulation

Figure 21 contains a typical circuit connection for FSKdemodulation. When the input frequency is shifted,corresponding to a data bit, the DC voltage at the phasecomparator outputs (pins 2 and 3) also reverses polarity.The operational amplifier section is connected as acomparator, and converts the DC level shift to a binaryoutput pulse. One of the phase comparator outputs (pin 3)is AC grounded and serves as the bias reference for theoperational amplifier section. Capacitor C1 serves as thePLL loop filter, and C2 and C3 as post-detection filters.Range select resistor, RX, can be used as a fine-tuneadjustment to set the VCO frequency.

Typical component values for 300 baud and 1200 baudoperation are listed below:

OperatingConditions

Typical ComponentValues

300 BaudLow Band: f1 = 1070Hz

f2 = 1270Hz

High Band: f1 = 2025Hzf2 = 2225Hz

R0 = 5k�, C0 = 0.17�FC1 = C2 = 0.047�F,C3 = 0.033�FR0 = 8k�, C0 = 0.1�FC1 = C2 = C3 = 0.033�F

1200 Baudf1 = 1200Hzf2 = 2200Hz

R0 = 2k�, C0 = 0.12�FC1 = C3 = 0.003�FC2 = 0.01�F

Table 1. Typical Component Values for Modems

Note: For 300 Baud operation the circuit can be time-multiplexed be-tween high and low bands by switching the external resistor RXin and out of the circuit with a control signal, as shown inFigure 12.

FSK Generation

The digital programming capability of the XR-215A can beused for FSK generation. A typical circuit connection forthis application is shown in Figure 22. The VCOfrequency can be shifted between the mark (f2) and space(f1) frequencies by applying a logic pulse to pin 10. Thecircuit can provide two separate FSK outputs: a low level(2.5 Vp-p) output at pin 15 or a high amplitude (10 Vp-p)output at pin 8. The output at each of these terminals is asymmetrical squarewave with a typical second harmoniccontent of less than 0.3%.

XR-215A

23

Rev. 1.01

16 VCC

Figure 21. Circuit Connection for FSK Demodulation

0.1�F

+12V

5K 5K

U1

XR-215A

2K

FSK InputRo

2K

0.1�F

0.1�F

10K

VOUT

10Vpp

8K

1�F

10K 10K

2K

C0

RX5K

C1 C2 C3

0.1�F PhaseComp.

VCO

5

8

4

15

713214139VEE

10

12

11

6

OpAmp

XR-215A

24

Rev. 1.01

8

16 VCC

Figure 22. Circuit Connection For FSK Generation

U1

XR-215A

0.1�F

0.1�F

+12V5K 5K

FSK Output(Low Level)

2.5VPP

F1 F2

FSK Output10KC0

5K

Rx

KeyingInput

+5V

0V

0.1�F 3K

10K10VPP

F1 F2

PhaseComp.

54

15

713214139VEE

10

12

11

6

VCOOpAmp

Frequency Synthesis

In frequency synthesis applications, a programmable counter or divide-by-N circuit is connected between the VCOoutput (pin 15) and one of the phase detector inputs (pins 4 or 6), as shown in Figure 23. The principle of operation of thecircuit can be briefly explained as follows: The counter divides down the oscillator frequency by the programmabledivider modulus, N. Thus, when the entire system is phase-locked to an input signal at frequency, fs, the oscillator outputat pin 15 is at a frequency (Nfs), where N is the divider modulus. By proper choice of the divider modulus, a large numberof discrete frequencies can be synthesized from a given reference frequency. The low-pass filter capacitor C1 isnormally chosen to provide a cut-off frequency equal to 0.1% to 2% of the signal frequency, fs.

XR-215A

25

Rev. 1.01

16 VCC

OpAmp

Figure 23. Circuit Connection For Frequency Synthesis

Cc

0.1�F

+5V

�N10K

Cc

LevelShifter

VCO OutputFo=NFs

20K

InputF=Fs

CcU1

XR-215A

Rx

4K

1KBinaryRange Select

(Optional)

20K

-5V

C0 20KC1

SN7493 or Equivalent

PhaseComp.

VCO

5

8

4

15

713214139VEE

10

12

11

6

C1

The circuit was designed to operate with commercially available monolithic programmable counter circuits using TTLlogic, such as MC4016, SN5493 or equivalent. The digital or analog tuning characteristics of the VCO can be used toextend the available range of frequencies of the system, for a given setting of the timing capacitor C0.

Typical input and output waveforms for N = 16 operation with fs = 100kHz and fo = 1.6MHz are shown in Figure 24.

Figure 24. Typical Input/Output Waveforms for N=16Top: Input (100kHz)

Bottom: VCO Output (1.6MHz)

XR-215A

26

Rev. 1.01

Tracking Filter/Discriminator

The wide tracking range of the XR-215A allows thesystem to track an input signal over a 3:1 frequencyrange, centered about the VCO free running frequency.The tracking range is maximum when the binary range-select (pin 10) is open circuited. The circuit connectionsfor this application are shown in Figure 25. Typicaltracking range for a given input signal amplitude is shown

in Figure 26. Recommended values of externalcomponents are:

1k� < R0 < 4k� and 30 C0 < C1 < 300 C0 where the timingcapacitor C0 is determined by the center frequencyrequirements (see Figure 8.)

16 VCC

Figure 25. Circuit Connection For Tracking Filter Applications

+12V

0.1�F

5K5K

U1

XR-215A

0.1�FSignalInput Vs

Ro

2K 2K

0.1�F

2K

Cc

10K

VCOOutput

10K

DiscriminatorOutput

300pFC0

RF

RP 20K

C1C1

50 50

PhaseComp.

OpAmp.

5

8

4

15

713214139VEE

10

12

11

6

VCO

XR-215A

27

Rev. 1.01

The phase-comparator output voltage is a linear measure of the VCO frequency deviation from its free-running value.The amplifier section, therefore, can be used to provide a filtered and amplified version of the loop error voltage. In thiscase, the DC output level at pin 15 can be adjusted to be directly proportional to the difference between the VCOfree-running frequency, fo, and the input signal, fs. The entire system can operate as a “linear discriminator” or analog“frequency-meter” over a 3:1 change of input frequency. The discriminator gain can be adjusted by proper choice of R0or RF, for the test circuit of Figure 25, the discriminator output is approximately (0.7 R0RF) mV per % of frequencydeviation where R0 and RF are in k�. Output non-linearity is typically less than 1% for frequency deviations up to +15%.Figure 28 shows the normalized output characteristics as a function of input frequency, with R0 = 2k� and RF = 36k�.

Crystal-Controlled PLL

The XR-215A can be operated as a crystal-controlled phase-locked loop by replacing the timing capacitor with a crystal.A circuit connection for this application is shown in Figure 28. Normally a small tuning capacitor (� 30pF) is required inseries with the crystal to set the crystal frequency. For this application the crystal should be operated in its fundamentalmode. Typical pull-in range of the circuits is +1kHz at 10MHz. There is some distortion on the demodulated output.

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Figure 26. Tracking Range vs. Input Amplitude (Pin 10 Open Circuited)

Tracking Range

Normalized Temperature Range (f/f o)

0.5 1.0 2.0

1.0

10

100

1000R0 = 2k�

Sig

nal I

nput

(m

V r

ms)

XR-215A

28

Rev. 1.01

Figure 27. Typical Discriminator Output Characteristics for Tracking Filter Applications

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Normalized Tracking Range (f/f o)

Slope = 50mV Per %+3

+2

+1

0

-1

-2

-30.4 0.6 0.8 1.0 1.2 1.4 1.6

R0 = 2K�RF = 36K�VIN = 50mV rms

Change ofFrequency

Nor

mal

ized

Out

put (

Vol

ts)

16 VCC

Figure 28. Typical Circuit Connection for Crystal-Controlled PLL.

+12V

0.1�F

0.1�F

5K5K

SignalInput Vs 0.01�F

U1

XR-215A

20K 16K

VCOOutput

0.01�F

10KDemodulatedOuput10nF

100K

300pF

30pF10MHz

Crystal

FundamentalMode

10K

10nF 10nF

1K

50 50

VCO

PhaseComp.

OpAmp.

5

8

4

15

713214139VEE

10

12

11

6

XR-215A

29

Rev. 1.01

16 LEAD PLASTIC DUAL-IN-LINE(300 MIL PDIP)

Rev. 1.00

16

1

9

8

D

e B1

A1

E1

E

AL

B

SeatingPlane

SYMBOL MIN MAX MIN MAX

INCHES

A 0.145 0.210 3.68 5.33

A1 0.015 0.070 0.38 1.78

A2 0.115 0.195 2.92 4.95

B 0.014 0.024 0.36 0.56

B1 0.030 0.070 0.76 1.78

C 0.008 0.014 0.20 0.38

D 0.745 0.840 18.92 21.34

E 0.300 0.325 7.62 8.26

E1 0.240 0.280 6.10 7.11

e 0.100 BSC 2.54 BSC

eA 0.300 BSC 7.62 BSC

eB 0.310 0.430 7.87 10.92

L 0.115 0.160 2.92 4.06

α 0° 15° 0° 15°

MILLIMETERS

α

A2

C

Note: The control dimension is the inch column

eB

eA

XR-215A

30

Rev. 1.01

SYMBOL MIN MAX MIN MAX

A 0.093 0.104 2.35 2.65

A1 0.004 0.012 0.10 0.30

B 0.013 0.020 0.33 0.51

C 0.009 0.013 0.23 0.32

D 0.398 0.413 10.10 10.50

E 0.291 0.299 7.40 7.60

e 0.050 BSC 1.27 BSC

H 0.394 0.419 10.00 10.65

L 0.016 0.050 0.40 1.27

α 0° 8° 0° 8°

INCHES MILLIMETERS

16 LEAD SMALL OUTLINE(300 MIL JEDEC SOIC)

Rev. 1.00

e

16 9

8

D

E H

B

A

L

C

A1

SeatingPlane α

Note: The control dimension is the millimeter column

1

XR-215A

31

Rev. 1.01

Notes

XR-215A

32

Rev. 1.01

NOTICE

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im-prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de-scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits arefree of patent infringement. Charts and schedules contained here in are only for illustration purposes and may varydepending upon a user’s specific application. While the information in this publication has been carefully checked;no responsibility, however, is assumed for inaccuracies.

EXAR Corporation does not recommend the use of any of its products in life support applications where the failure ormalfunction of the product can reasonably be expected to cause failure of the life support system or to significantlyaffect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporationreceives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) theuser assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circum-stances.

Copyright 1975 EXAR CorporationDatasheet June 1997Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.