3d integration

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PRESENTED BY VIPIN KUMAR GAUTAM 09-EC-58 3D IC TECHNOLOGY

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Page 1: 3D INTEGRATION

PRESENTED BY VIPIN KUMAR GAUTAM

09-EC-58

3D IC TECHNOLOGY

Page 2: 3D INTEGRATION

INTRODUCTION 3D IC technology assures higher levels of

miniaturization and integration.

It focuses on portraying advances in interconnect technologies and reduction of interconnect delays.

It is a single circuit built by stacking and integrating. Separately-built layers

Page 3: 3D INTEGRATION

WHY A 3D IC?In modern world when the utilization of IC’s is increasing rapidly , a problem is being observed by the IC developers and that problem is space.general ICs those are in form of 2-D having a limited space.So developers are now a days planning on a concept that is called 3D IC.In 3D IC developers use 3rd dimension to manufacture the IC.

Page 4: 3D INTEGRATION

• Interconnect structures increasingly consume more of the power and delay budgets in modern design.

• Reasonable solution: increase the number of “nearest neighbors” seen by each transistor by using 3D IC design

Page 5: 3D INTEGRATION

Design tools for 3D-IC designDemand for EDA tools

As the technology matures, designers will want to exploit this design area No design tool is available till date for commercial

purpose

Current tool-chainsMostly academic

MIT has developed a tool for the academic purpose.

Page 6: 3D INTEGRATION

Energy performanceWire length reduction has an impact on the

cycle time and the energy dissipationEnergy dissipation decreases with the

number of layers used in the designFollowing graph is based on a 3D tool

Page 7: 3D INTEGRATION

Energy performance• Energy dissipation decreases with increase

in the number of layers used in the design.

Page 8: 3D INTEGRATION

Concerns in 3D circuit• Thermal Issues in 3D-circuits• Inductance Effects • Reliability Issues

Page 9: 3D INTEGRATION

Thermal Issues in 3D Circuits• Effects dramatically impact interconnect and

device reliability in 2D circuits

• Due to reduction in chip size of a 3D implementation, 3D circuits exhibit a sharp increase in power density

• Analysis of Thermal problems in 3D is necessary to evaluate thermal robustness of different 3D technology and design options.

Page 10: 3D INTEGRATION

Heat Flow in 2DHeat generated arises

due to switchingIn 2D circuits we have

only one layer of Si to consider.

Page 11: 3D INTEGRATION

Heat Flow in 3D With multi-layer circuits , the upper layers will also generate a significant fraction of the heat. Heat increases linearly with level

increase

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Heat DissipationAll active layers will be insulated from each other

by layers of dielectricsWith much lower thermal conductivity than SiTherefore heat dissipation in 3D circuits can

accelerate many failure mechanisms.

Page 13: 3D INTEGRATION

Inductance EffectsInterconnect Inductance Effects

Shorter wire lengths help reduce the inductance

Presence of second substrate close to global wires might help lower inductance by providing shorter return paths.

Page 14: 3D INTEGRATION

Reliability Issues?Electro thermal and Thermo-mechanical effects

between various active layers can influence electro-migration and chip performance

Die yield issues may arise due to mismatches between die yields of different layers, which affect net yield of 3D chips.

Page 15: 3D INTEGRATION

ADVANTAGES 3D ICs offer many significant benefits,

including:

SPEEDDESIGNHETEREOGENEOUS INTEGRATIONBANDWIDTH

Page 16: 3D INTEGRATION

Challenges Yield – Each extra manufacturing step

adds a risk for defects. In order for 3D ICs to be commercially viable, defects must be avoided or repaired.

Heat – Thermal buildup within the stack must be prevented or dissipated

Design complexity – Taking full advantage of 3D requires elegant multi-level designs. Chip designers will need new CAD tools to address the 3D integration

Page 17: 3D INTEGRATION

WAFER LEVEL 3D INTEGRATION: An emerging architecture for future chips

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APPLICATIONSREAD-ONLY MEMORYDIGITAL CAMERASDIGITAL AUDIO PLAYERSSMART CELLULAR PHONESGAMING DEVICES MEMORY CARDS

Page 19: 3D INTEGRATION

Three Dimensional Read-Only Memory ( 3D - ROM).

3D -ROM is a new non-volatile semiconductor memory with lower cost , higher capacity and comparable bandwidth.

It is compatible with standard CMOS process.

More importantly, 3D-ROM can be readily integrated with RAM/flash ROM.

Page 20: 3D INTEGRATION

3D Integration of Next-Generation Transceiversfor Wireless Communications:

Page 21: 3D INTEGRATION

Conclusion3D IC design is a relief to interconnect driven IC

design.

Still many manufacturing and technological difficulties.

Needs strong applications for automated design.

Page 22: 3D INTEGRATION

THANK YOU