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FEBRUARY 15, 2007 • SAN JOSE, CALIFORNIA A ONE-DAY TECHNICAL SYMPOSIUM & EXHIBITS MEPTEC Presents MicroElectronics Packaging and Test Engineering Council Join Us! Challenges and Innovations The Heat is On: Thermal Management in Microelectronics The Annual 3 rd MEDIA SPONSORS ® PLATINUM SPONSORS SILVER SPONSORS Featuring Technical Presentations by Amkor Technology Antares Advanced Test Technology Apple, Inc. Flomerics Honeywell Corporation IBM Corporation LSI Logic Microsoft Nextreme Thermal Solutions, Inc. STATS ChipPAC Tessera, Inc. Texas Instruments Thermal Engineering Associates, Inc.

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Page 1: A ONE-DAY TECHNICAL SYMPOSIUM & EXHIBITS The Heat is On: …meptec.org/Resources/PROCa.pdf · provides outsourced technical services to the electronics industry, specializing in analytical

F E B R U A R Y 1 5 , 2 0 0 7 • S A N J O S E , C A L I F O R N I A

A O N E - D A Y T E C H N I C A L S Y M P O S I U M & E X H I B I T S

MEPTECPresentsMicroElectronics Packaging and Test Engineering Council Join Us!

Challenges and Innovations

The Heat is On:Thermal Managementin Microelectronics

The Annual3rd

MEDIA SPONSORS

®

PLATINUM SPONSORS SILVER SPONSORS

Featuring Technical Presentations by

■ Amkor Technology ■ Antares Advanced Test Technology ■ Apple, Inc. ■ Flomerics ■ Honeywell Corporation ■ IBM Corporation ■ LSI Logic

■ Microsoft ■ Nextreme Thermal Solutions, Inc. ■ STATS ChipPAC ■ Tessera, Inc. ■ Texas Instruments ■ Thermal Engineering Associates, Inc.

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Dear Symposium Attendee,

On behalf of the MEPTEC Management and Advisory Board, we would like to take this opportunity to thank you for your interest and support of this Symposium. It is one in a unique and ongoing quarterly symposium series. For the many indi-viduals that have attended prior symposiums, welcome back and we anticipate that this symposium will again meet your expectations. For the first time attendees of a MEPTEC symposium event, as for all attendees, we welcome your feedback and perspective on defining and improving future MEPTEC Symposiums. Thank you for joining us today!

Based upon the momentum and positive feedback from the first two Thermal Symposiums, the first in 2005 with an agenda covering various device types up to systems level and the second in 2006 focused specifically on the high end devices such as graphics and microprocessors, a decision was made within the MEPTEC Advisory Board to develop the 3rd in a series of Thermal Symposiums.Continued focus within the microelectronics industry on thermal “Challenges and Innovations”, hence the title for this symposium, coupled with the proven reputation of this event, allowed the Co-Chairmen to again assemble a high caliber of individuals and companies to participate in this international event. As a note to first time Thermal Symposium attendees, the CDs from the previous two symposiums are available and a valuable complement to the event today, as the scope of the sessions and presentation topics has been diverse from each symposium. The Symposium Co-Chairmen would like to take this opportunity to thank the Presenters for their commitment and time in preparing and presenting at this symposium, with thanks also to the Session Chairs and the Thermal Symposium Committee for their tech-nical direction, timely support and overall efforts in preparation for this event. The MEPTEC staff and management sincerely appreciate the support from Event Sponsors and Exhibitors and would like to encourage everyone attending this symposium to take advantage of the networking opportunity at the complimentary Table-top Exhibition and Sponsors Reception being held following the sessions. Microelectronics packaging and test, specifically related to overall thermal considerations, can impact every level of design, materials and assembly supply chains for final products to end customers. Therefore, building upon the prior years agendas, the agenda this year, which is typical to the MEPTEC “four-session methodology”, was specifically defined to cover the vari-ous aspects. The thermal event committee was fortunate be able to bring together a prestigious group of speakers on these key topics.

Please do enjoy yourself today, as every possible consideration was made to allow for a comfortable and professional setting. We hope you will find value in gaining technical information and networking with a variety of colleagues from various seg-ments of the industry related to Thermal Management. The Thermal Symposium Committee welcomes suggestions to improve these events and we look forward to seeing you at the Sponsors Reception and Table-top Exhibition from 5:00 pm - 7:00 pm.

Thank you for attending and we hope you benefit from the many aspects of this MEPTEC Symposium!

Regards,

Tom Tarter Nicholas LeonardiTechnical Chairman Symposium General Chairman Principal Engineer Vice President of Sales and Marketing NeoPhotonics CMC Interconnect Technologies

Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

T H E R M A L M A N A G E M E N T I N M I C R O E L E C T R O N I C S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

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Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

T H E R M A L M A N A G E M E N T I N M I C R O E L E C T R O N I C S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

CONTENTSAgenda

Event Sponsor Directory and Ads

Table Top Exhibitor Directory

Participant Biographies

KEYNOTE SPEECH: The Future of Thermal Engineering – Far from a Stand-Alone DisciplineJerry Bartley, Distinguished Engineer, Technology Collaboration Services, IBM

SESSION ONE: THERMAL MANAGEMENT OVERVIEW – TRENDS AND TECHNOLOGY - Thermal Management Issues and Trends for Advanced ICs Maniam Alagaratnam, Vice President for Manufacturing Technology, LSI Logic

- Thermal Management of Mobile Electronics: A Case Study in Densification Hongyu Ran, Ph.D., Senior Engineer, Thermal, Tessera, Inc.

- Thermal challenges in ICs and Memory: Hot spots - Passive Cooling and Beyond Devesh Mathur, Ph.D., R&D Packaging Director, Honeywell Corporation

SESSION TWO: ISSUES IN DESIGN AND ANALYSIS OF ADVANCED PACKAGES - New Techniques for Chip and Package Thermal Modeling Sherman Ikemoto, Business Development Manager, Flomerics and Edmund Cheng, Ph.D., President & CEO, Gradient Design Automation

- High Power Packaging: Materials, Design and Analysis Considerations Jesse Galloway, Ph.D., Senior Director, Thermal Characterization, Amkor Technology

- Thermal Behavior and Data Processing for Multi-Chip Packages: Lateral, Stacked, PoP and PiP Roger Emigh, Ph.D., Director, WW Package Characterization, STATS ChipPAC

SESSION THREE: THERMAL EFFECTS AND SOLUTIONS IN THE BACK END OPERATION - Semiconductor Thermal Resistance – Standards versus Real Life Bernie Siegal, President, Thermal Engineering Associates, Inc.

- Limitations of Traditional Burn-In and Test Methods Due to Thermal Implications Chris Lopez, Business Development Manager, Thermal Solutions, Antares Advanced Test Technology

- Challenges of Process Variation and Temperature at Burn-In Tony Flowers, Product Engineering Efficiency Manager, Texas Instruments

SESSION FOUR: THERMAL MANAGEMENT IN CHALLENGING PRODUCT APPLICATIONS- Mitigating Semiconductor Hot Spots Seri Lee, Ph.D., Chief Technology Officer, Nextreme Thermal Solutions, Inc.

- XBOX360 Thermal System Design and Verification Julia Purtell, Thermal Design Engineer, Microsoft

- System Design Challenges Andre Ali, Mobile Thermal Architecture Manager, Apple, Inc.

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Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

The Heat Is On: Thermal Management in Microelectronics

MORNING AGENDA

7:15 am Registration Opens

8:15 am – 8:30 am Welcome and Introduction / Overview

KEYNOTE SPEECH The Future of Thermal Engineering: Far from a Stand-Alone Discipline8:30 am – 9:00 am Jerry Bartley, IBM

SESSION ONE THERMAL MANAGEMENT OVERVIEW – TRENDS AND TECHNOLOGY Session Leader: Jeffrey Demmin, Tessera

9:00 am – 9:30 am Thermal Management Issues and Trends for Advanced ICs Maniam Alagaratnam, LSI Logic

9:30 am – 10:00 am Thermal Management of Mobile Electronics: A Case Study in Densification Hongyu Ran, Ph.D., Tessera, Inc.

10:00 am – 10:30 am Thermal challenges in ICs and Memory: Hot spots - Passive Cooling and Beyond Devesh Mathur, Ph.D., Honeywell Corporation

10:30 am – 11:00 am Morning Break and Exhibits

SESSION TWO ISSUES IN DESIGN AND ANALYSIS OF ADVANCED PACKAGES Session Leader: Thomas Tarter, NeoPhotonics

11:00 am – 11:30 am New Techniques for Chip and Package Thermal Modeling Sherman Ikemoto, Flomerics and Edmund Cheng, Ph.D., Gradient Design Automation

11:30 am – 12:00 pm High Power Packaging: Materials, Design and Analysis Considerations Jesse Galloway, Ph.D., Amkor Technology

12:00 pm – 12:30 pm Thermal Behavior and Data Processing for Multi-Chip Packages: Lateral, Stacked, PoP and PiP Roger Emigh, Ph.D., STATS ChipPAC

12:30 pm - 1:30 pm Lunch and Exhibits

A O N E - D A Y T E C H N I C A L S Y M P O S I U M & E X H I B I T S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council

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Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

The Heat Is On: Thermal Management in Microelectronics

AFTERNOON AGENDA

SESSION THREE THERMAL EFFECTS AND SOLUTIONS IN THE BACK END OPERATION Session Leader: Mark Murdza, Antares Advanced Test Technology

1:30 pm – 2:00 pm Semiconductor Thermal Resistance – Standards versus Real Life Bernie Siegal, Thermal Engineering Associates, Inc.

2:00 pm – 2:30 pm Limitations of Traditional Burn-In and Test Methods Due to Thermal Implications Chris Lopez, Antares Advanced Test Technology

2:30 pm – 3:00 pm Challenges of Process Variation and Temperature at Burn-In Tony Flowers, Texas Instruments

3:00 pm – 3:30 pm Afternoon Break and Exhibits

SESSION FOUR THERMAL MANAGEMENT IN CHALLENGING PRODUCT APPLICATIONS Session Leader: Nick Leonardi, CMC Interconnect Technologies

3:30 pm – 4:00 pm Mitigating Semiconductor Hot Spots Seri Lee, Ph.D., Nextreme Thermal Solutions, Inc.

4:00 pm – 4:30 pm XBOX360 Thermal System Design and Verification Julia Purtell, Microsoft

4:30 pm – 5:00 pm System Design Challenges Andre Ali, Apple, Inc.

5:00 pm – 7:00 pm Reception and Exhibits

A O N E - D A Y T E C H N I C A L S Y M P O S I U M & E X H I B I T S

Join Us!

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A SPECIAL THANKS TO OUR MEDIA SPONSORS:

Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

T H E R M A L M A N A G E M E N T I N M I C R O E L E C T R O N I C S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

®

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A SPECIAL THANKS TO OUR EVENT SPONSORS:

Platinum Sponsors

CMC Interconnect Technologies

Honeywell Electronic Materials

Silver Sponsors

Henkel Corporation

Indium Corporation

Please see our sponsors’ ads on the following pages.

T H E R M A L M A N A G E M E N T I N M I C R O E L E C T R O N I C S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

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PLATINUM SPONSOR

CMC Interconnect Technologies7755 S. Research Drive, #115, Tempe, AZ 85284Phone: 480-496-5000www.cmcinterconnect.comEvent Platinum Sponsor, CMC Interconnect Technologies provides outsourced technical services to the electronics industry, specializing in analytical testing, failure analy-sis, reliability testing, thermal/electrical characterization and technical consulting. Capabilities include: SEM/EDS, Thermal/Electrical Measurements, Mechanical Testing, and Thermal/Environmental Stress Evaluations with a range of experience in organic, plastic, ceramic and metal packages, boards and interconnect technologies.

SILVER SPONSOR

Henkel Corporation15350 Barranca Parkway, Irvine, CA 92618 Phone: 949-789-2500 www.us.henkel.comThe electronics group of Henkel provides materials solu-tions for the electronics industry. Their unmatched tech-nology includes liquid encapsulants, package level and DCA underfills, molding compounds, electrically con-ductive adhesives, die attach adhesives, solder materials and fluxes, photonics materials, surface mount adhe-sives, conformal coatings, optoelectronic materials, pot-ting compounds, thermally conductive materials, phase change thermal interface materials, and coating powders. Offering a range of materials for environmentally friendly manufacturing, they offer lead-free solder materials, as well as die attach, mold compounds, underfills and liquid encapsulants for semiconductors and other components to meet your 260C processing challenges.

PLATINUM SPONSOR

Honeywell Electronic Materials15128 East Euclid Avenue, Spokane, WA 99216Phone: 509-252-2102www.electronicmaterials.comHoneywell Electronic Materials is a global leader in the supply of critical materials to the semiconductor industry, enabling our customers to develop innovative technologies and overcome manufacturing challenges. Honeywell’s unparalleled expertise in both chemistry and metallurgy and commitment to disciplined quality pro-cesses result in the development of superior, cutting-edge technologies that are now being introduced to the flat panel display (FPD), photovoltaic and printable electronics marketplaces.

SILVER SPONSOR

Indium Corporation1676 Lincoln Avenue, Utica, NY 13502Phone: 315-853-4900www.indium.comIndium Corporation is an award-winning, global manu-facturer of Pb-free solders, thermal interfaces, and under-fills for printed circuit board assembly and semiconduc-tor packaging. Products include: solder pastes, solder preforms, fluxes, Pb-free solder alloys, underfill materials, die-attach materials, and more for SMT, wave, flip chip, thermal design, photonics, Power-LED, and power devices. SMTA- and Six Sigma-certified engineers available to help you with your product and process issues. Factories are located in the USA, the United Kingdom, Singapore, and China.

T H E R M A L M A N A G E M E N T I N M I C R O E L E C T R O N I C S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

EVENT SPONSOR DIRECTORY

Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

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thermal management

Cool off with the leader. Get further information by visiting www.honeywell.com/sm/em or call 1-408-962-2000

© 2007 Honeywell International Inc. All rights reserved.

Honeywell knows thermal management—dial down the heat of your high-power applications with our advanced packaging materials.

For over a half century, Honeywell has been a trusted source for temperature control, so it’s no wonder we’ve applied our expertise to the thermal management challenges of the semiconductor industry.

Our extensive line of thermal management offerings includes innovative phase change materials for TIM1 and TIM2 applications, advanced heat spreaders, as well as lids and stiffeners. Just thisyear, we’ve introduced an award-winning stencil-printable phase change material for increased manufacturing flexibility and a new burn-in material that reduces costs while increasing cycle longevity for critical die burn, testing and validation processes. We’ve made a name for ourselves through years of thermal management leadership. We’re Honeywell.

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Loctite® 3875 and 3876While many products force a trade-off between performanceand ease of use, Loctite® 3875 and Loctite® 3876 offer a uniquecombination of high performance and process friendliness.

These products, formulated with ease-of-use in mind, offer apatent pending “Bead-On-Bead” cure system. This two part system requires no meter mixing, no volumetric measuring,and provides fixture strength within seconds of assembly. Cure is achieved when parts A and B combine upon assemblyand no cure equipment or energy is required. The high speedof cure ensures that in almost all cases, the parts will not

have to be fixtured or clamped while waiting for the adhesiveto gain strength.

All of these process features have been achieved without anydecrease in thermal performance over previous generations ofproducts, In fact, these products have a thermal conductivityof 1.75W|m°K which is a 40% improvement over the previousbest room temperature curing product available.

Loctite® 3875 is the standard product while Loctite® 3876 contains glass beads to ensure a known bondline and consistent thermal and electrical insulation properties.

®

The one product that meets the needsof design and manufacturing engineersThe one product that meets the needsof design and manufacturing engineers

Loctite is a trademark of Henkel Corporation, U.S.A. © Henkel Corporation, 2006. All rights reserved. 3422 (2/2006) electronics.henkel.com

ASIA: Singapore: +65 6268 8678 CHINA: Suzhou, Shenzhen, Liuzhou: +86 (0)512 628 34900EUROPE: Milton Keynes, Torino: +44 (0) 1908 580400USA: Utica, Clinton, Chicago: +1 315 853 4900

www.indium.com/reliability [email protected]

ReliabilitySolder TIM for heat dissipation

��������Overheating:• Increased Power

• Decreased Package Size

�������• Flux-Coated

SAC Preforms

• Compliant Alloys

• Superior ThermalConductivity

INDI-1928 MEPTEC.indd 1 1/31/07 10:30:13 AM

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Thursday, February 15, 2007 • Holiday Inn San Jose, San Jose, California

T H E R M A L M A N A G E M E N T I N M I C R O E L E C T R O N I C S E X H I B I T O R S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council Join Us!

1 Pt. = 1 Inch

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36353433

E-tec Interconnect Ltd.

Spectra-Mat, Inc.

MEPTEC

Ozen Engineering, Inc.

MEPTEC

Shin-Etsu MicroSi, Inc.

Protavic America, Inc.

Speedy Circuits

AIM Specialty Materials

Enerdyne Solutions

Micro Control Company

Chomerics

SEMPAC, Inc.

CPS Technologies, Inc.

Electronic Cooling Solutions, Inc.

Fralock

Thermal Engineering Associates, Inc.

Palomar Technologies Thermshield LLC

sp3 Diamond Technologies, Inc.

Nextreme Thermal Solutions

Enplas Tesco, Inc.

DS&A LLC

Advanced Thermal Solutions

Silicon Valley Micro Service LLC

JCET US

Promex Industries, Inc. Sierra Microelectronics

Harris International

Alpha Novatech Inc.

MEPTEC

Analysis Tech Inc.

CMC Interconnect Technologies (P)

Honeywell Electronic Materials (P)

Henkel Corporation (S)

Indium Corporation (S)

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(P) Platinum Event Sponsor (S) Silver Event Sponsor

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ADVANCED THERMAL SOLUTIONS 89-27 Access RoadNorwood, MA 02062Phone: 781-769-2800www.qats.comAdvanced Thermal Solutions (ATS) is a leading engineer-ing and manufacturing company supplying complete thermal and mechanical packaging solutions from analy-sis and testing to final production. ATS manufactures a wide range of heat sinks and laboratory-quality thermal instrumentation, thermal design consulting services and training.

AIM SPECIALTY MATERIALS25 Kenney DriveCranston, RI 02920Phone: 401-463-5606www.aimsolder.comAIM Specialty Materials supplies indium and indium alloy solder TIM’s for thermal interface applications. They sup-ply these materials as preforms, foils, powders and custom laminates. In addition AIM is a global supplier of solders, fluxes and services to the electronics, semiconductor, and photonic packaging industries.

ALPHA NOVATECH, INC.473 Sapena Court #12Santa Clara, CA 95054Phone: 408-567-8082www.alphanovatech.comAlpha Novatech produces and sells heat sinks and acces-sory parts. Alpha provides design support, prototypes, and a vide variety of off-the-shelf parts. Alpha’s heat sink designs include pin fins, elliptical fins, thin-fins, high-aspect ratio, and copper embedded heat sinks.

ANALYSIS TECH, INC.6 Whittemore TerraceWakefield, MA 01880Phone: 781-245-7825www.analysistech.comComponent thermal resistance, impedance, and die-attachment-quality measurement systems for packaged semiconductor devices; uses MIL and JEDEC test standards for electrical-junction temperature-measurement on any

device type, including all functional devices as well as thermal test dies; thermal test-lab products for component thermal characterization (transient and steady state); test services for complete component thermal characteriza-tion. Thermal Interface Material Testers (TIM Testers) for thermal conductivity measurements of electronic-pack-aging interface-materials at selected temperatures and contact pressures; material test services also offered.

CHOMERICS DIVISION OF PARKER HANNIFIN CORP. 77 Dragon CourtWoburn, MA 01801Phone: 781-935-4850www.chomerics.com Chomerics, a division of Parker Hannifin Corporation, provides a wide range of EMI Shielding and Thermal Management Materials and services to electronics com-panies around the world in the telecom, information technology, power conversion, defense and automotive markets. Chomerics offers an extensive family of thermal interface materials, which transfer heat from electronic components to heat sinks. Careful management of these thermal interfaces is crucial to maintaining the reliability and extending the life of power conversion equipment. Chomerics’ long history of materials expertise and com-mitment to the continued development of new, high performance products helps meet thermal challenges of today’s power systems designers. Since 1961, Chomerics products have been designed into thousands of applications and help assure the per-formance, integrity, survivability, and maintainability of communications equipment, radar, aircraft, spacecraft, computers, fire control systems, telecommunications, consumer and industrial electronics.

CMC INTERCONNECT TECHNOLOGIES7755 S. Research Drive # 115Tempe, AZ 85284Phone: 480-496-5000www.cmcinterconnect.comEvent Platinum Sponsor, CMC Interconnect Technologies provides outsourced technical services to the electronics industry, specializing in analytical testing, failure analy-sis, reliability testing, thermal/electrical characterization and technical consulting. Capabilities include: SEM/EDS, Thermal/Electrical Measurements, Mechanical Testing, and Thermal/Environmental Stress Evaluations with a range of experience in organic, plastic, ceramic and metal packages, boards and interconnect technologies.

CPS TECHNOLOGIES, INC.111 South Worcester StreetChartely, MA 02712-0338Phone: 508-222-0614www.alsic.comCPS is the World Leader in providing AlSiC thermal man-agement materials and electronic packaging designs and products for the microelectronics and power electronics industries. CPS uses its net-shape fabrication process for high volume manufacturing of AlSiC components includ-ing flip-chip lids (microprocessor, heatsinks, flip-chip, DSP application), power applications (IGBT baseplate, power substrates), optoelectronic and microwave packaging.

DS&A LLC 100 High StreetAmesbury, MA 01913Phone: 978-499-4990

www.dsa-thermal.comSpecializing in market research, business strategy develop-ment, and technical marketing analysis for engineered thermal materials, advanced thermal interface materials (TIMs), and thermal management components and assem-blies, DS&A LLC offers concise, practical market planning and market analysis for industry. Thermal materials characterization services are also offered, for assessing mechanical thermal characteristics of engineered thermal materials and metal alloys and composites. ASTM D 5470-06 TIM test stands include the DS&A LLC Model 102, a practical and moderately-priced test stand for testing a range of TIM materials.

ELECTRONIC COOLING SOLUTIONS, INC.612 National AvenueMountain View, CA 94043Phone: 650-988-1155www.ecooling.comElectronic Cooling Solutions, Inc. provides thermal man-agement expertise to the electronics industry. ECS strives to provide customers with complete solutions, tailored to meet their technical requirements, so that their busi-ness goals will be achieved in a timely and cost-effective manner.

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T H E R M A L M A N A G E M E N T I N M I C R O E L E C T R O N I C S E X H I B I T O R S

MEPTECPresents MicroElectronics Packaging and Test Engineering Council

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ENERDYNE SOLUTIONS125 W. North Bend Way, PO Box 2660North Bend, WA 98045-2660Phone: 425-888-1880www.enerdynesolutions.com Enerdyne Solutions produces advanced thermal manage-ment technology that emphasizes higher performance at lower cost. Indigo™, the Company’s all-metal TIM, pro-vides the performance and long-term reliability of solders at a fraction of their cost. Polara™, a thermoelectric heat spreader technology achieves effective thermal conduc-tance comparable to diamond. How cool is that!

ENPLAS TESCO, INC.765 N. Mary AvenueSunnyvale, CA 94085-2909Phone: 408-749-8124www.enplas-ets.comEnplas is a leading supplier of IC burn-in and test sockets; high precision fine pitch molding and plastic technolo-gies. Sockets for every package type and application: BGA, FBGA, LGA, PGA, CSP (0.5, 0.4 mm), SOIC, QFP, QFN, TSOP, PLCC, ceramic packaging and high frequency applications. Enplas design capabilities include electrical, mechanical stress and thermal simulation for high perfor-mance thermal solution sockets with passive and active heat sinks with fully integrated thermal monitoring and control systems.

E-TEC INTERCONNECT LTD.PO Box 4078Mountain View, CA 94040Phone: 408-746-2800www.e-tec.comThe Swiss connection …• BGA, LGA, QFN & CSP sockets• Strip & matrix contactors • Pitch range from .5mm thru 1.5mm• Pin counts up to 2000• SMT, thru-hole & solderless options• Various chip retention styles available• Custom designs are welcome• Competitive pricing• Expedited delivery

FRALOCK

28525 West Industry DriveValencia, CA 91355Phone: 661-702-6999www.fralock.comFralock is an ISO-9001/2000 and an AS9100 certified facility. They specialize in precision die-cutting of high-performance films, foams, foils, tapes and adhesives. Applications that they specialize in are Electrical Insulation, Thermal Interface Materials, EMI/RFI Shielding, Gasketing and Sealing and Bonding solutions. Serving the Medical, Aerospace, Electronics and Industrial markets.

HARRIS INTERNATIONAL440 N. Wolfe RoadSunnyvale, CA 94085Phone: 408-524-1569www.harrisinternational.comHarris International is the sole distributor of Element Six products in America. Their strength is to provide consis-tent quality, high thermally conductive substrates in vari-ous materials: Diamond, diamond composites and high performance ceramics. A new diamond/ceramic composite is now being offered specifically for processor and graphic chip cooling needs.

HENKEL CORPORATION15350 Barranca Parkway Irvine, CA 92618Phone: 949-789-2500www.us.henkel.comThe electronics group of HENKEL provides materials solutions for the electronics industry. Their unmatched technology includes liquid encapsulants, package level and DCA underfills, molding compounds, electrically conductive adhesives, die attach adhesives, solder materi-als and fluxes, photonics materials, surface mount adhe-sives, conformal coatings, optoelectronic materials, pot-ting compounds, thermally conductive materials, phase change thermal interface materials, and coating powders. Offering a range of materials for environmentally friendly manufacturing, they offer lead-free solder materials, as well as die attach, mold compounds, underfills and liquid encapsulants for semiconductors and other components to meet your 260˚C processing challenges.

HONEYWELL ELECTRONIC MATERIALS15128 East Euclid AvenueSpokane, WA 99216Phone: 509-252-2102www.electronicmaterials.comHoneywell Electronic Materials is a global leader in the supply of critical materials to the semiconductor industry, enabling their customers to develop innovative technologies and overcome manufacturing challenges. Honeywell’s unparalleled expertise in both chemistry and metallurgy and commitment to disciplined quality pro-cesses result in the development of superior, cutting-edge technologies that are now being introduced to the flat panel display (FPD), photovoltaic and printable electronics marketplaces.

INDIUM CORPORATION1676 Lincoln AvenueUtica, NY 13502Phone: 315-853-4900www.indium.comIndium Corporation is an award-winning, global manu-facturer of Pb-free solders, thermal interfaces, and under-fills for printed circuit board assembly and semiconduc-tor packaging. Products include: solder pastes, solder preforms, fluxes, Pb-free solder alloys, underfill materials, die-attach materials, and more for SMT, wave, flip chip, thermal design, photonics, Power-LED, and power devices. SMTA- and Six Sigma-certified engineers available to help you with your product and process issues. Factories are located in the USA, the United Kingdom, Singapore, and China.

JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD. (JCET)5052 Houston AvenueLa Palma, CA 90623Phone: 562-402-7377www.jcet-us.comwww.cj-elec.comCertified with ISO 9002, QS9000, ISO14001 and TS16949, JCET is a leading package assembly company in China, manufacturing more than 3.0 billion IC and 16 billion dis-crete devices in 2006. In December 2005, JCET announced its new-patented packaging technology, FBP, able to replace QFN/DFN, SiP, MCM, BGA, etc., with improved performance and reliability.

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MICRO CONTROL COMPANY7956 Main Street NEMinneapolis, MN 55432Phone: 763-786-8750www.microcontrol.comMicro Control Company is the leading manufacturer of burn-in with test solutions for high-power devices. These high-power burn-in systems are designed with active thermal control per device for devices from 1 to 600 Watts. Burn-in systems with or without test for logic and memory applications are also available.

NEXTREME THERMAL SOLUTIONS3040 Cornwallis Road, PO Box 13981Research Triangle Park, NC 27709-3981Phone: 919-990-8300www.nextremetherm.comNextreme Thermal Solutions manufactures embedded thermoelectric coolers to reduce the temperature of hot spots, increasing the performance, reliability and yield of high-performance CMOS ICs. These solid-state devices operate as miniature heat pumps, efficiently providing localized cooling for electronic applications. These thin-film Peltier coolers are very small for unobtrusive integra-tion close to the IC’s die.

OZEN ENGINEERING, INC.NASA Ames Research Park, Building 19, Suite 2060Moffett Field, CA 94035Phone: 408-732-4665www.ozeninc.comOzen Engineering Inc. is an expert Finite Element Analysis solutions provider and an ANSYS channel partner. They offer CAE consulting, training, and technical support in the fields of: IC Packaging thermal/stress simulation, multiphysics MEMS, BGA solder joint reliability, heat transfer, microfluidics, CFD, and non-linear FEA. Call 408-732-4665 or visit their website.

PALOMAR TECHNOLOGIES2728 Loker Avenue WestCarlsbad, CA 92010Phone: 760-931-3600www.palomartechnologies.comPalomar Technologies (formerly Hughes Aircraft) is a glob-al supplier of automated high-precision assembly systems,

notably wire bonders, die bonders and integrated assembly lines that increase yield and lower costs for manufacturers of optoelectronic, RF, and microelectronic packages in the photonics, wireless, microwave, automotive, aerospace, medical, and life sciences industries.

PROMEX INDUSTRIES, INC.3075 Oakmead Village DriveSanta Clara, CA 95051Phone: 408-496-0222www.promex-ind.comPromex is a unique materials centric Packaging Foundry and IC Packaging assembly service. Molded plastic, ceram-ic and custom packaging solutions including SiPs, MEMS, MCM and LGAs are provided utilizing broad technical capabilities and RoHS expertise. Scaleable capacity allows customers prototyping, “fast tracked” new product intro-ductions, beta manufacturing through volume produc-tion.

PROTAVIC AMERICA, INC.151 Essex StreetHaverhill, MA 01832Phone: 800-807-2294www.protavicamerica.comProtavic America, Inc. manufactures a wide range of highly specialized adhesives, encapsulants and epoxies for use in the microelectronics and electronics industries. These materials are high purity and high reliability prod-ucts. Protavic is a global company with manufacturing and technical locations world wide. All their products are manufactured with consistent lot-to-lot quality. Protavic specializes in modifying existing products to meet new requirements or formulating custom products for unique applications.

SEMPAC, INC. 568 E. Weddell Drive, Suite 5Sunnyvale, CA 94089Phone: 408-400-9002www.sempac.comSEMPAC designs and manufactures Pre-Molded, Open Cavity Plastic Packages. Their focus is on developing standard air cavity packages that meet JEDEC outline and footprint standards that are easily customized. SEMPAC’s products provide an ideal choice for device applications in the Prototype & Test, Telecommunication, Optoelectronic, RF, MEMS and Sensor markets.

SHIN-ETSU MICROSI, INC.10028 South 51st StreetPhoenix, AZ 85044Phone: 480-893-8898www.microsi.comShin-Etsu MicroSi, Inc., together with their parent com-pany Shin-Etsu Chemical Co., Ltd. represent world-class leadership in the development and manufacture of spe-cialty materials for the semiconductor industries. Their product lines are specifically designed to address today’s challenging thermal interface material and packaging requirements.

SIERRA MICROELECTRONICS1062 West Evelyn AvenueSunnyvale, CA 94086Phone: 800-763-7503www.protoexpress.com/microelectronicsSierra Microelectronics manufactures micro circuits down to 25 micron line and space, on varied thermal and CTE controlled laminates, copper moly copper, boron nitride on copper. Sierra also manufactures cooper bump technol-ogy for direct heat sinking of the underside of the die.

SILICON VALLEY MICRO SERVICES LLC 1350 Dell Avenue, Suite 103Campbell, CA 95008Phone: 408-261-1923www.svms.comThe SVMS LLC can develop, design, and build a custom IR microscope or metrology system based on your needs. They will also diagnose problems in your device or pro-cess; evaluate the quality of a subcontractor or contract manufacturing partner, and much more. They can also service, repair and calibrate your microscopes at your facility or image and measure parts at their Silicon Valley metrology facility in Campbell, CA. If seeing is believing, then SVMS can provide you with a customized imaging solution to qualify and quantify the defect.

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SP3 DIAMOND TECHNOLOGIES, INC.2220 Martin AvenueSanta Clara, CA 95050Phone: 408-492-0630www.sicoast.comsp3 Inc. is a full-service provider of products and services related to thin-film and thick-film diamond deposition and other diamond materials. sp3 comprises two compa-nies: sp3 Diamond Technologies and sp3 Cutting Tools. sp3 Diamond Technologies provides thin and thick-film diamond products and deposition services to companies world-wide with a focus on thermal management and dia-mond-on-silicon applications. The company also supplies Hot Filament CVD Reactors. sp3’s corporate headquarters and thin-film diamond deposition facility are located in Santa Clara, California. sp3’s thick-film facility, sp3 Ltd., is located in Calgary, Alberta, Canada.

SPECTRA-MAT, INC.

100 Westgate DriveWatsonville, CA 95076Phone: 831-722-4116www.spectramat.comSpectra-Mat, Inc. is a materials and component manu-facturer specializing in refractory metals: tungsten-cop-per, moly-copper, tungsten alloys, and porous tungsten and molybdenum. They provide custom-tailored thermal management solutions for chip scale and wafer level packaging using their W/Cu, Mo/Cu, and W heavy alloys to match their customers’ expansion and conductivity demands.

SPEEDY CIRCUITS DIVISION OF PJC TECHNOLOGIES 752 Regent Park DriveSan Jose, CA 95123Phone: 408-225-2621www.speedycircuits.comSpeedy Circuits/Metro Circuits is an industry leader in the manufacturing of laminate based packaging substrates to the semiconductor market. Whether it’s BGA, MCM or SOC, they can support a mix of program’s to include quick turn, new product introduction, and or medium volume depending on the market. Speedy Circuits capabilities include copper sealed vias for hi-power packages, conduc-tive via filling, stacked vias, cavity designs for hybrid rf

circuits, bussless electrolyic and electroless Ni/Au, and planar over plating for their special support of the wireless semiconductor marketplace.

THERMAL ENGINEERING ASSOCIATES, INC. (TEA)612 National AvenueMountain View, CA 94043Phone: 650-961-5900www.thermengr.comThermal Engineering Associates, Inc. (TEA) provides test equipment, testing supplies, testing services and consult-ing in the area of semiconductor thermal management. Products include thermal test systems, thermal test fix-tures and environments, thermal load boards and JEDEC and SEMI standard thermal test boards. Services include semiconductor thermal characterization, thermal mea-surement training, and package design consulting.

THERMSHIELD LLC PO Box 1641Laconia, NH 03247Phone: 603-525-3714www.thermshield.comThermshield is a supplier of thermal management prod-ucts to include both standard and custom designed heat sinks for board level, extruded, bonded fin and BGA applications. Other products include custom design engi-neering, heat pipe assemblies, fans and various types of shielding materials.

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BIOGRAPHIES

SYMPOSIUM TECHNICAL CHAIRMAN

Tom Tarter is a working professional in the area of thermal management and electrical charac-terization of packaging structures. He spent over 16 years at Advanced Micro Devices (Sunnyvale, CA) in package characterization and left as a Senior Member of the Technical Staff. After a short time as Director of BGA Package Engineering and Design at Advanced Interconnect Technology (Pleasanton, CA) he is now responsible for thermal management, temperature control, and pack-age development at Neo Photonics Corporation (San Jose/Fremont, CA). His knowledge of micro-electronic and optical packaging spans this career and he is a noted expert on thermal and electri-cal characterization of packages, both in the microelectronic and optoelectronic regimes. Tom has authored or co-authored over 30 published papers and numerous short courses and lectures on thermal and electrical phenomenon in microelectronic packaging and most recently in optoelec-tronic packaging. He has presented short courses and technical papers at conferences and technical meetings around the world. An invited lecturer and author, he has also lectured at graduate level short courses on micro- and opto-electronic packaging at UC Santa Cruz extension and San Jose State University. Tom chaired the JEDEC JC15.1 task group on thermal standards for five years, and was general chair of the JC15 thermal and electrical characterization standards group for two years. He was general chair of the semiconductor heat transfer conference SemiTherm XIII, and serves on the executive committee of SemiTherm to date. He is also technical program chair for SEMI/CPMT-International Electronics Manufacturing Technology Conference 2004 and was the technical program chair for Wescon 2003. Tom is the past chapter chair for the IEEE Silicon Valley Chapter of CPMT. He has worked with the IEEE/CPMT for several years and has an excellent track record of engineering community service. Tom is a senior member of the IEEE.

SYMPOSIUM GENERAL CHAIRMAN

Nick Leonardi is Vice President of Sales and Marketing at CMC Interconnect Technologies, headquartered at the ASU Research Park in Tempe, Arizona. Prior to CMC, Nick was most recently Director of Sales and Marketing for Dynaloy. His prior sales and marketing positions with com-panies such as Shinko and Alcoa followed years of packaging development and applications engi-neering with companies such as AMD, LSI Logic and General Electric. Nick has a B.S. in Materials Engineering with current activities including participation on MEPTEC Advisory Board and Co-chairing Phoenix Chapter meetings. Affiliations include The American Ceramic Society, IMAPS, SMTA and CPMT groups.

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KEYNOTE SPEAKER

Jerry Bartley has been with IBM since 1977 and is currently a Distinguished Engineer guiding first-level packaging teams at IBM’s Engineering and Technology Services organization in Rochester, MN. He has been a significant contributor on a wide range of packaging programs in his 30 years at IBM, including work as the lead engineer on the development and application of ball grid array, ceramic column grid array, and multi-chip module packaging technologies. He has applied this expertise on products ranging from games to supercomputers, and has driven efforts in thermal, mechanical, and electrical performance of packaging and interconnects. The electronics industry recognizes him as an expert on packaging and design trade-offs at all levels of integration.

Mr. Bartley has made many presentations at a variety of industry events over the years, including a recent presentation on the development of the front-side bus for the Xbox360®. He has been grant-ed 18 patents with over 40 patents pending, and he is the chair of JEDEC’s JC15.2 Subcommittee on Electrical Performance of Packaging and Interconnections.

SESSION LEADERS

Jeffrey C. Demmin is currently the Director of Product Marketing at Tessera Technologies, a pro-vider of intellectual property and services to the semiconductor packaging industry. Jeff recently joined Tessera after serving as the editor-in-chief of Advanced Packaging magazine. Prior to that, he was a senior technical editor with Solid State Technology magazine. He holds a bachelor’s degree in physics from Princeton University, a master’s degree in materials science and engineering from Stanford University, and four patents in package design.

Mark Murdza is the Director of Marketing for Antares Advanced Test Technologies. With a BS degree in Manufacturing Engineering fro Arizona State University, Mark has over 11 years of expe-rience in the burn-in and test consumables market. Entering the market as the Quality Manager for a burn-in socket supplier, implementing an ISO 9001 quality system, he played an integral role in various burn-in socket development programs. He gained the technical knowledge of the industry there and moved into various Product Management, Product Marketing and Sales Management roles within the burn-in socket, spring probe interconnect, test socket and load board markets.

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PRESENTERS

Maniam Alagaratnam is currently the Vice President of Package Development R&D and Assembly Engineering for Worldwide Operations at LSI Logic Corporation which is one of the industry leaders of ASIC Technology specializing in ‘multiple systems-on-a-chip solutions’. Maniam gradu-ated with a degree in Electrical and Electronic Engineering from Hendon College of Advanced Technology in England and, has been working in the semiconductor industry for over 27 years. Prior to starting in the semiconductor industry in 1972, Maniam worked with an instrumenta-tion company specializing in digital counters after graduation in England. He first started his career in semiconductor Assembly and Packaging with National Semiconductor, Inc. in Singapore and thereafter, worked in Manufacturing Operations with National in Indonesia and Malaysia. Maniam came to the United States in 1980 and had been working in Packaging with National Semiconductor, Inc. In 1990, he joined LSI Logic Corporation as Operations Manager for Plastic Packaging and was promoted to Vice President of Package Development R&D in 1996. Maniam was the first recipient of the MEPTEC “Technologist of the Year” award in 1998.

Andre Ali has been with Apple since 2002, he currently is the Manager of Portable Thermal Architecture. He is responsible for the thermal architecture and design for all mobile platforms. He has been a significant contributor to wide range of thermal and mechanical packaging designs including the development of the MacBook and MacBook Pro systems’ innovative thermal archi-tecture and control. He has numerous publications in electronics thermal management and design publications and has over 15 patents granted or pending.

Dr. Edmund Cheng is President and CEO of Gradient Design Automation. Ed came to Gradient after eight years at Synopsys, most recently as vice president of marketing for the silicon engineering group, where his responsibilities included software products for custom design and DFM. Prior to joining Synopsys, Ed was president and CEO of Anagram. In 1981, he co-founded Silicon Compilers, where he was vice president of engineering. He started his career at Intel where he held various design and management positions in the microprocessors group. Ed received his B.S.E.E. from Ohio University, and his M.S. and Ph.D. in Electrical Engineering from California Institute of Technology.

Dr. Roger Emigh joined STATS ChipPac in April 2000 and currently manages Package Characterization groups in US (Arizona), Singapore, and Korea that are responsible for Thermal, Mechanical, and Electrical simulation and testing of semiconductor packages in support of array and leaded assem-bly business. Emigh was previously with Johnson Matthey Electronics for 7 years in various roles within R&D, technology development, marketing, and management. Graduate degrees (MS- 85, Ph.D- 90) in Materials Science and Engineering from the University of California, Berkeley; Undergraduate in Physical Metallurgy (BS-83) from Washington State University.

Tony Flowers has been employed by Texas Instruments since 1988 as a cooperative education stu-dent and then full-time upon his graduation. He has been in the field of product engineering for the duration of his career but has spanned several groups including Customizable Digital Signal Processors (cDSP), Hard Disk Drive, Local Area Network Solutions, and Digital Signal Processor

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Solutions (DSPS). He has worked in test, characterization, burn-in, manufacturing, yield improve-ment, and efficiency improvement. Tony holds a BS in Electrical Engineering from Prairie View A&M University class of 1990.

Dr. Jesse Galloway is a Senior Director at Amkor Technology located in Chandler Arizona. His responsibilities include thermal/mechanical testing and analyses of electronic packages. He has over 16 years experience in the electronic packaging industry. Jesse holds a Ph.D. in Mechanical Engineering from Purdue University.

Sherman Ikemoto is the business development manager at Flomerics. He has 6 years of electronics physical design experience at General Dynamics where he specialized in analysis for thermal, shock and vibration integrity. He has 10 years of sales, marketing and business development expe-rience at Flomerics where he specialized in needs assessment, sales and implementation services for software and consulting solutions. He has published three article on the subject of temperature aware design flows. He has a BS in mechanical engineering from San Jose State University and a MS in mechanical engineering from the University of Santa Clara.

Dr. Seri Lee recently joined Nextreme Thermal Solutions as Chief Technology Officer where he is responsible for setting the corporate directions for technology development and providing high performance thermal management solutions to Nextreme’s customers. Prior to joining Nextreme, he held positions at Intel Corporation as Senior Thermal Scientist, Amkor Technology as Manager of Thermal Characterization, Aavid Thermal Technologies as Director of Advanced Thermal Engineering, and at the University of Waterloo in Ontario as Assistant Professor of Mechanical Engineering. Dr. Lee is an active member of the ASME Heat Transfer Division K-16 Committee on Heat Transfer in Electronic Equipment and the IEEE/SemiTherm Executive Committee. He has organized numerous technical programs and sessions, published over 60 technical papers and 16 patents covering thermal issues in electronics. He lectured many professional courses in various locations and conferences, including the ASME Satellite Course on Commercial Application of Heat Sinks. He served as the General Chair for the 1998 IEEE SemiTherm International Symposium. He is a recipient of the 2004 best Journal of Heat Transfer paper award from the ASME Heat Transfer Division.

Chris Lopez is the Business Development Manager, Thermal Solutions at Antares Advanced Test Technologies in Phoenix, AZ. He has over 13 years of experience in heat transfer and fluid mechan-ics in the semiconductor IC and optics industries. Prior to Antares Advanced Test Technologies, he was a senior design engineer at Primarion Inc. developing high power thermal solutions for the power management IC markets. Chris has five patents and three patents pending in the US and worldwide. He has a MS in Mechanical Engineering from the University of Nevada, Reno.

Dr. Devesh Mathur is currently the Director of global technology at Honeywell Electronic Materials for interconnect packaging solutions. He is responsible for new products for thermal cooling solu-tions for IC and related packages. Additionally his responsibilities include new business opportuni-ties, business strategy, intellectual property management, and new products for front end targets. He is an expert in the area of thermal management, six sigma, polymers, and process scale-up and design. Prior to this role Devesh has worked at GE Advanced Materials for seven years in various roles from new products, process design, scale-up & installation, and productivity in the area of

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thermoplastics and thermosets. He did his Ph.D. from Rensselaer Polytechnic Institute in polymer blend design for optimal impact resistance. He has 4 issued patents, 17 publications, and numer-ous invited talks.

Julia Purtell has over 15 years experience in thermal and mechanical design in the computer indus-try. For seven years as Technical Lead at Sun Microsystems she led a group of Thermal Engineers in developing and validating thermal solutions for computer servers. Prior to joining Sun, Julia was at 3Com Corp. where she had complete ownership of projects from mechanical and thermal aspects. Currently she is responsible for thermal management of Xbox360 at Microsoft. Julia has extensive experience in all aspects of the thermal design cycle from initial concept, through simulations, testing and verification to manufacturing release and upgrade support. Julia’s aca-demic background includes graduate and undergraduate degrees in Mechanical Engineering from Moscow Polytechnical Institute.

Dr. Hongyu Ran is senior thermal engineer in Tessera. He is the lead engineer on all aspects of thermal analysis on microelectronics components, modules and systems. He also leads the effort in thermal related R&D projects. He earned his Ph.D. in Mechanical Engineering from California Institute of Technology (Caltech). His research specialty is physics-based modeling, and numerical simulation of complex fluid flow and heat transfer problems. He also conducted postdoctoral research at Applied and Computational Mathematics (ACM) at Caltech, where he developed numerical tools for multi-scale modeling and simulation. He has published several technical papers in the area of numerical modeling, fluid flow, and heat transfer.

Bernie Siegal’s first involvement in semiconductor thermal matters came in 1966 while working at Hewlett-Packard Associates (HPA), the microwave semiconductor group within HP. He and an asso-ciate developed an automated system for making thermal resistance measurements on microwave diodes and authored the feature article describing the method that appeared in the October 1967 issue of the HP Journal. From that beginning to today, Bernie has been an active participant in the semiconductor thermal measurement, modeling and management filed. In 1974, Bernie founded SAGE Enterprises, Inc. and began offering test equipment for measurement of thermal resistance for many different types of semiconductor devices. The thermal testing techniques Bernie devel-oped eventually became incorporated into many of the industry (SEMI and EIA/JEDEC) and US military measurement (Mil Std 750) standards. Besides being actively involved in many of the various standards-creating committees, Bernie was co-founder and primary force behind the start of SEMI-THERM, the premier technical symposium in the field. He has authored over 40 technical papers, presented seminars to world-wide audiences, and conducted several short courses for the Univ. of California, Berkeley extension program. His current company, THERMAL ENGINEERING ASSOCIATES, INC. (TEA), maintains his involvement in the field. Bernie holds M.B.A. (Santa Clara University), M.S.E.E. (San Jose State University), and B.E.E. (Cornell University) degrees. He was elected a Life Fellow of the IEEE and received the IEEE Significant Contributor Award for his work in the semiconductor thermal field. He currently serves as member of the Executive Committee of the IEEE CPMT Silicon Valley Chapter.

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KEYNOTE PRESENTATION

The Future of Thermal Engineering:

Far from a Stand-Alone Discipline

Presented byJerry Bartley

Distinguished EngineerTechnology Collaboration Services

IBM Corporation

In the recent past, as thermal management has become more of a bottle-neck to successful implementation of products, the role is quickly growing beyond “which heat sink should we use here?”. The thermal engineer in today’s product development cycle is migrating back to be an integral member of the development core team. Although there will continue to be the need to analyze, develop, and deliver traditional thermal solutions, those solutions will require more accuracy and detail than before. Steady state answers are just a beginning to the discussion of which cooling path and/or technology should we deploy. Calculations for non-uniform power dissipation and transient temperature swings have become much more important with the high power densities of today. Intimate interaction and cooperation with other disciplines such as electrical performance and reliability may make the competitive dif-ference for a product.

The introduction of much higher processor capability into hand-held devices, games, and the like only serves to complicate the challenge. The perceived market characteristics for such devices are changing somewhat as the users view these devices as more of a necessity than a convenience; the impact to customer satisfaction of a failing device has a lot more meaning. Standards, specifications, and handoffs vs. collaborative multi-discipline engineering may make the difference between a successful product and the alternative.

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SESSION ONE

Thermal Management Overview: Trends and Technology

Session Leader: Jeff Demmin

Director of Product MarketingTessera Inc.

Industry and corporate roadmaps in the semiconductor field indicate alarming trends in the thermal management area. The International Technology Roadmap for Semiconductors (ITRS), for example, identifies “management of overall power consumption” as one of a hand-ful of “near-term grand challenges” impeding the continued progress of the semiconductor industry. In this session, leaders from a range of organizations will give their views on overall trends and challenges in thermal management from a variety of perspectives. Roadmaps, case studies, new developments, and emerging technologies will illustrate where we are today, and what we need to do to meet upcoming requirements.

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Thermal Management of Mobile Electronics:

A Case Study in DensificationPresented by

Hongyu Ran, Ph.D.Senior Engineer, Thermal

Tessera, Inc.

The mobile electronics industry (phones, personal digital assistants, media players, etc.) continues to address the problem of minimizing power dissipation to maximize the battery life. This natural limitation has served well in making thermal management into a non-issue. But two developments have brought thermal performance back to forefront. They are (i) the improvements in battery power including future improvements through the usage of fuel cells, etc. and (ii) increased emphasis on miniaturization, whether through volume reduction (thin laptops) or through multi-function integration, such as a mobile system that can per-form as a phone, PDA, video player/recorder, GPS receiver, etc. Besides the market requirements, there are many forces that determine the design of mobile systems, such as cost, materials and manufacturability. As these are highly integrated systems, thermal management has to be an integral part of the whole design process, starting with the functional description to components and materials selection to form factor and usage profiles. Hence, a priori good understanding of thermal performance of a mobile device based on its expected volumetric density (components volume/total system volume) and power density (power/system volume) would be very beneficial in determining what level of thermal enhancement is needed for the system, which may lead to another system-level parameter, such as thermal component fraction (thermal components volume/system volume) The goal of this paper was to gain a better insight into these system level parameters to aid in mobile systems design. A generic case study was chosen to quantify these parameters as a function of total system power and volume. This system consisted of fairly high level of com-puting power, besides an image sensor and lens system. The computing section was composed of an FPGA, 2 Gb of DDR2 DRAM and 4 Gb of Flash memory devices. The overall system size was approximately 1.5” X 2” X 0.5”. This system had enough processing power to not only capture live video but also carry out computationally intensive tasks such as image processing for facial recognition, etc. The maximum power dissipation was as high as 9 W, which put it beyond purely conductive thermal cooling solutions. Extensive computationally analysis was carried out using commercially available CFD soft-ware to determine the system level parameters and their dependence of power levels, choice of thermal components, external environment and system volume. This study aided in estab-lishing boundaries on system power and volume for conduction-based cooling requirements in mobile electronics.

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Thermal Challenges in ICs and Memory: Hot Spots - Passive Cooling and Beyond

Presented byDevesh Mathur, Ph.D.Director of PackagingHoneywell Corporation

Integrated Circuits aren’t just for CPUs anymore. As memory and graphical operations increase, sophisticated ICs are finding their way into memory and graphics cards. To handle all the increased communication between these ICs, the chipset ICs are also growing in com-plexity. Just like the CPU, these ICs generate heat, and in a modern computer they now all require the attention of the thermal engineer.

Early chipsets and GPUs could dissipate their heat by natural convection from the bare die or heat spreader. At a minimum, they now require TIM and a heatsink. In the case of GPUs and server chipsets, these ICs require active thermal solutions that rival CPU thermal solutions. Even memory cards have small ICs that require TIM and a heatsink to keep them in spec. As with CPUs, fast, reliable performance depends on maintaining low temperatures. This presen-tation will look at the current and future thermal solutions that keep ICs cool.

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SESSION TWO

Issues in Design and Analysis of Advanced Packages

Session Leader:Thomas Tarter

Principal EngineerNeoPhotonics

Thermal design and analysis techniques are continuously adapting to changes in packag-ing structures and technology. Recent trends in packaging continue the push to incorporate additional functionality within each unit. Lateral and stacked versions of multi-chip packages (MCPs) are not only becoming more common but also more complex, including combina-tions of lateral and stacked chips in the same package. Additional complex structures are also gaining popularity: Package-on-Package (PoP), Package-in-Package (PiP), with each specific version bringing with it interesting thermal behavior for thermal engineers to deal with. Along with additional complexity within the package, thermal analysis must increasingly address die level thermal issues (hot spots) and also extend to system level thermal design work. This session will cover how these types of issues are being addressed to ensure satisfac-tory thermal performance.

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New Techniques for Chip and Package Thermal Modeling

Presented bySherman Ikemoto

Business Development Manager, Flomericsand

Edmund Cheng, Ph.D.President & CEO, Gradient Design Automation

Semiconductor products face mounting thermal challenges with the scaling of manufacturing technology in the form of acute, circuit scale hot spots on wires and the active layer of the die. In response, thermal analysis tools have evolved in terms of sophistication and effective-ness. This presentation describes two new areas of functionality that help maintain control over design costs in the face of this emerging thermal challenge. The first is a functionality that enables thermal analysis of the full, chip-package assembly over a full range of modeling resolution from the circuit features on the die to the environment. The second is functional-ity that leverages the emerging standards from the Joint Electron Device Engineering Council (JEDEC) for compact thermal model generation. Case studies that demonstrate the application of the functionality will be presented.

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High Power Packaging: Materials, Design and Thermal

Considerations Presented by

Jesse Galloway, Ph.D.Senior Director, Thermal Characterization

Amkor Technology

Due to higher speed and density requirements, emerging network and consumer products require package solutions with a greater degree of integration between memory and processor chips. These multi-chip modules (MCMs) pose greater design and manufacturing challenges than encountered with single die packages due to the non-symmetric layout and interaction between ICs. The selection of optimal material sets and use of detailed analyses are required to minimize mechanical stresses while maintaining low thermal resistance. Included in this presentation is a discussion of processes used to select thermal materials. Also provided is a discussion of several options available for packaging MCMs. Lastly, a few thermal / mechanical case studies are presented to illustrate some of the tradeoffs made during design analyses.

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Thermal Behavior and Data Processing for

Multi-Chip Packages: Lateral, Stacked, PoP and PiP

Presented byDr. Roger Emigh

Director, WW Package CharacterizationSTATS ChipPAC

As Multi-Chip Packages (MCPs) become more and more complex, they can bring with them some interesting changes in thermal behavior. One example of this is that the thermal resis-tance for each device might not be equal, understanding the differences can help engineers improve thermal performance. MCP structures to be discussed include those with lateral die layouts, stacked die, Package-on-Package (PoP), and Package-in-Package (PiP). With each of these structures also come opportunities to enhance the thermal behavior in some unique ways.

When working with MCPs, thermal engineers also need new methods for testing and process-ing thermal data. Techniques and standards in this area, such as those from JEDEC JC-15.1, have traditionally focused on packages with a single heat source. Extending these techniques to packages with multiple heat sources requires changes to address the increased complexity of the thermal behavior, especially related to the thermal effects between all of the heat generat-ing devices within the package structure.

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SESSION THREE

Thermal Effects and Solutions in the Back End Operation

Session Leader:Mark Murdza

Director of Marketing Antares Advanced Test Technology

The significant issue for both test and burn-in operations is cost. The latest public state-ments have indicated that back-end test costs consume as much as 4 to 5 percent of total manufacturing costs. Test costs are on the rise due to many different variables. Of late, the most notable are thermal issue. While some market segments have tackled thermal issues for years, others are realizing the effects of managing thermally related issues for the first time. As device power densities have increased and fabrication process dipped to 90mn and below many device manufacturers have begun to feel the impact of dealing with thermal issues. In this session we will highlight the nuances in the back end operations, how they impact costs, and the strategies that have been implemented within the industry in order to overcome these issues within various level of beck-end test operations.

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Semiconductor Thermal Resistance –

Standards versus Real Life Presented byBernie Siegal

PresidentThermal Engineering Associates, Inc.

The dramatic growth of parasitic heat generated by semiconductor devices over the last twenty years has necessitated the establishment of thermal measurement standards. This standards-generation challenge has been picked up and responded to by the EIA JEDEC JC15.1 commit-tee with the creation of a dozen different standards documents under the JESD51 heading. The documents provide detailed, science-based instructions on how to implement standard environments for various thermal metrics.

But the purpose of these standards is for thermal comparison of packages and devices, not for application-oriented purposes. As a result, the standard metrics are often misunderstood and misused. This presentation attempts to clarify what the standards metrics are and why they are often not applicable to application-oriented environments.

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Limitations of Traditional Burn-In and Test Methods

Due to Thermal Implications Presented byChris Lopez

Business Development Manager, Thermal SolutionsAntares Advanced Test Technology

As the demand for IC performance increases, in conjunction with miniaturization of device form factors, the need for multi-functional devices and finer die level architectures escalates. These demands come with implications on multiple levels. Of the primary implications are related to the levels of waste heat that are created from these devices.

These very complex wonders of science continue to make their way into the products in which they were intended, and hence into the hands of consumers who buy them, but there seems to be limited consideration given to the back end processing and particularly the ther-mal control during processing that is required to take these products to market. In many cases the implications overlooked by those that are responsible for producing them. Most alarm-ing is that many may not understand the problems that they current possess, or that they will have in the very near future, possibly as soon as the very next project coming down the development pipeline.

This presentation will explore the back end environment for testing of IC’s and the issues that are present in the processing. We will further explore issues in burn-in and what is being done today to handle higher power, higher variance products. The presentation will highlight data from an actual production environment and what is going on behind closed doors.

Presentation not available at time of printing.

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Challenges of Process Variation and Temperature at Burn-In

Presented byTony Flowers

Product Engineering Efficiency ManagerTexas Instruments

Burn-in and Test today have evolved into much more than the after thought it has historically been. Burn-in specifically has been transformed into a high-tech operation which has many dependencies on process variation and thermal packaging characteristics.

Burn-in of devices on the latest process nodes (i.e. 90nm, 65nm, ..), is most challenging due to the variation in process window (i.e. hot to cold process) of a single wafer. If a single wafer’s process variation can span from hot to cold, you must be able to manage the thermal charac-teristics of both hot and cold material at elevated voltages and temperatures simultaneously during burn-in. In this session, I will describe the challenges this causes and I will provide vari-ous methods to model an IC given its process variation and package thermal characteristics.

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SESSION FOUR

Thermal Management in Challenging Product

Applications Session Leader: Nick Leonardi

VP Sales & MarketingCMC Interconnect Technologies

Heat generation in microelectronic based end-products continues to be a challenge, with innovations in materials and design seen as the key to improving performance. The challenges continue to become more complex as in the case of servers, which at one time were not typi-cally confined by overall dimensions but are becoming smaller in size for stacking in server farm rack systems. Gaming hardware with its sophisticated graphics processing continues to require equally sophisticated methods to remove the heat being generated. The areas of High Brightness LEDs and Opto-Electronics have seen their share of thermal related challenges as products have evolved. This session will focus on a selected group of products to present the thermal perspective.

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Mitigating Semiconductor Hot Spots

Presented bySeri Lee, Ph.D.

Chief Technology OfficerNextreme Thermal Solutions, Inc.

Hot spots on the active surface of a semiconductor die dictate overall product performance, reliability and yield, all of which are very sensitive to small changes in temperature. Hot spots result from localized areas of high heat flux. As CMOS process technology scales to smaller feature sizes, total power dissipation is driven upwards by significant increases in the number of transistors per chip, their operating frequency and leakage power. Hot spots are becoming more pronounced as total power dissipation increases. Compounding this non-uniform power dissipation problem is the integration of multiple processor cores per die. Applying uniform chip cooling solutions to reduce the temperature of hot spots is inefficient, unnecessarily cooling the rest of the chip when then requires a larger heat sink. Bigger heat sinks are not an option in many applications, ranging from mobile PCs to servers. A promising new approach is to dynamically cool hot spots with an embedded thermoelectric cooler (eTEC), which is a miniature, solid-state heat pump fabricated with a nano-engineered thin film using semicon-ductor processing techniques.

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XBOX360 Thermal System Design and

Verification Presented byJulia Purtell

Thermal Design EngineerMicrosoft

Thermal design and development cycle of consumer gaming device has unique challenges. Following certain design and verification cycle, creating and maintaining appropriate simula-tion tools helps streamline design process. This presentation will focus on overall approach to XBOX360 thermal management execution, design details and verification.

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System Design Challenges Presented by

Andre AliMobile Thermal Architecture Manager

Apple, Inc.

The trend in microelectronic devices is to minimize the device size and increase its perfor-mance. This results in an increase in both power dissipation and heat density. High power and heat density present serious challenges to current thermal management solutions in today’s electronic enclosures. The presentation focuses on examples of system and die thermal chal-lenges and provides an understanding of their effects on system level design.

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About MEPTEC

MEPTEC (MicroElectronics Packaging and Test Engineering Council) is a trade association of semicon-ductor suppliers, manufacturers, and vendors concerned exclusively with packaging, assembly, and testing, and is committed to enhancing the competitiveness of the back-end portion of the semiconduc-tor industry. Since its inception over 25 years ago, MEPTEC has provided a forum for semiconductor packaging and test professionals to learn and exchange ideas that relate to packaging, assembly, test and handling. Through our monthly luncheons, and one-day symposiums, and an Advisory Board consist-ing of individuals from all segments of the semiconductor industry, MEPTEC continuously strives to improve and elevate the roles of assembly and test professionals in the industry. For more information about MEPTEC events and membership visit our website at www.meptec.org.

P.O. Box 222, Medicine Park, OK 73557Tel: 650-714-1570 Fax: 1-866-424-0130

Email: [email protected]

Visit the MEPTEC web site at www.meptec.org for more information.