cpen 315 - digital system design spring 2008 combinational functions and circuits chapter 3 © logic...
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CPEN 315 - Digital System Design
Spring 2008
Combinational Functionsand Circuits
Chapter 3
© Logic and Computer Design Fundamentals, 4rd Ed., Mano© 2008 Pearson Prentice Hall
Overview
Functions and Functional Blocks Decoding Encoding Selecting Implementing Combinational Functions Using:
• Decoders and OR gates• Multiplexers (and inverter)• ROMs• PLAs• PALs
The functions considered are those found to be very useful in design
Corresponding to each of the functions is a combinational circuit implementation called a functional block.
In the past, many functional blocks were implemented as SSI, MSI, and LSI circuits.
Today, they are often simply parts within VLSI circuits.
Functions and Functional Blocks
Simple Logic Functions
Functions of a single variable Can be used on the inputs to functional blocks.
Enabling Functions
Enabling
Disabling
Permits an input signal to pass through to an output
Blocks an input signal from Passing through to an output
Example:The ignition switch = ENLights = X
Decoding
Decoding - the conversion of an n-bit input code to an m-bit output code such that each valid code word produces a unique output code
Circuits that perform decoding are called decoders
Here, functional blocks for decoding are called n-to-m line decoders, and they generate 2n (or fewer) minterms for the n input variables
1-to-2-Line Decoder
2-to-4-Line Decoder
Decoder Examples
2-to-4-Line Decoder with Enable
In general, attach m-enabling circuits to the outputs See truth table below for function
– Note use of X’s to denote both 0 and 1
– Combination containing two X’s represent four binary combinations
EN
A 1
A 0
D0
D1
D2
D3
(b)
EN A1 A0 D0 D1 D2 D3
01111
X0011
X0101
01000
00100
00010
0000
Decoder with Enable Example
Encoding
Encoding - the opposite of decoding - the conversion of an m-bit input code to a n-bit output code such that each valid code word produces a unique output code
Circuits that perform encoding are called encoders An encoder has 2n (or fewer) input lines and n output
lines which generate the binary code corresponding to the input values
Typically, an encoder converts a code containing exactly one bit that is 1 to a binary code corres-ponding to the position in which the 1 appears.
INPUTS OUTPUTS
D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0 0 0 1
0 0 0 0 0 1 0 0 0 1 0
Octal-to-Binary Encoder
Equations:A2 = D4 + D5 + D6 + D7
A1 = D2 + D3 + D6 + D7
A0 = D1 + D3 + D5 + D7
What type of gates dowe need for this encoder?4-input OR gates
Selecting of data or information is a critical function in digital systems and computers
Circuits that perform selecting have:– A set of information inputs from which the selection
is made
– A single output
– A set of control lines for making the selection
Logic circuits that perform selecting are called ___________?
Selecting can also be done by three-state logic or transmission gates
Selecting
multiplexers
Multiplexers
A multiplexer selects information from an input line and directs the information to an output line
For an n selection inputs (Sn 1, … S0) called selection inputs, 2n information inputs (I2
n 1, … I0), and one output Y
are needed.
2-to-1-Line Multiplexer
Since 2 information inputs = 21 n = 1 The single selection variable S has two values:
– S = 0 selects input I0
– S = 1 selects input I1
The Output:
Y = I0 + SI1
The circuit:
S
S
I0
I1
DecoderEnablinggates
Y
In general, for an 2n-to-1-line multiplexer:n-to-2n-line decoder2n x 2 AND-OR
4-to-1-Line Multiplexer
S1Decoder
S0
Y
S1Decoder
S0
Y
S1Decoder
S0
Y
I2
I3
I1
I0
Alternative Function Implementation
Alternative implementation techniques:
– Decoders and OR gates
– Multiplexers (and inverter)
– ROMs
– PLAs
– PALs Can be referred to as structured implementation
methods since a specific underlying structure is assumed in each case
Decoders and OR gates - Example
)7 ,6 ,5 ,3() , ,(
)7 ,4 ,2 ,1() , ,(
zyxC
zyxS
Decoders and OR gates (continued)
)7 ,6 ,5 ,3() , ,(
)7 ,4 ,2 ,1() , ,(
zyxC
zyxS
Implement any m functions of n + 1 variables by using:– An m-wide 2n-to-1-line multiplexer
– A single inverter
Design:– Find the truth table for the functions.
– Based on the values of the first n variables, separate the truth table rows into pairs
– For each pair and output, define a basic function of the final variable (0, 1, X,...)
– Using the first n variables as the index, value-fix the information inputs to the multiplexer with the corresponding rudimentary functions
– Use the inverter to generate the basic function X
Multiplexer Approach
Example: Gray to Binary Code
Design a circuit to convert a 3-bit Gray code to a binary code
The formulation givesthe truth table on theright
It is obvious from thistable that X = C and theY and Z are more complex
GrayA B C
Binaryx y z
0 0 0 0 0 01 0 0 0 0 11 1 0 0 1 00 1 0 0 1 10 1 1 1 0 01 1 1 1 0 11 0 1 1 1 00 0 1 1 1 1
Gray to Binary (continued)
Rearrange the table so that the input combinations are in counting order, pair rows, and find the simple functions.
Gray
A B C
Binary
x y z
Functions of C for y
Functions of C for z
0 0 0 0 0 0
0 0 1 1 1 1
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 0 0 1
1 0 1 1 1 0
1 1 0 0 1 0
1 1 1 1 0 1
F = C
F = C
F = C
F = C
F = C
F = CF = C
F = C
Gray to Binary (continued)
S1S0
AB
D03D02D01D00
Out Y
8-to-1MUX
C
C
C
C D03D02D01D00
Out Z
8-to-1MUX
S1S0
AB
C
C
C
C
Assign the variables and functions to the multiplexer inputs:
Implementing a 4-input Function with a Multiplexer
Read Only Memory
Read Only Memories (ROM) or Programmable Read Only Memories (PROM) have:
– N input lines,
– M output lines, and
– 2N decoded minterms. Fixed AND array Programmable OR Array A program for a ROM or PROM is simply a multiple-
output truth table
– If a 1 entry, a connection is made to the corresponding minterm for the corresponding output
– If a 0, no connection is made
Example: A 8 X 4 ROM (N = 3 input lines, M= 4 output lines)
The fixed "AND" array is a“decoder” with 3 inputs and 8outputs implementing minterms.
The programmable "OR“array uses a single line torepresent all inputs to anOR gate. An “X” in thearray corresponds to attaching theminterm to the OR
Read Example: For input (A2,A1,A0)= 111, output is (F3,F2,F1,F0 ) =_______.
Read Only Memory Example
D7D6D5D4D3D2D1D0
A2
A1A0
A
B
C
F0F1F2F3
X XX
XX
X
XX
XX
1 1 0 1
Programmable Logic - Advantages
Many programmable logic devices are field- programmable, i. e., can be programmed outside of the manufacturing environment
Most programmable logic devices are erasable and reprogrammable.
– Allows “updating” a device or correction of errors
– Allows reuse the device for a different design - the ultimate in re-usability!
Programmable logic devices can be used to prototype design that will be implemented for sale in regular ICs.– Complete Intel Pentium designs were actually
prototype with specialized systems based on large numbers of VLSI programmable devices!
Programmable Configurations
(a) Programmable read-only memory (PROM)
Inputs FixedAND array(decoder)
ProgrammableOR array Outputs
ProgrammableConnections
(b) Programmable array logic (PAL) device
Inputs ProgrammableAND array
FixedOR array Outputs
ProgrammableConnections
(c) Programmable logic array (PLA) device
Inputs ProgrammableOR array Outputs
ProgrammableConnections
ProgrammableConnections
ProgrammableAND array
Programmable Array Logic Example
X
XX
XX
XX
X XX
X X X
XX X
X X X
AND gates inputs
A C WProductterm
1
2
3
4
5
6
7
8
9
10
11
12
A
B
C
D
W
F1
F2
X
A B B C D D W
A C WA B B C D D W
Programmable Logic Array Example
3-input, 3-output PLA with 4 product terms
What are the equations for F1 and F2?
Fuse intact
Fuse blown
1
F1
F2
X
A
B
C
C C B B A A 0
1
2
3
4X
XX
X X
X
X
X
X
X
X
X
X
X A B
A C
B C
A B
X
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