bphy verilog hdl

7/26/2019 Bphy Verilog Hdl

1/11

A

Selected List of Resources

on

Verilog HDL

&

Xilinx FPGA

Compiled

By

Resource Centre


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Books available in Resource Centre

Sr. No. Titles

1. Arnold, Mark Gordon: Verilog digital computer design : algorithms

into hardwareNew Jersey. Prentice Hall, 1999621.392 ARN017192

2. Ashenden, Peter J.Digital design: an embedded systems approach using verilogAmsterdam. Elsevier, 2008621.395 ASH021341

3. Bening, Lionel & Foster, Harry D.

Principles of verifiable RTL design : a functional coding stylesupporting verification processes in verilogLondon. Kluwer Academic Publishers, 2000621.392 BEN002970

4. Betz, Vaughn, Rose, Jonathan & Marquardt, AlexanderArchitecture and CAD for Deep-Submicron FPGAsLondon. Kluwer Academic Publishers, 1999621.395 BET002762

5.

Bhaskar, J.Verilog HDL PrimerHyderabad . BS Publications , 2001621.382 BHA004611

6. Botros, Nazeih M.

HDL programming fundamentals : VHDL and VerilogHinghamDa Vinci Engineering Press, 2007621.392 BOT

0165677.

Brown, Stephen & Vranesic, ZvonkoFundamentals of digital logic with verilog designNew Delhi. Tata McGraw-Hill, 2003621.392 BRO004456

8. Cavanagh, Joseph J. F.Digital design and Verilog HDL fundamentalsBoca Raton. CRC Press, 2008


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621.395 CAV023019

9. Cavanagh, Joseph

VeriIog HDL : digital design and modelingBoca Raton. CRC Press/Taylor & Francis, 2007621.392 CAV015513

10. Chonnad, Shivakumar S. & Balachander, Needamangalam B.Verilog : frequently asked questions : language, applications andextensions. (Springer International Edition)New Delhi. Springer, 2004621.392 CHO015592

11. Ciletti, Michael D.Advanced digital design with the verilog HDLNew Delhi. Prentice Hall of India, 2005621.395 CIL012569

12. Ciletti, Michael D.Modeling, synthesis, and rapid prototyping with the verilog HDLNew Jersey. Prentice Hall, 1999621.392 CIL006522- 006523

13. Coffman, Ken

Real world FPGA design with VerilogNew Jersey. Prentice Hall PTR, 1999621.395 COF021880

14. Deschamps, Jean-Pierre, Bioul, Gery Jean Antoine & Sutter, Gustavo

D.Synthesis of arithmetic circuits : FPGA, ASIC and embedded systemsHoboken. John Wiley & Sons, 2006621.395 DES017013

15.

Eccles, William J.Pragmatic logicSan Rafael. Morgan & Claypool Publishers, 2007621.395 ECC020888

16. FitzPatrick, Dan & Miller, IraAnalog behavioral modeling with the Verilog-A languageBolton. Kluwer Academic Publishers, 1998621.381 FIT


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02010517. Foster, Harry D., Krolnik, Adam C. & Lacey, David J.

Assertion-based designBoston. Kluwer Academic, 2003621.395 FOS008625

18. George, Varghese & Rabaey, Jan M.Low-Energy FPGAs - architecture and designLondon. Kluwer Academic Publishers, 2001621.3815 GEO 002752

19. Ghosh, SumitHardware description languages : concepts and principlesNew Delhi. Prentice Hall of India, 2001621.392 GHO005111

20. Gokhale, Maya B. & Graham, Paul S.

Reconfigurable computing : accelerating computation with field-programmable gate arraysNew York. Springer, 2005621.395 GOK013923

21. Kundert, Kenneth S. & Zinke, OlafDesigners guide to verilog AMSBoston. Kluwer Academic Publishers, 2004

621.392 KUN01257822. Lee, James M.

Verilog quickstart : a practical guide to simulation and synthesis inverilogLondon. Kluwer Academic Publishers, 1999621.392 LEE002969

23. Lilja, David J. & Sapatnekar, Sachin S.Designing digital computer systems with Verilog

Cambridge. Cambridge University Press, 2005621.392 LIL012819

24. Maxfield, CliveDesign warrior's guide to FPGAs : devices, tools, and flowsNew Delhi. Elsevier, 2004621.395 MAX014893

25. Mazumder, Pinaki & Rudnick, Elizabeth M.


5/11

Genetic algorithms for VLSI design, layout & test automationDelhi. Addison-Wesley, 1999005.1 MAZ000826

26. Minns, Peter & Elliott, Ian D.FSM-based digital design using Verilog HDLChichester. John Wiley & Sons, 2008004.33 MIN020404

27. Mintz, Mike & Ekendahl, RobertHardware verification with SystemVerilog : an object-orientedframeworkNew York. Springer, 2007621.392 MIN019527

28. Mittra, Swapnajit

Principles of Verilog PLILondon . Kluwer Academic Publishers , 2000621.392 MIT002974

29. Murgai, Rajeev, Brayton, Robert K. & Sangiovanni-Vincentelli,AlbertoLogic synthesis for field-programmable gate arraysLondon. Kluwer Academic Publishers, 1995

621.395 MUR00304730. Navabi, Zainalabedin

Embedded core design with FPGAsNew York. McGraw-Hill, 2007621.3815 NAV016417

31. Navabi, Zainalabedin

Verilog digital system design: RT level synthesis, testbench andverification, 2nded.

621.392 NAV02181432. Oldfield, John V. & Dorf, Richard C.

Field-programmable gate arrays : reconfigurable logic for rapidprototyping and implementation of digital systemsNew York. WileyJohn Wiley & Sons, 1995621.395 OLD017507

33. Padmanabhan, T. R. & Sundari, B.Bala Tripura


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Design through Verilog HDLNew Jersey. IEEE Press, 2003005.74 PAD008572

34. Palnitkar, SamirVerilog HDL : a guide to digital design and synthesisDelhi. Pearson Education Asia, 2001621.382 PAL002267-02269

35. Ramachandran, SeetharamanDigital VLSI systems design : a design manual for implementation ofprojects on FPGAs and ASICs using verilogDordrecht. Springer, 2007621.395 RAM016719

36. Reese, Robert B. & Thornton, Mitchell Aaron

Introduction to logic synthesis using Verilog HDLSan Rafael. Morgan & Claypool Publishers, 2006621.392 REE020883

37. Sagdeo, VivekComplete verilog bookLondon. Kluwer Academic Publishers, 2000621.392 SAG

00297338. Sandige, Richard S.Digital design essentialsNew Jersey. Prentice Hall, 2003621.381 SAN007300

39. Smith, David R.Verilog styles for synthesis of digital systemsNew Jersey . Prentice Hall , 2000621.392 SMI

00274440. Smith, Michael John SebastianApplication-specific integrated circuitsDelhi. Pearson Education Asia, 2001621.382 SMI000779

41. Spear, Chris

SystemVerilog for verification : a guide to learning the testbenchlanguage features


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New York. Springer, 2006621.392 SPE014692

42. Stine, James E.Digital computer arithmetic datapath design using verilog HDL.Boston. Kluwer Academic Publishers, 2004621.395 STI013461

43. Sutherland, Stuart

Verilog PLI Handbook: users guide and comprehensive reference onthe Verilog programming languages of a interfaceLondon. Kluswer Publishers, 1999621.392 REF SUT002971

44. Sutherland, StuartVerilog PLI handbook : a users guide and comprehensive referenceon the Verilog programming language interface, 2nded.621.392 SUTNew Delhi. Springer, 2008018477

45. Sutherland, Stuart, Davidmann, Simon & Flake, PeterSystem Verilog for design, 2nded.New York. Springer, 2006621.392 SUT

014694

46. Sutherland, Stuart & Mills, DonVerilog and system Verilog gotchas: 101 common coding errors andhow to avoid themNew York. Springer, 2007621.392 SUT019539

47. Sutherland, Stuart

Verilog 2001London. Kluwer Academic Press, 2002

621.3815 SUT00274848. Thomas, Donald E. & Moorby, Philip R.

Verilog hardware description language, 5thed.New Delhi. Kluwer Academic Publishers, 2002621.395 THO017680

49. Trimberger, Stephen M., ed.Field-programmable gate array technology. (Springer International


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Edition)New Delhi. Springer, 2007621.395 TRI015585

50. Wakerly, John F.Digital design: principles and practices, 3rded.New Delhi. Pearson Education Asia, 2001621.382 WAK010664- 010665

51. Wolf, WayneFPGA-based system designNew Jersey. Prentice Hall, 2004621.395 WOL012573

52. Zeidman, BobVerilog designers libraryNew Jersey. Prentice Hall, 1999621.392 ZEI002239

53. Zeidman, BobDesigning with FPCAS and CPLDSLawrence. CMP Books, 2002621.395 2 ZEI005497

E Books54.Handbook on Verilog HDL

http://www.ge.infn.it/~pratolo/verilog/Handboook_Bucknell.pdf55.

Verilog-A : Language Reference Manual - (Analog Extensions to

Verilog HDL)

http://www.vhdl.org/verilog-ams/htmlpages/public-docs/lrm/VerilogA/verilog-a-lrm-1-0.pdf

CDs available in the Resource CentreSr. No. Titles

1 Botros, Nazeih M.HDL programming fundamentals : VHDL and Verilog. Hingham. DaVinci Engineering621.392 BOTC01325

2 Brown, Stephen & Vranesic, ZvonkoFundamentals of digital logic with verilog design.621.392 BROC00498


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3 Ciletti, Michael D.Advanced digital design with the verilog HDL.621.395 CILC00450, C00451 & C01021

4 Ciletti, Michael D.Xilinx student edition 4.2i. (ISE student ed.)621.392 CILC00671

5 Lee, James M.Verilog quickstart : a practical guide to simulation and synthesis inverilog.621.392 LEEC00441

6 Minns, Peter & Elliott, Ian D.FSM-based digital design using Verilog HDL. [Synapticad : veriloggerextreme]004.33 MINC01625

7 Navabi, ZainalabedinVerilog digital system design : RT level synthesis, testbench andverification, 2nd ed.. 621.392 NAVC01679

8 Navabi, ZainalabedinVerilog Digital System Design.

621.392 NAVC006369 Palnitkar, Samir

Verilog HDL : a guide to digital design and synthesis.621.382 PALC00223 - C00237

10 Ramachandran, SeetharamanDigital VLSI systems design : a design manual for implementation ofprojects on FPGAs and ASICs using verilog.621.395 RAM

C0133311 Sagdeo, VivekComplete Verilog Book.621.392 SAGC00446

12 Sandige, Richard S.Xilinx student edition 4.2i.621.381 SANC00715


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13 Stine, James E.Digital computer arithmetic datapath design using verilog HDL.621.395 STIC01119

14 Sutherland, StuartVerilog PLI handbook : a user's guide and comprehensive referenceon the Verilog programming language interface, 2nd ed..621.392 SUT C01449C01449

15 Sutherland, StuartVerilog PLI Handbook. [User`s Guide and Comprehensive Referenceon the Verilog Programming Languages of a Interface]621.392 REF SUTC00445

16 Thomas, Donald E. & Moorby, Philip R.Verilog hardware description language, 5th ed.621.395 THOC01402

17 Thomas, Donald E.Verilog hardware description languages, 4th ed.621.392 THOC00440

18 Zeidman, BobVerilog Designer's Library.

621.392 ZEIC00437

Dissertations available in the Resource CentreSr. No. Titles

1 Choudhary, Vivek KumarFPGA implementation of direct sequence spread spectrumtechniquesGandhinagar. Dhirubhai Ambani Institute of Information andCommunication Technology (DA-IICT), 2008

621.38456 CHOT00179

2 Rawat, NitinFPGA implementation of image compression algorithm usingwavelet transformGandhinagar. Dhirubhai Ambani Institute of Information andCommunication Technology (DA-IICT), 2008621.3670151 RAW T00162

Other resources


11/11

Sr. No. Titles

1Verilog-1995 - Quick Reference Guide

http://www.sutherland-hdl.com/online_verilog_ref_guide/vlog_ref_top.html

Designer s Guide to VHDL, HARDWARE DESCRIPTION LANGUAGE

(HDL)

.,FPGA (Field Programmable Gate Array)

http://www.doulos.com/

A Verilog HDL Test Bench Primer : Application Note

http://www.latticesemi.com/lit/docs/appnotes/cpld/an013_1.pdf

SystemVerilog - Video Gallery

http://www.doulos.com/knowhow/video_gallery/

Verilog Useful links

http://www.asic-world.com/verilog/verilinks.html

2Proceedings:

Verilog HDL Conference, 1996. Proceedings., 1996 IEEE

International

http://ieeexplore.ieee.org/xpl/RecentCon.jsp?punumber=3561

Verilog HDL Conference and VHDL International Users Forum,

1998. IVC/VIUF. Proceedings., 1998 International

http://ieeexplore.ieee.org/xpl/RecentCon.jsp?punumber=5334

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