chp23 - vlsi handbook [crc press 1999]

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Muroga, S. "Expressions of Logic Functions" The VLSI Handbook. Ed. Wai-Kai Chen Boca Raton: CRC Press LLC, 2000 © 2000 by CRC PRESS LLC

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Page 1: CHP23 - VLSI Handbook [CRC Press 1999]

Muroga, S. "Expressions of Logic Functions"The VLSI Handbook.Ed. Wai-Kai ChenBoca Raton: CRC Press LLC, 2000

© 2000 by CRC PRESS LLC

Page 2: CHP23 - VLSI Handbook [CRC Press 1999]

23Expressions of Logic

Functions

23.1 Introduction to Basic Logic OperationsBasic Logic Expressions • Logic Expressions • Logic Expressions with Cubes

23.2 Truth TablesDecimal Specifications

23.3 Karnaugh Maps Two Completely Specified Functions to Express an Incompletely Specified Function

23.4 Binary Decision Diagrams

23.1 Introduction to Basic Logic Operations

In a contemporary digital computer, logic operations for computational tasks are usually done withsignals that take values of 0 or 1. These logic operations are performed by many logic networks whichconstitute the computer. Each logic network has input variables x1, x2, …, xn and output functions f1, f2,… , fm. Each of the input variables and output functions take only binary value, 0 or 1. Now let usconsider one of these output functions, f. Any logic function f can be expressed by a combination table(also called a truth table) exemplified in Table 23.1.

Basic Logic Expressions

Any logic function can be expressed with three basic logic operations: OR, AND, and NOT. It can alsobe expressed with other logic operations, as explained in a later section.

The OR operation of n variables x1, x2, …, xn yields the value 1 whenever at least one of the variablesis 1, and 0 otherwise, where each of x1, x2, …, xn assumes the value 0 or 1. This is denoted by x1 ∨ x2 ∨

TABLE 23.1 Combination Table

x y z f0 0 0 00 0 1 00 1 0 10 1 1 11 0 0 01 0 1 01 1 0 01 1 1 1

Saburo MurogaUniversity of Illinois at Urbana-Champaign

© 2000 by CRC Press LLC

Page 3: CHP23 - VLSI Handbook [CRC Press 1999]

… ∨ xn. The OR operation defined above is sometimes called logical sum, or disjunction. Also, someauthors use “+”, but throughout Section V, we use ∨, and + is used to mean an arithmetic addition.

The AND operation of n variables yields the value 1 if and only if all variables x1, x2, …, xn aresimultaneously 1. This is denoted by x1·x2·x3 … xn. These dots are usually omitted: x1x2x3…xn. The ANDoperation is sometimes called conjunction, or logical product.

The NOT operation of a variable x yields the value 1 if x = 0, and 0 if x = 1. This is denoted by orx′. The NOT operation is sometimes called complement or inversion.

Using these operations, AND, OR, and NOT, a logic function, such as the one shown in Table 23.1can be expressed in the following formula:

(23.1)

Logic Expressions

Expressions with logic operations with AND, OR, and NOT, such as Eq. 23.1, are called switchingexpressions or logic expressions. Variables x, y, and z are sometimes called switching variables or logicvariables, and they assume only binary values 0 and 1. In logic expressions such as Eq. 23.1, each variable,xi, appears with or without the NOT operation, that is, as or xi. Henceforth, and xi are called theliterals of a variable xi.

Logic Expressions with Cubes

Logic expressions such as can be expressed alternatively as a set, {(10-), (-11),(010)}, using components in a vector expression such that the first, second, and third componentsof the vector represent x, y, and z, respectively, where the value “1” represents xi, “0” represents ,and “-” represents the lack of the variable. For example, (10-) represents . These vectors are calledcubes. Logic expressions with cubes are used often because of their convenience for processing bya computer.

23.2 Truth Tables

The value of a function f for different combinations of values of variables can be shown in a table,as exemplified in Tables 23.1 and 23.2. The table for n variables has 2n rows. Thus the table sizeincreases rapidly as n increases.

Under certain circumstances, some of the combinations of input variable values never occur, or evenif they occur, we do not care what values f assumes. These combinations are called don’t-care conditions,or simply don’t-cares, and are denoted by “d” or “*”, as shown in Table 23.2.

TABLE 23.2 Truth Table with Don’t-Care Conditions

Decimal Number of Row

Variables Functionx y z f

0 0 0 0 01 0 0 1 12 0 1 0 d3 0 1 1 04 1 0 0 d5 1 0 1 16 1 1 0 17 1 1 1 0

x

f xyz xyz xyz∨∨=

xi xi

f xy yz xyz∨ ∨=

xi

xy

© 2000 by CRC Press LLC

Page 4: CHP23 - VLSI Handbook [CRC Press 1999]

Decimal Specifications

A concise means of expressing the truth table is to list only rows with f = 1 and d, identifying these rowswith their decimal numbers in the following decimal specifications. For example, the truth table of Table23.2 can be expressed, using ∑, as

If only rows with f = 0 and d are considered, the truth table in Table 23.2 can be expressed, using ∏, as

23.3 Karnaugh Maps

Logic functions can be visually expressed using a Karnaugh map, which is simply a different way ofrepresenting a truth table, as exemplified for four variables in Fig. 23.1(a). For the case of four variables,for example, a Karnaugh map consists of 16 cells; that is, 16 small squares as shown in Fig. 23.1(a).Here, two-bit numbers along the horizontal line above the squares show the values of x1 and x2, andtwo-bit binary numbers along the vertical line on the left of the squares show the values of x3 and x4.The top left cell in Fig. 23.1(a) has 1 inside for x1 = x2 = x3 = x4 = 0. Also, the cell in the second rowand the second column from the left has d inside. This means f = d (i.e., don’t-care) for x1 = 0, x2 =1, x3 = 0, and x4 = 1. The binary numbers that express variables are arranged in such a way that binarynumbers for any two cells that are horizontally or vertically adjacent differ in only one bit position.Also, the two numbers in each row in the first and last columns differ in only one bit position andare interpreted to be adjacent. Also, the two numbers in each column in the top and bottom rows aresimilarly interpreted to be adjacent. Thus, the four cells in the top row are interpreted to be adjacentto the four cells in the bottom row in each column. The four cells in the first column are interpretedto be adjacent to the four cells in the last column in each row. With this arrangement of cells and thisinterpretation, a Karnaugh map is more than a concise representation of a truth table; it can expressmany important algebraic concepts, as we will see later. A Karnaugh map is a two-dimensionalrepresentation of the 16 cells on the surface of a torus, as shown in Fig. 23.1(b), where the two endsof the map are connected vertically and horizontally.

Figure 23.2 shows the correspondence between the cells in the map in Fig. 23.2(a) and the rows in thetruth table in Fig. 23.2(b). Notice that the rows in the truth table are not shown in consecutive order inthe Karnaugh map. The Karnaugh map labeled with variable letters, instead of with binary numbers,

FIGURE 23.1 Karnaugh map for four variables.

f x y z, ,( ) Σ 1 5 6, ,( ) d 2 4,( )+=

f x y z, ,( ) Π 0 3 7, ,( ) d 2 4,( )+=

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Page 5: CHP23 - VLSI Handbook [CRC Press 1999]

shown in Fig. 23.2(c), is also often used. Although a 1 or 0 shows the function’s value corresponding toa particular cell, 0 is often not shown in each cell. Cells that contain 1’s are called 1-cells (similarly, 0-cells).

Patterns of Karnaugh maps for two and three variables are shown in Figs. 23.3(a) and (b), respectively.As we extend this treatment to the cases of 5 or more variables, the maps, which will be explained in alater subsection, become increasingly complicated.

A rectangular loop that consists of 2i 1-cells without including any 0-cells expresses a product of literalsfor any i, where i ≥ 1. For example, the square loop consisting four 1-cells in Fig. 23.4(a) represents theproduct , as we can see it from the fact that takes value 1 only for these 1-cells, i.e., x1 = 0, x2

= 1, x3 = x4 = 0; x1 = x2 = 1, x3 = x4 = 0; x1 = 0, x2 = 1, x3 = 0, x4 = 1; and x1 = x2 = 1, x3 = 0, x4 = 1. Arectangular loop consisting of a single 1-cell, such as the one in Fig. 23.4(b), for example, represents theproduct of literals that the cube (0001) expresses, i.e., . Thus, the map in Fig. 23.4(a) expressesthe function ∨ and the map in Fig. 23.4(b) expresses the function ∨ ∨ .

FIGURE 23.2 Correspondence between the cells in a Karanaugh map for four variables and the rows in a truth table.

FIGURE 23.3 Karanaugh map for two and three variables.

x2x3 x2x3

x1x2x3x4

x2x3 x1x3x4 x1x2x3x4 x1x2x3 x2x4

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Page 6: CHP23 - VLSI Handbook [CRC Press 1999]

Two Completely Specified Functions to Express an Incompletely Specified Function

Suppose we have an incompletely specified function f, as shown in Fig. 23.5(a), i.e., a function that hassome don’t-cares. This incompletely specified function f can be expressed alternatively with two com-pletely specified functions, f ON and f OFF, shown in Fig. 23.5(b) and (c), respectively. f ON is called ON-setof f and is the function whose value is 1 for f = 1and 0 for f = 0 and d. f OFF is called OFF-set of f and is1 for f = 0 and 0 for f = 1 and d. Don’t-care set of f can be derived as

23.4 Binary Decision Diagrams

Truth tables or logic expressions can be expressed with binary decision diagrams, which are usuallyabbreviated as BDDs. Compared with logic expressions or truth tables, BDDs have unique features, suchas unique concise representation, processing speed, and the memory space, as discussed in a later section.

Let us consider a logic expression, ∨ x3, for example. This can be expressed as the truth tableshown in Fig. 23.6(a). Then, this can be expressed as the BDD shown in Fig. 23.6(b). It is easy to seewhy Fig. 23.6(b) represents the truth table in Fig. 23.6(a). Let us consider the row, (x1x2x3) = (011), forexample, in Fig. 23.6(a). In Fig. 23.6(b), starting from the top node which represents x1, we go down to

FIGURE 23.4 Products of literals expressed on Karnaugh maps.

FIGURE 23.5 Expression of an incompletely specified function f with two completely specified functions.

f DC f ON f OFF∨=

x1x2

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Page 7: CHP23 - VLSI Handbook [CRC Press 1999]

the left node which represents x2, following the dotted line corresponding to x1 = 0. From this node, wego down to the second node from the left which represents x3, following the solid line corresponding tox2 = 1. From this node, we go down to the fourth rectangle from the left which represents, f = 1, followingthe solid line corresponding to x3 = 1. Thus, we have the value of f that is shown for the row, (x1, x2, x3)= (011) in the truth table in Fig. 23.6(a). Similarly, for any row in the truth table, we reach the rectanglethat shows the value of f identical to that in the truth table in Fig. 23.6(a), by following a solid or dottedline corresponding to 1 or 0 for each of x1, x2, x3, respectively. BDD in Fig. 23.6(b) can be simplified tothe BDD shown in Fig. 23.6(c), which is called the reduced BDD, by the reduction to be described in alater section.

When a function has don’t-cares, d’s, we can treat it in the same manner by considering a rectanglefor d’s, as shown in Fig. 23.7.

FIGURE 23.6 Binary decision diagram.

FIGURE 23.7 Reduced BDD with don’t-cares.

© 2000 by CRC Press LLC