circuitos digitales ii the general computer architecture the pipeline design semana no.11 semestre...
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![Page 1: Circuitos Digitales II The General Computer Architecture The Pipeline Design Semana No.11 Semestre 2008-2 Prof. Gustavo Patiño gpatino@udea.edu.co Prof](https://reader036.vdocuments.net/reader036/viewer/2022070312/5539a3015503464a018b496d/html5/thumbnails/1.jpg)
Circuitos Digitales IICircuitos Digitales II
The General Computer Architecture
The Pipeline DesignSemana No.11Semana No.11
Semestre 2008-2Semestre 2008-2
Prof. Gustavo PatiñoProf. Gustavo Patiñ[email protected]
Prof. Eugenio DuqueProf. Eugenio [email protected]
Departamento de Ingeniería ElectrónicaDepartamento de Ingeniería Electrónica
Facultad de IngenieríaFacultad de Ingeniería
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Some Unsolved Questions When we defined multicycle, did we also define
pipeline ? Multicycle is pipeline ? Or, pipeline is multicycle ?
So, what does translate “pipeline” ? What conditions must be met by the inter-stage registers
in order to guaranty pipeline ? What is the relation between pipeline and parallelism? Currently, which are the trends in the pipeline
paradigm ?
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Pipeline
La segmentación de instrucciones es similar al uso de una cadena de montaje en una fábrica de manufacturación. En las cadenas de montaje, el producto pasa a través de
varias etapas de producción antes de tener el producto terminado.
Cada etapa o segmento de la cadena está especializada en un área específica de la línea de producción y lleva a cabo siempre la misma actividad.
Esta tecnología es aplicada en el diseño de procesadores eficientes. A estos procesadores se les conoce como pipeline processors o procesadores con segmentación encausada.
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
![Page 5: Circuitos Digitales II The General Computer Architecture The Pipeline Design Semana No.11 Semestre 2008-2 Prof. Gustavo Patiño gpatino@udea.edu.co Prof](https://reader036.vdocuments.net/reader036/viewer/2022070312/5539a3015503464a018b496d/html5/thumbnails/5.jpg)
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
![Page 7: Circuitos Digitales II The General Computer Architecture The Pipeline Design Semana No.11 Semestre 2008-2 Prof. Gustavo Patiño gpatino@udea.edu.co Prof](https://reader036.vdocuments.net/reader036/viewer/2022070312/5539a3015503464a018b496d/html5/thumbnails/7.jpg)
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
![Page 8: Circuitos Digitales II The General Computer Architecture The Pipeline Design Semana No.11 Semestre 2008-2 Prof. Gustavo Patiño gpatino@udea.edu.co Prof](https://reader036.vdocuments.net/reader036/viewer/2022070312/5539a3015503464a018b496d/html5/thumbnails/8.jpg)
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
The Pipelined MIPS The Pipelined MIPS ProcessorProcessor
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Sequential Versus Pipelined Sequential Versus Pipelined ExecutionExecution
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Speed Advantage of the Speed Advantage of the PipelinePipeline
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Pipeline StagesPipeline Stages
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Overlapped Pipeline Overlapped Pipeline ExecutionExecution
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Single-Cycle DatapathSingle-Cycle Datapath
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Single-Cycle Datapath with Single-Cycle Datapath with Pipeline RegistersPipeline Registers
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Instruction Process Through Instruction Process Through Pipeline (1)Pipeline (1)
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Instruction Process Through Instruction Process Through Pipeline (2)Pipeline (2)
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Instruction Process Through Instruction Process Through Pipeline (3)Pipeline (3)
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Instruction Process Through Instruction Process Through Pipeline (4)Pipeline (4)
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Instruction Process Through Instruction Process Through Pipeline (5)Pipeline (5)
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Adding ControlAdding Control
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Full Pipeline Design with Full Pipeline Design with Control LinesControl Lines
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Example: Example: The Pipeline in The Pipeline in ActionAction
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Pipeline Processor Operation Pipeline Processor Operation SummarySummary
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Problems to be analyzed in the next class
Hazards Data Hazard Control Hazard Solutions
Forwarding Stalls
Problems with Branch
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Hazards
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Hazards (…cont)
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Data Hazard in the Pipeline
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Control Hazard in the Pipeline
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Forwarding as a Solution to Data Hazards
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Forwarding Unit in the Pipeline
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Forwarding Unit Operation
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Stalls
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Result of Stall Approach
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Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Departamento de Ing. Electrónica Circuitos Digitales II Universidad de Antioquia
2008-2
Result of Stall Approach (…cont)