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Demonstration of Run-time Morphing of Streaming and Threaded Algorithms on Polymorphous Computing Architectures Mohammed Amduka, Julius Etzl, Carlos Henriquez, Mike Junod, and Aron Rubin Lockheed Martin Advanced Technology Laboratories 3 Executive Campus, 6 th Floor Cherry Hill, NJ 08002 (856) 792-9768 • Fax (856) 792-9925 {mamduka, jetzl, chenriqu, mjunod, arubin}@atl.lmco.com Abstract DARPA's Polymorphous Computing Architectures (PCA) Program is developing a new approach to embedded computing that supports reactive adaptation of both hardware and software to changes in mission needs. Lockheed Martin Advanced Technology Laboratories (LM ATL), in collaboration with other PCA performers, has demonstrated the feasibility and benefit of real-time dynamic adaptation of an embedded computing infrastructure for evolving mission requirements in a simulated UAV scenario running algorithms on PCA hardware. At this poster session we will demonstrate, in real-time, the dynamic scheduling and running of multiple “streaming” and “threaded” kernels/algorithms on real PCA hardware (MIT's 16-tile “Raw” chip on USC/ISI's board with the USB interface). We will run real “finite impulse response” (FIR), “detection and estimation” (D&E). and “Route Planning” algorithms on Raw as they are independently scheduled to execute in various geometric layouts based on the UAV scenario state and new targets and threats interactively placed on the terrain by the user. The accompanying demonstration presentation slides highlight the kernel performance benchmark results from MIT/LL and USC/ISI for their FIR and D&E kernels highlighting their performance on Raw versus Intel and PowerPC processors. The demo hardware consists of: (1) “Flight Viewer” laptop used to simulate a UAV mission navigating waypoints over terrain (Figure 1), (2) laptop hosting the data flow graph and scheduler that maps the streaming and threaded algorithms, and (3) Raw PCA hardware in a PC Figure 1. Simulated UAV Scenario Demonstrates Dynamic Morphing on PCA Hardware

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Page 1: Demonstration of Run-time Morphing of Streaming and ... of Run-time Morphing of Streaming and Threaded Algorithms on Polymorphous Computing ... Lockheed Martin Advanced Technology

Demonstration of Run-time Morphing of Streaming and Threaded Algorithms onPolymorphous Computing Architectures

Mohammed Amduka, Julius Etzl, Carlos Henriquez, Mike Junod, and Aron RubinLockheed Martin Advanced Technology Laboratories

3 Executive Campus, 6th Floor • Cherry Hill, NJ 08002(856) 792-9768 • Fax (856) 792-9925

{mamduka, jetzl, chenriqu, mjunod, arubin}@atl.lmco.com

AbstractDARPA's Polymorphous Computing Architectures (PCA) Program is developing a newapproach to embedded computing that supports reactive adaptation of both hardware andsoftware to changes in mission needs. Lockheed Martin Advanced Technology Laboratories (LMATL), in collaboration with other PCA performers, has demonstrated the feasibility and benefitof real-time dynamic adaptation of an embedded computing infrastructure for evolving missionrequirements in a simulated UAV scenario running algorithms on PCA hardware.

At this poster session we will demonstrate, in real-time, the dynamic scheduling and runningof multiple “streaming” and “threaded” kernels/algorithms on real PCA hardware (MIT's 16-tile“Raw” chip on USC/ISI's board with the USB interface). We will run real “finite impulseresponse” (FIR), “detection and estimation” (D&E). and “Route Planning” algorithms on Raw asthey are independently scheduled to execute in various geometric layouts based on the UAVscenario state and new targets and threats interactively placed on the terrain by the user. Theaccompanying demonstration presentation slides highlight the kernel performance benchmarkresults from MIT/LL and USC/ISI for their FIR and D&E kernels highlighting their performanceon Raw versus Intel and PowerPC processors.

The demo hardware consists of: (1) “Flight Viewer” laptop used to simulate a UAV missionnavigating waypoints over terrain (Figure 1), (2) laptop hosting the data flow graph andscheduler that maps the streaming and threaded algorithms, and (3) Raw PCA hardware in a PC

Figure 1. Simulated UAV Scenario Demonstrates Dynamic Morphing on PCA Hardware

Page 2: Demonstration of Run-time Morphing of Streaming and ... of Run-time Morphing of Streaming and Threaded Algorithms on Polymorphous Computing ... Lockheed Martin Advanced Technology

tower box In addition to the FIR and D&E algorithms, multiple route planning algorithms takeadvantage of the morphing capability of RAW. By having a user interactively place “targets” tobe navigated over for reconnaissance and “threats” to be routed around, we demonstrate the on-demand triggering of a morph that causes a computation on Raw of the route that generates anew set of waypoints for UAV navigation, that are displayed on the Flight Viewer.

For demonstration visualization purposes, the “Flight Viewer” display shows whichalgorithms are running on each of the sixteen Raw tiles. “S” indicates a “streaming” algorithmand “T” indicates a “threaded” algorithm. The different colors distinguish between the multiplealgorithms such as route planning, filters, image processing, radar processing, etc. For examplein Figure 2, the four green “S” tiles indicate a 4-tile FIR filter is running on Raw. The schedulerhas the flexibility to change the geometric layout of multi-tile algorithms since the algorithms arescheduled independently. The two yellow “S” tiles are always located in the same lower left tilessince they indicate the run-time “monitoring and checking” systems that always run to ensurethat the system is operating correctly after every hardware morph.

Takeoff Targeting Threat Avoidance

Threat Avoidance & TargetingCruising

Figure 2. Multiple Run-time States with Streaming and Threaded Kernels

During the demonstration, we will discuss technical details of how the network between thetile processors is programmed and how the algorithms are programmed and scheduled to run onRaw. (These technical details are covered in a separate extended abstract entitled “BringingAdaptability to High Performance Embedded Computing” also submitted to this conference.)