Switched Capacitor DC-DC Converters: Topologies and Applications

Bill Tsang and Eddie Ng

OutlineMotivationsDicksons Charge PumpOther Various Charge PumpsApplicationsConclusion

MotivationsInductorlessOn-chip integrationLow costHigh switching frequencyEasy to implement (open-loop system) Fast transient but large rippleHigh efficiency but limited output power

Ideal Dicksons Charge Pump(Phase 1)VDD-Vt2VDD-VtVDD0VDD Clk=0, Clk_bar=VDD Finite diode voltage drops, Vt

VDD-Vt VDD-Vt

Ideal Dicksons Charge Pump(Phase 2)VDD-Vt2VDD-2Vt2VDD-Vt3VDD-2VtVDDVDD0 Clk=VDD, Clk_bar=0 Maximum voltage stress on diodes 2VDD-Vt => reliability issue Maximum voltage stress on capacitors VCn =n(VDD-Vt) => reliability issue

VDD-Vt

Dicksons Charge PumpC1=C2=C3=C(Body effect can be significant at later stages)

Mention reliability in using MOS diode,note vbs is large large vt

Non-idealitiesThreshold voltage drop [Mos charge pumps for low-voltage operation]

Parasitic capacitor divider voltage drop Low conversion efficiency and pumping gain Limited maximum number of stages

[An on-chip High-voltage generator circuit for EEPROMs with a power supply voltage below 2V]

Modified SwitchCTSStatic Charge Transfer Switches (CTS)Eliminate transistor threshold drop

Modified Dicksons Charge Pump #1 (NCP-1)To turn on transistor Ms2; Vgs = 2VConditions:1, Clk=Vdd,Clk_bar=0: v2, v3+V2, Clk=0,Clk_bar=VDD: v1, v2+V,v3To turn off transistor Ms2; Vgs = 2Vimpossible

Modified Dicksons Charge Pump #1 (NCP-1)Static Charge Transfer Switches (CTS)Better voltage pumping gain than diodes

Lower voltage equals upper voltage of pervious stage Utilizing higher voltage from following stage to drive CTS Reverse charge sharing since CTS cannot turn off completely

Modified Switch #2 Eliminate transistor threshold drop Complete turn-off of switch, MS1

Next stageMP1MN1MP1 used to turn on MS1MN1 used to turn off MS1

Modified Dicksons Charge Pump #2 (NCP-2)To turn on transistor MP2 and MS2; Vgs = 2VConditions:1, Clk=Vdd,Clk_bar=0: v2, v3+V2, Clk=0,Clk_bar=VDD: v1, v2+V,v3To turn on transistor MN2 and turn off MS2; Vgs = 2V

Complete Circuit(NCP-2)Careful PMOS well connection to prevent latch-upDiode-connected output stage used

Modified Dicksons Charge Pump #3 (NCP-3)NCP-3 uses boosted clock at output stage

Converters Output Voltage Results

Optimum Capacitance Selection

[A Low-Ripple Switched-Capacitor DC-DC Up converter for Low-voltage applications]

Efficiency and Output ImpedancePower loss due to: Vth, Rds(on), ESR, Cp, etcEfficiency estimation

Output impedance (slow switching)

[Performance limits of switched-capacitor DC-DC Converter][Performance limits of switched-capacitor DC-DC Converter]M=ideal conversion ratioq=charge supplied to the source VoutTs=switching periodi= parasitic time constant

Cross-Coupled Charge Pump[Area-efficient CMOS Charge Pumps for LCD Drivers] PMOS to transmit 2VDD to output Bodies tied to source(highest voltage) to avoid forward biasing junction diodes

H-bridge TopologyCommercial products (Linear Technology, Fairchild, Maxim )Buck or Boost functionsNegative voltage generation

H-bridge TopologiesVout = -VinVout = 2VinVout = 0.5 VinPhase 1: transistors in red are onPhase 2: transistors in blue are on

Voltage drop at NMOS. Limited voltage swingCharge conservation eq on board

Application (1): Flash MemoryFloating gate programmingControl gate voltage >> Vdd

[ee141 lecture]

Memory cell layout

Application (1): Flash Memory

Nominal VDD= 5V

Application (2): Sample SwitchesS/H circuit constant vgs sampling with all input level Reduces distortionReduces Rds(on)

Voltage doubler

Application (3): Low voltage Amplifier Positive zero in Miller compensation1/gm pole-zero cancellation [charge-pump assisted low-power/low-voltage CMOS Opamp Design]

>2VGS

ConclusionDifferent Dicksons SC converters discussedOptimal Capacitor size selection Discussion of cross-coupled doublers Commercial product: Full H-bridge Applications: Flash, ADC, Amplifier, LCD driver

Mention reliability in using MOS diode,note vbs is large large vt Voltage drop at NMOS. Limited voltage swingCharge conservation eq on boardMemory cell layout