Recall Lab 2 - e.g. 4 input XOR

1

ENGG 1203 Tutorial - 2 Parity checking (for interest)

Parity bit Parity checking Error detection,

eg. Data can be Corrupted

Even parity total number of 1’s is even Odd parity total number of 1’s is odd

(total number include Parity bit)

XOR (2 input) to compute the parity. e.g. : even parity

parity sum is even parity bit =‘0’parity sum is odd parity bit =‘1’

2

Add redundant terms

multiple by 1 = A + A’

Add 0 = A A’

AB + BC +A’C = AB + BC (A+A’) + A’C= AB + ABC + A’BC + A’C= AB (1+C) + A’C (1+B)= AB + A’C

(A+B)(A’+C)(B+C) = (A+B)(A’+C)((B+C)+ AA’ )= (A+B)(A’+C)(B+C+A)(B+C+A’)= (A+B)((A+B)+C)(A’+C)((A’+C)+B)= (A+B)(A’+C)

Recall : Simplification methods

3

Recall : Time Delay

4

• 3 time delay 2 time delay• 5 gates 2 gates

Question 1

a) Simplify the circuit shown in the figure using Booleanalgebra.

b) Change each NAND gate in the circuit of the figure to a NOR gate,and simplify thecircuit usingBoolean algebra.

M NQ

M NQ

MNQ

5

Solution 1(a)

1

x MNQ M NQ M NQ

MNQ M NQ M NQ

MNQ M NQ M NQ

M Q M NQ

M M N

M

N

M Q M NQ

N

QN

Q

• Less gate (power and resource)• Shorter “longest path” => faster (what make the dalay ? )

M M N M NM N M

M N M M M N

6

1 1

M N Q

M N Q

M N Q

Change each NAND gate in the circuit of the figure to a NOR gate

First, we convert the circuit

Solution 1(b)

7

Then, we simplify the Boolean expression

0

M N Q M N Q

MM N

X M N Q M N Q M N Q

M N Q

M N MQ NM N

NQ QN Q

N QQ

M M N M

Q QM QN M N Q

M N QQ NM QM

(Group, Group)

(Expand)(Simplify)

(DeMorgan's Theorem)

0 1

A B A B

A B A B AA AB BA BB

AA A AA A A

8

1 1

...

0

0 1

M N Q

M Q M N

M M N MQ NM QM

N Q N Q N N

M M Q

Q

M Q M N Q

MN MQ QM QN

MN Q Q

M

Q

M M

NQ

N Q Q

N

Q

M

N

Q

Q

N

(Simplify)

(Expand)

(Group,

Group)

(Simplify)

(Simplify)

1 1 01 0 0

A A AA A A

9

Question 2

Describe the function using Boolean expressions

Draw the truth table and describe the function using SOP

10

Solution

x AB B CC

AB B C

AB B C

ABBC BC

ABBCBC

AB B C B C

AB BB BC CB CC

ABBC ABCB

ABC

x ABCPOS:

(De Morgan)

(De Morgan)

(De Morgan)

(grouping,expansion)

(XOR expansion)

(expansion)

(cancellation)

Approach 1: Boolean simplification Find Truth TableApproach 2: Construct TT Find POS

11

Gray Code Gray Code ( Reflected binary code – RBC )◦ widely used in digital communications

◦ one of the most important codes.

◦ a non-weighted code, minimum change codes.

12https://testbook.com/blog/conversion-from-gray-code-to-binary-code-and-vice-versa/

Karnaugh map grouping Rule of K-map:

1. No zeros allowed.2. No diagonals. (group may be horizontal or vertical)3. Only power of 2 number of cells in each group.

4. Groups should be as large as possible.5. Every “one” must be in at least one group.6. Overlapping allowed.

7. Wrap around allowed. (The leftmost cell in a row may be grouped with the rightmost cell and the top cell in a column may be grouped with the bottom cell. )

8. Fewest number of groups possible.13

K-map drawn on a torus, and in a plane. The dot-marked cells are adjacent.

14https://en.wikipedia.org/wiki/Karnaugh_map

Examples of Karnaugh map grouping

15

“Don’t Care” Conditions

16

Example 3

17

A Karnaugh map for an output involving four inputs, w, x, y, and z, is given below :

Derive the digital logic expression for this function.

Question 4

18

Find out the simplified f(x) from the given K-map

Simplify the Boolean expression of the circuit Change each NAND gate in the circuit to a NOR

gate, and simplify the Boolean expression of the circuit

Question 5 (Question 1)

19

Solution 5(a)

M N Q x0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 11 1 0 01 1 1 1

1

0

10110100NQ

M

B

C

AMNQ

x

From truth table to K-map

20

Solution 5(b)

M N Q x0 0 0 00 0 1 10 1 0 00 1 1 11 0 0 01 0 1 11 1 0 11 1 1 1

11101

01100

10110100NQ

M

x MN Q

21

Question 6Simplify the following Boolean expressions using Karnaugh map.

i)

ii)

A B A B

B BC ABC AC

A/B 0 1

0 0 0

1 1 1

i) A B A B A

22

Solution 6

A/BC 00 01 11 10

0 0 0 1 1

1 1 1 1 1

ii)

23

1 124

Example 7 A K-map for an output for four inputs, A, B, C,

and D is given by : Which of the following is a possible

expression for the output ?

Ans : A

Direct using K-map, we have

DCBBCDBDADCY

25

Example 8 A K-map for an output for four inputs, A, B, C,

and D is given by : Which of the following is a possible

expression for the output ?

Direct using K-map, we have

BADBDAY

Example 8

26

Ans : A

Re-group and we have

DBDABAY

Example 9 Which one of the following Boolean

expressions correctly represents this truth table ?

27

Ans : A

Kmap

CBBAY

Example 10

Given that , which of the following expressions are equivalent ?

28

1 BA

Ans : A

Given that

A = 0, B = 1or A = 1, B = 0Put these value to check the result

1 BA

Sequential Logic• Type of Flip Flop : RS, JK, D, T

• D flip-flop

http://www.electronics-tutorials.ws/sequential/seq_4.htmlhttp://www.rfcafe.com/references/electrical/flip-flop-table.htm 29

Sequential TIMEQ(t)

D

Q(t+1)

30

Gate Timing

• difference timing for difference kind of gate, cost dependence

What is the difference between Combinationaland Sequential Circuit ?

(1) Setup Time = t2-t1

(2) Propagation delay = t3-t2

(3) Hold time = t4-t2

Sequential factor - TIME CLK - END -